arm64: dts: ti: k3-j721s2: Add GPU node

The J721S2 binding is based on the TI downstream binding in commit
54b0f2a00d92 ("arm64: dts: ti: k3-j721s2-main: add gpu node") from [1]
but with updated compatible strings.

The clock[2] and power[3] indices were verified from HTML docs, while
the interrupt index comes from the TRM[4] (appendix
"J721S2_Appendix_20241106_Public.xlsx", "Interrupts (inputs)",
"GPU_BXS464_WRAP0_GPU_SS_0_OS_IRQ_OUT_0").

[1]: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel
[2]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721s2/clocks.html
[3]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721s2/devices.html
[4]: https://www.ti.com/lit/zip/spruj28 (revision E)

Reviewed-by: Randolph Sapp <rs@ti.com>
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Link: https://lore.kernel.org/r/20250428-bxs-4-64-dts-v4-2-eddafb4ae19f@imgtec.com
Signed-off-by: Nishanth Menon <nm@ti.com>
This commit is contained in:
Matt Coster 2025-04-28 12:07:15 +01:00 committed by Nishanth Menon
parent 8a6650dafa
commit ed6f779e21

View File

@ -2053,4 +2053,18 @@ watchdog8: watchdog@23f0000 {
/* reserved for MAIN_R5F1_1 */
status = "reserved";
};
gpu: gpu@4e20000000 {
compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";
reg = <0x4e 0x20000000 0x00 0x80000>;
clocks = <&k3_clks 130 1>;
clock-names = "core";
assigned-clocks = <&k3_clks 130 1>;
assigned-clock-rates = <800000000>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 373 TI_SCI_PD_EXCLUSIVE>;
power-domain-names = "a", "b";
dma-coherent;
};
};