github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-05-31 02:24:24 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

arm64: dts: st: add ethernet1 and ethernet2 support on stm32mp25

Browse Source 
Both instances ethernet based on GMAC SNPS IP on stm32mp25.
GMAC IP version is SNPS 5.3

Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
This commit is contained in:
Christophe Roullier 2024-06-19 14:58:13 +02:00 committed by Alexandre Torgue
parent 7253ddc6a3
commit ed4dd5b795
2 changed files with 100 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

49
arch/arm64/boot/dts/st/stm32mp251.dtsi
View File

@ -497,6 +497,55 @@ sdmmc1: mmc@48220000 {
access-controllers = <&rifsc 76>;
status = "disabled";
};
ethernet1: ethernet@482c0000 {
compatible = "st,stm32mp25-dwmac", "snps,dwmac-5.20";
reg = <0x482c0000 0x4000>;
reg-names = "stmmaceth";
interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
clock-names = "stmmaceth",
"mac-clk-tx",
"mac-clk-rx",
"ptp_ref",
"ethstp",
"eth-ck";
clocks = <&rcc CK_ETH1_MAC>,
<&rcc CK_ETH1_TX>,
<&rcc CK_ETH1_RX>,
<&rcc CK_KER_ETH1PTP>,
<&rcc CK_ETH1_STP>,
<&rcc CK_KER_ETH1>;
snps,axi-config = <&stmmac_axi_config_1>;
snps,mixed-burst;
snps,mtl-rx-config = <&mtl_rx_setup_1>;
snps,mtl-tx-config = <&mtl_tx_setup_1>;
snps,pbl = <2>;
snps,tso;
st,syscon = <&syscfg 0x3000>;
access-controllers = <&rifsc 60>;
status = "disabled";
mtl_rx_setup_1: rx-queues-config {
snps,rx-queues-to-use = <2>;
queue0 {};
queue1 {};
};
mtl_tx_setup_1: tx-queues-config {
snps,tx-queues-to-use = <4>;
queue0 {};
queue1 {};
queue2 {};
queue3 {};
};
stmmac_axi_config_1: stmmac-axi-config {
snps,blen = <0 0 0 0 16 8 4>;
snps,rd_osr_lmt = <0x7>;
snps,wr_osr_lmt = <0x7>;
};
};
};
bsec: efuse@44000000 {

51
arch/arm64/boot/dts/st/stm32mp253.dtsi
View File

@ -41,3 +41,54 @@ timer {
&optee {
interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
&rifsc {
ethernet2: ethernet@482d0000 {
compatible = "st,stm32mp25-dwmac", "snps,dwmac-5.20";
reg = <0x482d0000 0x4000>;
reg-names = "stmmaceth";
interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
clock-names = "stmmaceth",
"mac-clk-tx",
"mac-clk-rx",
"ptp_ref",
"ethstp",
"eth-ck";
clocks = <&rcc CK_ETH2_MAC>,
<&rcc CK_ETH2_TX>,
<&rcc CK_ETH2_RX>,
<&rcc CK_KER_ETH2PTP>,
<&rcc CK_ETH2_STP>,
<&rcc CK_KER_ETH2>;
snps,axi-config = <&stmmac_axi_config_2>;
snps,mixed-burst;
snps,mtl-rx-config = <&mtl_rx_setup_2>;
snps,mtl-tx-config = <&mtl_tx_setup_2>;
snps,pbl = <2>;
snps,tso;
st,syscon = <&syscfg 0x3400>;
access-controllers = <&rifsc 61>;
status = "disabled";
mtl_rx_setup_2: rx-queues-config {
snps,rx-queues-to-use = <2>;
queue0 {};
queue1 {};
};
mtl_tx_setup_2: tx-queues-config {
snps,tx-queues-to-use = <4>;
queue0 {};
queue1 {};
queue2 {};
queue3 {};
};
stmmac_axi_config_2: stmmac-axi-config {
snps,blen = <0 0 0 0 16 8 4>;
snps,rd_osr_lmt = <0x7>;
snps,wr_osr_lmt = <0x7>;
};
};
};