diff --git a/Documentation/devicetree/bindings/misc/pci1179,0220.yaml b/Documentation/devicetree/bindings/misc/pci1179,0220.yaml new file mode 100644 index 000000000000..c92c8d3d33f7 --- /dev/null +++ b/Documentation/devicetree/bindings/misc/pci1179,0220.yaml @@ -0,0 +1,146 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/misc/pci1179,0220.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba TC9564 internal PCI endpoint function + +maintainers: + - Alex Elder + - Daniel Thompson + +description: > + The Toshiba TC9564 is specialized SoC that implements a PCIe switch + as well as an Ethernet AVB/TSN bridge. In addition to these, the SoC + implements other functions, including a reset and clock controller, + an address translation unit, and a few other devices. + + The PCI switch has three downstream ports. The first two are exposed + externally, while the third is used by an internal PCIe endpoint. The + internal endpoint implements two PCIe functions, and attached to each + of these is a 10 Gbps capable Synopsys Ethernet controller and an + interrupt controller that converts internal "wired" interrupts into + MSIs delivered to the host. + + PCIe BARs provide access to registers that manage almost all IP blocks. + The SoC is modeled using a PCI endpoint bus. The IP blocks are bound + to platform drivers that access the hardware using MMIO through the + PCI BARs. + + ------------------------------------ + | Host | + -----........---------------...----- + | | | | + | PCIe | |I2C| + | | | | + ----------+........+-------------+...+------------------------------- + | |upstream| | | ---------------- | + | Toshiba | Port 0 | | +-------+ PCIe pwrctrl | | + | TC9564 ----++---- | I2C | ---------------- | + | SoC || |controller| ---------------- | + | || | +-------+ GPIO | | + | || | | | controller | | + | ------++------ ------------ ---------------- | + | | US | | + | | | ---------------------------------------- | + | | DS3+====+ downstream port 3 | | + | | | |--------------------------------------| | + | | PCIe | | embedded PCIe endpoint | | + | | switch | |~~~~~~~~~~~~~~~~~~~++~~~~~~~~~~~~~~~~~| | + | | | | PCIe function 0 || PCIe function 1 | | + | | | |-------------------||-----------------| | + | | | | BAR || BAR || BAR || BAR | BAR | BAR | | + | | | | 0 || 2 || 4 || 0 | 2 | 4 | | + | | DS1 DS2 | ---.------.------.--++--------------.--- | + | --++------++-- : : : : | + | || || : ---.-- :....... : | + | || || : |SRAM| : : : | + | || || : ------ : ---.--- : | + | || || : ....: |clock| ....: | + | || || : : : ------- : : | + | || || ------.---- -.- : -.- : | + | || || |translate| |M| :....... |M| : | + | || || ----------- |S| : : |S| : | + | || || |I| : ---.--- |I| : | + | || || |G| : |reset| |G| : | + | || || |E| : ------- |E| : | + | --------++-- --++-------- |N| : |N| : | + | |downstream| |downstream| ------.---- ------.---- | + | | port 1 | | port 2 | | XGMAC 0 | | XGMAC 1 | | + --+..........+--+..........+----------+.......+-----------+.....+---- + | | | | + |USXGMII| |SGMII| + | | | | + --+.......+-- ---+.....+--- + | Ethernet | | Ethernet | + | PHY | | PHY | + ------------- ------------- + +allOf: + - $ref: /schemas/pci/pci-ep-bus.yaml + +properties: + compatible: + const: pci1179,0220 # Toshiba TC9564 (a.k.a. Qualcomm QPS615) + + reg: + maxItems: 1 + description: PCI Bus/Device/Function config space address + +unevaluatedProperties: false + +required: + - compatible + - reg + - '#address-cells' + - '#size-cells' + - ranges + +examples: + - | + pcie@0,0 { + reg = <0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x83000000 0x0 0x0 0x0 0x0 0x1fd00000>; + + dev@0,0 { + compatible = "pci1179,0220"; + reg = <0x0 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + /* Ranges will be updated dynamically */ + ranges = <0x0 0x0 0x0 0x83000000 0x0 0x0 0x0 0x4000>, + <0x2 0x0 0x0 0x83000000 0x0 0x4000 0x0 0x80000>, + <0x4 0x0 0x0 0x83000000 0x0 0x84000 0x0 0x200000>; + + pci-ep-bus@4 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + /* Map 0x0-0x1fffff to BAR 4 */ + ranges = <0x0 0x4 0x0 0x0 0x200000>; + }; + }; + + dev@0,1 { + compatible = "pci1179,0220"; + reg = <0x100 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + /* Ranges will be updated dynamically */ + ranges = <0x0 0x0 0x0 0x83000100 0x0 0x0 0x0 0x4000>, + <0x2 0x0 0x0 0x83000100 0x0 0x4000 0x0 0x80000>, + <0x4 0x0 0x0 0x83000100 0x0 0x84000 0x0 0x200000>; + + pci-ep-bus@4 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + /* Map 0x0-0x1fffff to BAR 4 */ + ranges = <0x0 0x4 0x0 0x0 0x200000>; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 3cef938702da..13d880c93263 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -27731,6 +27731,12 @@ F: Documentation/devicetree/bindings/media/i2c/toshiba,tc358743.txt F: drivers/media/i2c/tc358743* F: include/media/i2c/tc358743.h +TOSHIBA TC9564 PCI DRIVER +M: Alex Elder +M: Daniel Thompson +S: Maintained +F: Documentation/devicetree/bindings/misc/pci1179,0220.yaml + TOSHIBA WMI HOTKEYS DRIVER M: Azael Avalos L: platform-driver-x86@vger.kernel.org