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dmaengine: stm32-dma: check whether length is aligned on FIFO threshold
commit cc832dc8e3 upstream.
When a period length is not multiple of FIFO some data may be stuck
within FIFO.
Burst/FIFO Threshold/Period or buffer length check has to be hardened
In any case DMA will grant any request from client but will degraded
any parameters whether awkward.
Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -308,20 +308,12 @@ static bool stm32_dma_fifo_threshold_is_allowed(u32 burst, u32 threshold,
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static bool stm32_dma_is_burst_possible(u32 buf_len, u32 threshold)
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{
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switch (threshold) {
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case STM32_DMA_FIFO_THRESHOLD_FULL:
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if (buf_len >= STM32_DMA_MAX_BURST)
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return true;
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else
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return false;
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case STM32_DMA_FIFO_THRESHOLD_HALFFULL:
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if (buf_len >= STM32_DMA_MAX_BURST / 2)
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return true;
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else
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return false;
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default:
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return false;
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}
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/*
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* Buffer or period length has to be aligned on FIFO depth.
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* Otherwise bytes may be stuck within FIFO at buffer or period
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* length.
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*/
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return ((buf_len % ((threshold + 1) * 4)) == 0);
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}
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static u32 stm32_dma_get_best_burst(u32 buf_len, u32 max_burst, u32 threshold,
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