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Fix delayed timers
Fix NULL pointer deref Fix wrong range check -----BEGIN PGP SIGNATURE----- iQJOBAABCAA4FiEEbt46xwy6kEcDOXoUeZbBVTGwZHAFAmggUJQaHHRzYm9nZW5k QGFscGhhLmZyYW5rZW4uZGUACgkQeZbBVTGwZHCjkw/+MjZDzSK/my+UnZSVvhSY iEXb/dLn+CfmElHJdmZdHvMLqXCL0UZW5qGasWaLj1uSndVUaQG4ZnXVSXF63fZR OqaHyETbbQ7ZMowwnTRPwoDKiDbn0VoJqnTntLnWsx2knPholyp6GWzb0ctVbq7x CWZ1mxkEKOSRFS4Fdx5jNNnn3Khb6MbRLehU0DOeVfYvBzo0eeHTyZ4NkPLLms+H pXI9Yoy7mxe8nbg6FLJu7ZerpG03Fgsr6h2UEWpTW69lZH9pf9XBVhyFbfEHDfmp PCwIherzRvV+lyZpPe2zlDEX+qFr8tEwvj7DEqwDRN85QklNoO9cShrwsbnsqW8G Dqec6zCHnV0IYNvF7OJPtJ74nY9uy1hGjMy9WBCqmWGFHcZJ5csKWzTrWurP8jZM H9U/AaZ9DxlPk0FWltXs7CVwI8B1JKY3mF3iwlbLhV8dcAjU6ym7Q7JpFYg/juhc FOj1CHqnYPb/a0W5JvbVKaNinY+IcG6KfSuuJLpLIkP6xJJE5FMVXfBhkSv3/A1n L0RAtu+joP9XuWxotGd9l98atjObIkKXfjMsGZIoT2mKBVyvIuXfA5skq8MpCzFv I3fJfqXpeL+mncyfyawvNhxphBM3i9Lm+henvkyDFUrhy7s8vHCek1WiXI3KaNOI 3wt/+XqOl5QTXdzpEnKYXQs= =tj73 -----END PGP SIGNATURE----- Merge tag 'mips-fixes_6.15_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS fixes from Thomas Bogendoerfer: - Fix delayed timers - Fix NULL pointer deref - Fix wrong range check * tag 'mips-fixes_6.15_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: Fix MAX_REG_OFFSET MIPS: CPS: Fix potential NULL pointer dereferences in cps_prepare_cpus() MIPS: rename rollback_handler with skipover_handler MIPS: Move r4k_wait() to .cpuidle.text section MIPS: Fix idle VS timer enqueue
This commit is contained in:
commit
ecb9194d17
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@ -6,11 +6,10 @@
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#include <linux/linkage.h>
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extern void (*cpu_wait)(void);
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extern void r4k_wait(void);
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extern asmlinkage void __r4k_wait(void);
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extern asmlinkage void r4k_wait(void);
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extern void r4k_wait_irqoff(void);
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static inline int using_rollback_handler(void)
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static inline int using_skipover_handler(void)
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{
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return cpu_wait == r4k_wait;
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}
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@ -65,7 +65,8 @@ static inline void instruction_pointer_set(struct pt_regs *regs,
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/* Query offset/name of register from its name/offset */
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extern int regs_query_register_offset(const char *name);
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#define MAX_REG_OFFSET (offsetof(struct pt_regs, __last))
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#define MAX_REG_OFFSET \
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(offsetof(struct pt_regs, __last) - sizeof(unsigned long))
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/**
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* regs_get_register() - get register value from its offset
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@ -104,48 +104,59 @@ handle_vcei:
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__FINIT
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.align 5 /* 32 byte rollback region */
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LEAF(__r4k_wait)
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.set push
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.set noreorder
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/* start of rollback region */
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LONG_L t0, TI_FLAGS($28)
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nop
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andi t0, _TIF_NEED_RESCHED
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bnez t0, 1f
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nop
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nop
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nop
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#ifdef CONFIG_CPU_MICROMIPS
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nop
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nop
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nop
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nop
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#endif
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.section .cpuidle.text,"ax"
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/* Align to 32 bytes for the maximum idle interrupt region size. */
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.align 5
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LEAF(r4k_wait)
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/* Keep the ISA bit clear for calculations on local labels here. */
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0: .fill 0
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/* Start of idle interrupt region. */
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local_irq_enable
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/*
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* If an interrupt lands here, before going idle on the next
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* instruction, we must *NOT* go idle since the interrupt could
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* have set TIF_NEED_RESCHED or caused a timer to need resched.
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* Fall through -- see skipover_handler below -- and have the
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* idle loop take care of things.
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*/
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1: .fill 0
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/* The R2 EI/EHB sequence takes 8 bytes, otherwise pad up. */
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.if 1b - 0b > 32
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.error "overlong idle interrupt region"
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.elseif 1b - 0b > 8
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.align 4
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.endif
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2: .fill 0
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.equ r4k_wait_idle_size, 2b - 0b
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/* End of idle interrupt region; size has to be a power of 2. */
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.set MIPS_ISA_ARCH_LEVEL_RAW
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r4k_wait_insn:
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wait
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/* end of rollback region (the region size must be power of two) */
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1:
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r4k_wait_exit:
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.set mips0
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local_irq_disable
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jr ra
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nop
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.set pop
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END(__r4k_wait)
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END(r4k_wait)
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.previous
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.macro BUILD_ROLLBACK_PROLOGUE handler
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FEXPORT(rollback_\handler)
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.macro BUILD_SKIPOVER_PROLOGUE handler
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FEXPORT(skipover_\handler)
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.set push
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.set noat
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MFC0 k0, CP0_EPC
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PTR_LA k1, __r4k_wait
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ori k0, 0x1f /* 32 byte rollback region */
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xori k0, 0x1f
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/* Subtract/add 2 to let the ISA bit propagate through the mask. */
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PTR_LA k1, r4k_wait_insn - 2
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ori k0, r4k_wait_idle_size - 2
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.set noreorder
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bne k0, k1, \handler
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PTR_ADDIU k0, r4k_wait_exit - r4k_wait_insn + 2
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.set reorder
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MTC0 k0, CP0_EPC
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.set pop
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.endm
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.align 5
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BUILD_ROLLBACK_PROLOGUE handle_int
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BUILD_SKIPOVER_PROLOGUE handle_int
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NESTED(handle_int, PT_SIZE, sp)
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.cfi_signal_frame
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#ifdef CONFIG_TRACE_IRQFLAGS
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@ -265,7 +276,7 @@ NESTED(except_vec_ejtag_debug, 0, sp)
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* This prototype is copied to ebase + n*IntCtl.VS and patched
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* to invoke the handler
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*/
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BUILD_ROLLBACK_PROLOGUE except_vec_vi
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BUILD_SKIPOVER_PROLOGUE except_vec_vi
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NESTED(except_vec_vi, 0, sp)
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SAVE_SOME docfi=1
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SAVE_AT docfi=1
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@ -35,13 +35,6 @@ static void __cpuidle r3081_wait(void)
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write_c0_conf(cfg | R30XX_CONF_HALT);
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}
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void __cpuidle r4k_wait(void)
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{
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raw_local_irq_enable();
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__r4k_wait();
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raw_local_irq_disable();
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}
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/*
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* This variant is preferable as it allows testing need_resched and going to
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* sleep depending on the outcome atomically. Unfortunately the "It is
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@ -332,6 +332,8 @@ static void __init cps_prepare_cpus(unsigned int max_cpus)
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mips_cps_cluster_bootcfg = kcalloc(nclusters,
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sizeof(*mips_cps_cluster_bootcfg),
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GFP_KERNEL);
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if (!mips_cps_cluster_bootcfg)
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goto err_out;
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if (nclusters > 1)
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mips_cm_update_property();
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@ -348,6 +350,8 @@ static void __init cps_prepare_cpus(unsigned int max_cpus)
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mips_cps_cluster_bootcfg[cl].core_power =
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kcalloc(BITS_TO_LONGS(ncores), sizeof(unsigned long),
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GFP_KERNEL);
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if (!mips_cps_cluster_bootcfg[cl].core_power)
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goto err_out;
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/* Allocate VPE boot configuration structs */
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for (c = 0; c < ncores; c++) {
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@ -77,7 +77,7 @@
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#include "access-helper.h"
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extern void check_wait(void);
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extern asmlinkage void rollback_handle_int(void);
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extern asmlinkage void skipover_handle_int(void);
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extern asmlinkage void handle_int(void);
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extern asmlinkage void handle_adel(void);
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extern asmlinkage void handle_ades(void);
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@ -2066,7 +2066,7 @@ void *set_vi_handler(int n, vi_handler_t addr)
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{
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extern const u8 except_vec_vi[];
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extern const u8 except_vec_vi_ori[], except_vec_vi_end[];
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extern const u8 rollback_except_vec_vi[];
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extern const u8 skipover_except_vec_vi[];
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unsigned long handler;
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unsigned long old_handler = vi_handlers[n];
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int srssets = current_cpu_data.srsets;
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@ -2095,7 +2095,7 @@ void *set_vi_handler(int n, vi_handler_t addr)
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change_c0_srsmap(0xf << n*4, 0 << n*4);
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}
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vec_start = using_rollback_handler() ? rollback_except_vec_vi :
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vec_start = using_skipover_handler() ? skipover_except_vec_vi :
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except_vec_vi;
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#if defined(CONFIG_CPU_MICROMIPS) || defined(CONFIG_CPU_BIG_ENDIAN)
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ori_offset = except_vec_vi_ori - vec_start + 2;
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@ -2426,8 +2426,8 @@ void __init trap_init(void)
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if (board_be_init)
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board_be_init();
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set_except_vector(EXCCODE_INT, using_rollback_handler() ?
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rollback_handle_int : handle_int);
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set_except_vector(EXCCODE_INT, using_skipover_handler() ?
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skipover_handle_int : handle_int);
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set_except_vector(EXCCODE_MOD, handle_tlbm);
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set_except_vector(EXCCODE_TLBL, handle_tlbl);
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set_except_vector(EXCCODE_TLBS, handle_tlbs);
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