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arm64: dts: qcom: sm6125: Add debug UART node
qup0 on sm6125 has 6 SEs and SE4 is used as debug uart. The uart node and the associated pinctrl are added here. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Biswapriyo Nath <nathbappai@gmail.com> Link: https://lore.kernel.org/r/20260121-xiaomi-ginkgo-features-v2-3-fb3ee94922d0@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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@ -661,6 +661,13 @@ qup_spi9_sleep: qup-spi9-sleep-state {
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drive-strength = <6>;
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bias-disable;
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};
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qup_uart4_default: qup-uart4-default-state {
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pins = "gpio16", "gpio17";
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function = "qup04";
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drive-strength = <2>;
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bias-disable;
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};
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};
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gcc: clock-controller@1400000 {
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@ -985,6 +992,17 @@ i2c4: i2c@4a90000 {
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#size-cells = <0>;
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status = "disabled";
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};
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uart4: serial@4a90000 {
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compatible = "qcom,geni-debug-uart";
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reg = <0x04a90000 0x4000>;
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clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
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clock-names = "se";
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interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-0 = <&qup_uart4_default>;
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pinctrl-names = "default";
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status = "disabled";
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};
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};
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gpi_dma1: dma-controller@4c00000 {
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