arm64: dts: qcom: sm6125: Add debug UART node

qup0 on sm6125 has 6 SEs and SE4 is used as debug uart. The uart node
and the associated pinctrl are added here.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Biswapriyo Nath <nathbappai@gmail.com>
Link: https://lore.kernel.org/r/20260121-xiaomi-ginkgo-features-v2-3-fb3ee94922d0@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Biswapriyo Nath 2026-01-21 13:26:19 +00:00 committed by Bjorn Andersson
parent 0a586c2c8e
commit ec6896cfa0

View File

@ -661,6 +661,13 @@ qup_spi9_sleep: qup-spi9-sleep-state {
drive-strength = <6>;
bias-disable;
};
qup_uart4_default: qup-uart4-default-state {
pins = "gpio16", "gpio17";
function = "qup04";
drive-strength = <2>;
bias-disable;
};
};
gcc: clock-controller@1400000 {
@ -985,6 +992,17 @@ i2c4: i2c@4a90000 {
#size-cells = <0>;
status = "disabled";
};
uart4: serial@4a90000 {
compatible = "qcom,geni-debug-uart";
reg = <0x04a90000 0x4000>;
clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
clock-names = "se";
interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&qup_uart4_default>;
pinctrl-names = "default";
status = "disabled";
};
};
gpi_dma1: dma-controller@4c00000 {