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RISC-V SpacemiT DT changes for 6.18

Browse Source 
- Add OrangePi RV2 board support
 - Add reset support to UART driver
 - Add PDMA driver support
 - Remove sec_uart1 node
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Merge tag 'spacemit-dt-for-6.18-1' of https://github.com/spacemit-com/linux into soc/dt

RISC-V SpacemiT DT changes for 6.18

- Add OrangePi RV2 board support
- Add reset support to UART driver
- Add PDMA driver support
- Remove sec_uart1 node

* tag 'spacemit-dt-for-6.18-1' of https://github.com/spacemit-com/linux:
  riscv: dts: spacemit: uart: remove sec_uart1 device node
  riscv: dts: spacemit: Enable PDMA on Banana Pi F3 and Milkv Jupiter
  riscv: dts: spacemit: Add PDMA node for K1 SoC
  riscv: dts: spacemit: add UART resets for Soc K1
  riscv: dts: spacemit: Add OrangePi RV2 board device tree
  dt-bindings: riscv: spacemit: Add OrangePi RV2 board

Link: https://lore.kernel.org/r/20250919055525-GYC5766558@gentoo.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2025-09-23 22:22:19 +02:00
commit ec1ede181e
6 changed files with 71 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Documentation/devicetree/bindings/riscv/spacemit.yaml
View File

@ -22,6 +22,7 @@ properties:
- enum:
- bananapi,bpi-f3
- milkv,jupiter
- xunlong,orangepi-rv2
- const: spacemit,k1
additionalProperties: true

1
arch/riscv/boot/dts/spacemit/Makefile
View File

@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_SPACEMIT) += k1-bananapi-f3.dtb
dtb-$(CONFIG_ARCH_SPACEMIT) += k1-milkv-jupiter.dtb
dtb-$(CONFIG_ARCH_SPACEMIT) += k1-orangepi-rv2.dtb

4
arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
View File

@ -40,6 +40,10 @@ &emmc {
status = "okay";
};
&pdma {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_2_cfg>;

4
arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts
View File

@ -20,6 +20,10 @@ chosen {
};
};
&pdma {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_2_cfg>;

40
arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts Normal file
View File

@ -0,0 +1,40 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2024 Yangyu Chen <cyy@cyyself.name>
* Copyright (C) 2025 Hendrik Hamerlinck <hendrik.hamerlinck@hammernet.be>
*/
/dts-v1/;
#include "k1.dtsi"
#include "k1-pinctrl.dtsi"
/ {
model = "OrangePi RV2";
compatible = "xunlong,orangepi-rv2", "spacemit,k1";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0";
};
leds {
compatible = "gpio-leds";
led1 {
label = "sys-led";
gpios = <&gpio K1_GPIO(96) GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
default-state = "on";
};
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_2_cfg>;
status = "okay";
};

31
arch/riscv/boot/dts/spacemit/k1.dtsi
View File

@ -660,6 +660,17 @@ dma-bus {
dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>,
<0x1 0x00000000 0x1 0x80000000 0x3 0x00000000>;
pdma: dma-controller@d4000000 {
compatible = "spacemit,k1-pdma";
reg = <0x0 0xd4000000 0x0 0x4000>;
clocks = <&syscon_apmu CLK_DMA>;
resets = <&syscon_apmu RESET_DMA>;
interrupts = <72>;
dma-channels = <16>;
#dma-cells= <1>;
status = "disabled";
};
uart0: serial@d4017000 {
compatible = "spacemit,k1-uart",
"intel,xscale-uart";
@ -667,6 +678,7 @@ uart0: serial@d4017000 {
clocks = <&syscon_apbc CLK_UART0>,
<&syscon_apbc CLK_UART0_BUS>;
clock-names = "core", "bus";
resets = <&syscon_apbc RESET_UART0>;
interrupts = <42>;
reg-shift = <2>;
reg-io-width = <4>;
@ -680,6 +692,7 @@ uart2: serial@d4017100 {
clocks = <&syscon_apbc CLK_UART2>,
<&syscon_apbc CLK_UART2_BUS>;
clock-names = "core", "bus";
resets = <&syscon_apbc RESET_UART2>;
interrupts = <44>;
reg-shift = <2>;
reg-io-width = <4>;
@ -693,6 +706,7 @@ uart3: serial@d4017200 {
clocks = <&syscon_apbc CLK_UART3>,
<&syscon_apbc CLK_UART3_BUS>;
clock-names = "core", "bus";
resets = <&syscon_apbc RESET_UART3>;
interrupts = <45>;
reg-shift = <2>;
reg-io-width = <4>;
@ -706,6 +720,7 @@ uart4: serial@d4017300 {
clocks = <&syscon_apbc CLK_UART4>,
<&syscon_apbc CLK_UART4_BUS>;
clock-names = "core", "bus";
resets = <&syscon_apbc RESET_UART4>;
interrupts = <46>;
reg-shift = <2>;
reg-io-width = <4>;
@ -719,6 +734,7 @@ uart5: serial@d4017400 {
clocks = <&syscon_apbc CLK_UART5>,
<&syscon_apbc CLK_UART5_BUS>;
clock-names = "core", "bus";
resets = <&syscon_apbc RESET_UART5>;
interrupts = <47>;
reg-shift = <2>;
reg-io-width = <4>;
@ -732,6 +748,7 @@ uart6: serial@d4017500 {
clocks = <&syscon_apbc CLK_UART6>,
<&syscon_apbc CLK_UART6_BUS>;
clock-names = "core", "bus";
resets = <&syscon_apbc RESET_UART6>;
interrupts = <48>;
reg-shift = <2>;
reg-io-width = <4>;
@ -745,6 +762,7 @@ uart7: serial@d4017600 {
clocks = <&syscon_apbc CLK_UART7>,
<&syscon_apbc CLK_UART7_BUS>;
clock-names = "core", "bus";
resets = <&syscon_apbc RESET_UART7>;
interrupts = <49>;
reg-shift = <2>;
reg-io-width = <4>;
@ -758,6 +776,7 @@ uart8: serial@d4017700 {
clocks = <&syscon_apbc CLK_UART8>,
<&syscon_apbc CLK_UART8_BUS>;
clock-names = "core", "bus";
resets = <&syscon_apbc RESET_UART8>;
interrupts = <50>;
reg-shift = <2>;
reg-io-width = <4>;
@ -771,22 +790,14 @@ uart9: serial@d4017800 {
clocks = <&syscon_apbc CLK_UART9>,
<&syscon_apbc CLK_UART9_BUS>;
clock-names = "core", "bus";
resets = <&syscon_apbc RESET_UART9>;
interrupts = <51>;
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
};
sec_uart1: serial@f0612000 {
compatible = "spacemit,k1-uart",
"intel,xscale-uart";
reg = <0x0 0xf0612000 0x0 0x100>;
interrupts = <43>;
clock-frequency = <14857000>;
reg-shift = <2>;
reg-io-width = <4>;
status = "reserved"; /* for TEE usage */
};
/* sec_uart1: 0xf0612000, not available from Linux */
};
multimedia-bus {