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platform/x86/intel/pmc: Add support for variable DMU offsets
Add support for handling different DMU Die C6 offsets across platforms. The previous implementation assumed a uniform DMU Die C6 offset for all platforms, which is no longer valid after an upcoming change. Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com> Link: https://patch.msgid.link/20260505043342.2573556-6-xi.pardee@linux.intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
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@ -729,6 +729,7 @@ struct pmc_dev_info arl_pmc_dev = {
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.init = arl_core_init,
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.sub_req = pmc_core_pmt_get_lpm_req,
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.ssram_hidden = true,
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.die_c6_offset = MTL_PMT_DMU_DIE_C6_OFFSET,
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};
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static u32 ARL_H_PMT_DMU_GUIDS[] = {ARL_PMT_DMU_GUID, ARL_H_PMT_DMU_GUID, 0x0};
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@ -742,4 +743,5 @@ struct pmc_dev_info arl_h_pmc_dev = {
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.init = arl_h_core_init,
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.sub_req = pmc_core_pmt_get_lpm_req,
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.ssram_hidden = true,
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.die_c6_offset = MTL_PMT_DMU_DIE_C6_OFFSET,
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};
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@ -1381,7 +1381,7 @@ void pmc_core_punit_pmt_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_de
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}
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pmcdev->punit_ep = ep;
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pmcdev->die_c6_offset = MTL_PMT_DMU_DIE_C6_OFFSET;
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pmcdev->die_c6_offset = pmc_dev_info->die_c6_offset;
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}
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if (pmc_dev_info->pc_guid) {
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@ -514,6 +514,7 @@ enum pmc_index {
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* @init: Function to perform platform specific init action
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* @sub_req: Function to achieve low power mode substate requirements
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* @ssram_hidden: Some SSRAM devices are hidden on this platform
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* @die_c6_offset: Telemetry offset to read Die C6 residency
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*/
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struct pmc_dev_info {
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u32 *dmu_guids;
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@ -530,6 +531,7 @@ struct pmc_dev_info {
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int (*init)(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_info);
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int (*sub_req)(struct pmc_dev *pmcdev, struct pmc *pmc, struct telem_endpoint *ep);
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bool ssram_hidden;
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u32 die_c6_offset;
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};
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extern const struct pmc_bit_map msr_map[];
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@ -1003,4 +1003,5 @@ struct pmc_dev_info mtl_pmc_dev = {
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.init = mtl_core_init,
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.sub_req = pmc_core_pmt_get_lpm_req,
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.ssram_hidden = true,
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.die_c6_offset = MTL_PMT_DMU_DIE_C6_OFFSET,
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};
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