From eba4724641990bd9975ca10ababe726b6143f0b6 Mon Sep 17 00:00:00 2001 From: Richard Zhu Date: Thu, 18 Jun 2026 17:20:59 +0800 Subject: [PATCH] arm64: dts: imx95: Add dma, intr, aer and pme interrupts for PCIe The current PCIe device tree configuration only defines the MSI interrupt, which is sufficient for basic PCIe operation but limits advanced functionality. Add the following interrupt lines to pcie0 and pcie1 nodes: - dma: DMA interrupt for PCIe DMA operations - intr: General controller events and link state changes - aer: Advanced Error Reporting interrupt - pme: Power Management Event interrupt This enables enhanced PCIe features and capabilities that were previously unavailable due to missing interrupt definitions. Signed-off-by: Richard Zhu Signed-off-by: Frank Li --- arch/arm64/boot/dts/freescale/imx95.dtsi | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi index 305751046d66..38fc47024841 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi @@ -1957,8 +1957,12 @@ pcie0: pcie@4c300000 { bus-range = <0x00 0xff>; num-lanes = <1>; num-viewport = <8>; - interrupts = ; - interrupt-names = "msi"; + interrupts = , + , + , + , + ; + interrupt-names = "msi", "dma", "intr", "aer", "pme"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, @@ -2044,8 +2048,12 @@ pcie1: pcie@4c380000 { bus-range = <0x00 0xff>; num-lanes = <1>; num-viewport = <8>; - interrupts = ; - interrupt-names = "msi"; + interrupts = , + , + , + , + ; + interrupt-names = "msi", "dma", "intr", "aer", "pme"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,