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drm/amd: Add dedicated helper for amdgpu_device_find_parent()

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There are a few cases that code walks up the topology to find the
link partner of the integrated switch in a dGPU.  Split this out
to a helper and call in all places.

This does have a functional change that amdgpu_device_gpu_bandwidth()
doesn't cache the internal link but only the parent.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Mario Limonciello 2026-05-20 10:46:17 -05:00 committed by Alex Deucher
parent deb02080ca
commit eb53125a7a
1 changed files with 23 additions and 21 deletions
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44
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
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@ -1913,6 +1913,19 @@ static void amdgpu_uid_fini(struct amdgpu_device *adev)
adev->uid_info = NULL; adev->uid_info = NULL;
} }
static struct pci_dev *amdgpu_device_find_parent(struct amdgpu_device *adev)
{
struct pci_dev *parent = adev->pdev;
/* skip upstream/downstream switches internal to dGPU */
while ((parent = pci_upstream_bridge(parent))) {
if (parent->vendor == PCI_VENDOR_ID_ATI)
continue;
}
return parent;
}
/** /**
* amdgpu_device_ip_early_init - run early init for hardware IPs * amdgpu_device_ip_early_init - run early init for hardware IPs
* *
@ -5921,8 +5934,6 @@ static void amdgpu_device_partner_bandwidth(struct amdgpu_device *adev,
enum pci_bus_speed *speed, enum pci_bus_speed *speed,
enum pcie_link_width *width) enum pcie_link_width *width)
{ {
struct pci_dev *parent = adev->pdev;
if (!speed || !width) if (!speed || !width)
return; return;
@ -5930,13 +5941,11 @@ static void amdgpu_device_partner_bandwidth(struct amdgpu_device *adev,
*width = PCIE_LNK_WIDTH_UNKNOWN; *width = PCIE_LNK_WIDTH_UNKNOWN;
if (amdgpu_device_pcie_dynamic_switching_supported(adev)) { if (amdgpu_device_pcie_dynamic_switching_supported(adev)) {
while ((parent = pci_upstream_bridge(parent))) { struct pci_dev *parent = amdgpu_device_find_parent(adev);
/* skip upstream/downstream switches internal to dGPU*/
if (parent->vendor == PCI_VENDOR_ID_ATI) if (parent) {
continue;
*speed = pcie_get_speed_cap(parent); *speed = pcie_get_speed_cap(parent);
*width = pcie_get_width_cap(parent); *width = pcie_get_width_cap(parent);
break;
} }
} else { } else {
/* use the current speeds rather than max if switching is not supported */ /* use the current speeds rather than max if switching is not supported */
@ -5963,22 +5972,15 @@ static void amdgpu_device_gpu_bandwidth(struct amdgpu_device *adev,
if (!speed || !width) if (!speed || !width)
return; return;
parent = pci_upstream_bridge(parent); /* use the device itself */
if (parent && parent->vendor == PCI_VENDOR_ID_ATI) { *speed = pcie_get_speed_cap(adev->pdev);
/* use the upstream/downstream switches internal to dGPU */ *width = pcie_get_width_cap(adev->pdev);
/* use the link outside the device */
parent = amdgpu_device_find_parent(adev);
if (parent) {
*speed = pcie_get_speed_cap(parent); *speed = pcie_get_speed_cap(parent);
*width = pcie_get_width_cap(parent); *width = pcie_get_width_cap(parent);
while ((parent = pci_upstream_bridge(parent))) {
if (parent->vendor == PCI_VENDOR_ID_ATI) {
/* use the upstream/downstream switches internal to dGPU */
*speed = pcie_get_speed_cap(parent);
*width = pcie_get_width_cap(parent);
}
}
} else {
/* use the device itself */
*speed = pcie_get_speed_cap(adev->pdev);
*width = pcie_get_width_cap(adev->pdev);
} }
} }