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KVM: x86: Move CR and DR macro definitions from kvm_host.h => regs.h
Relocate a variety of Control/Debug Register macros that unintentionally got left behind when the related helper function prototypes were moved to regs.h. No functional change intended. Reviewed-by: Kai Huang <kai.huang@intel.com> Link: https://patch.msgid.link/20260625220450.3354415-5-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
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@ -125,24 +125,6 @@
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#define KVM_REQ_UPDATE_PROTECTED_GUEST_STATE \
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KVM_ARCH_REQ_FLAGS(34, KVM_REQUEST_WAIT)
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#define CR0_RESERVED_BITS \
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(~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
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| X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
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| X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
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#define CR4_RESERVED_BITS \
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(~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
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| X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
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| X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
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| X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
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| X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
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| X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP \
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| X86_CR4_LAM_SUP | X86_CR4_CET))
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#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
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#define INVALID_PAGE (~(hpa_t)0)
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#define VALID_PAGE(x) ((x) != INVALID_PAGE)
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@ -230,28 +212,6 @@ enum x86_intercept_stage;
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#define KVM_NR_DB_REGS 4
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#define DR6_BUS_LOCK (1 << 11)
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#define DR6_BD (1 << 13)
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#define DR6_BS (1 << 14)
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#define DR6_BT (1 << 15)
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#define DR6_RTM (1 << 16)
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/*
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* DR6_ACTIVE_LOW combines fixed-1 and active-low bits.
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* We can regard all the bits in DR6_FIXED_1 as active_low bits;
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* they will never be 0 for now, but when they are defined
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* in the future it will require no code change.
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*
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* DR6_ACTIVE_LOW is also used as the init/reset value for DR6.
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*/
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#define DR6_ACTIVE_LOW 0xffff0ff0
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#define DR6_VOLATILE 0x0001e80f
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#define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE)
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#define DR7_BP_EN_MASK 0x000000ff
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#define DR7_GE (1 << 9)
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#define DR7_GD (1 << 13)
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#define DR7_VOLATILE 0xffff2bff
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#define KVM_GUESTDBG_VALID_MASK \
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(KVM_GUESTDBG_ENABLE | \
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KVM_GUESTDBG_SINGLESTEP | \
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@ -16,6 +16,44 @@
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static_assert(!(KVM_POSSIBLE_CR0_GUEST_BITS & X86_CR0_PDPTR_BITS));
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#define CR0_RESERVED_BITS \
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(~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
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| X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
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| X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
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#define CR4_RESERVED_BITS \
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(~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
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| X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
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| X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
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| X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
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| X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
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| X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP \
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| X86_CR4_LAM_SUP | X86_CR4_CET))
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#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
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#define DR6_BUS_LOCK (1 << 11)
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#define DR6_BD (1 << 13)
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#define DR6_BS (1 << 14)
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#define DR6_BT (1 << 15)
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#define DR6_RTM (1 << 16)
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/*
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* DR6_ACTIVE_LOW combines fixed-1 and active-low bits.
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* We can regard all the bits in DR6_FIXED_1 as active_low bits;
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* they will never be 0 for now, but when they are defined
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* in the future it will require no code change.
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*
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* DR6_ACTIVE_LOW is also used as the init/reset value for DR6.
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*/
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#define DR6_ACTIVE_LOW 0xffff0ff0
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#define DR6_VOLATILE 0x0001e80f
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#define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE)
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#define DR7_BP_EN_MASK 0x000000ff
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#define DR7_GE (1 << 9)
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#define DR7_GD (1 << 13)
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#define DR7_VOLATILE 0xffff2bff
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void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0);
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void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4);
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int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
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