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arm64: fpsimd: Use opaque type for SME state
As the SME state size can vary at runtime, we don't have a concrete type for the in-memory SME state, and pass this around using a pointer to void. Using pointer to void means that it's very easy to introduce errors that cannot be caught by the compiler (e.g. as 'void **' can be assigned to 'void *'). Improve this by adding an opaque 'struct arm64_sme_state', and consistently passing a pointer to this. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Mark Brown <broonie@kernel.org> Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Fuad Tabba <tabba@google.com> Cc: James Morse <james.morse@arm.com> Cc: Marc Zyngier <maz@kernel.org> Cc: Oliver Upton <oupton@kernel.org> Cc: Will Deacon <will@kernel.org> Signed-off-by: Will Deacon <will@kernel.org>
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@ -163,7 +163,7 @@ extern void fpsimd_update_current_state(struct user_fpsimd_state const *state);
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struct cpu_fp_state {
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struct user_fpsimd_state *st;
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struct arm64_sve_state *sve_state;
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void *sme_state;
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struct arm64_sme_state *sme_state;
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u64 *svcr;
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u64 *fpmr;
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unsigned int sve_vl;
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@ -199,7 +199,7 @@ static inline void *thread_zt_state(struct thread_struct *thread)
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{
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/* The ZT register state is stored immediately after the ZA state */
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unsigned int sme_vq = sve_vq_from_vl(thread_get_sme_vl(thread));
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return thread->sme_state + ZA_SIG_REGS_SIZE(sme_vq);
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return (void *)thread->sme_state + ZA_SIG_REGS_SIZE(sme_vq);
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}
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static inline unsigned int sve_get_vl(void)
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@ -218,8 +218,8 @@ static inline unsigned int sve_get_vl(void)
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extern void sve_save_state(struct arm64_sve_state *state, int save_ffr);
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extern void sve_load_state(const struct arm64_sve_state *state, int restore_ffr);
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extern void sve_flush_live(bool flush_ffr, unsigned long vq_minus_1);
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extern void sme_save_state(void *state, int zt);
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extern void sme_load_state(void const *state, int zt);
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extern void sme_save_state(struct arm64_sme_state *state, int zt);
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extern void sme_load_state(const struct arm64_sme_state *state, int zt);
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struct arm64_cpu_capabilities;
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extern void cpu_enable_fpsimd(const struct arm64_cpu_capabilities *__unused);
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@ -131,6 +131,7 @@ enum fp_type {
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};
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struct arm64_sve_state; /* Opaque type */
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struct arm64_sme_state; /* Opaque type */
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struct cpu_context {
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unsigned long x19;
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@ -167,7 +168,7 @@ struct thread_struct {
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enum fp_type fp_type; /* registers FPSIMD or SVE? */
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unsigned int fpsimd_cpu;
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struct arm64_sve_state *sve_state; /* SVE registers, if any */
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void *sme_state; /* ZA and ZT state, if any */
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struct arm64_sme_state *sme_state; /* ZA and ZT state, if any */
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unsigned int vl[ARM64_VEC_MAX]; /* vector length */
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unsigned int vl_onexec[ARM64_VEC_MAX]; /* vl after next exec */
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unsigned long fault_address; /* fault info */
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@ -808,7 +808,7 @@ static int change_live_vector_length(struct task_struct *task,
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unsigned int sve_vl = task_get_sve_vl(task);
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unsigned int sme_vl = task_get_sme_vl(task);
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struct arm64_sve_state *sve_state = NULL;
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void *sme_state = NULL;
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struct arm64_sme_state *sme_state = NULL;
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if (type == ARM64_VEC_SME)
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sme_vl = vl;
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@ -1645,7 +1645,7 @@ static void fpsimd_flush_thread_vl(enum vec_type type)
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void fpsimd_flush_thread(void)
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{
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struct arm64_sve_state *sve_state = NULL;
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void *sme_state = NULL;
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struct arm64_sme_state *sme_state = NULL;
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if (!system_supports_fpsimd())
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return;
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