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ASoC: SOF: Add xtensa support
Add common directory for xtensa architecture Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
This commit is contained in:
Pierre-Louis Bossart
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efefbc60f7
commit
eafed357c9
3
sound/soc/sof/xtensa/Kconfig
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3
sound/soc/sof/xtensa/Kconfig
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config SND_SOC_SOF_XTENSA
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tristate
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5
sound/soc/sof/xtensa/Makefile
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sound/soc/sof/xtensa/Makefile
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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snd-sof-xtensa-dsp-objs := core.o
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obj-$(CONFIG_SND_SOC_SOF_XTENSA) += snd-sof-xtensa-dsp.o
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159
sound/soc/sof/xtensa/core.c
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sound/soc/sof/xtensa/core.c
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// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* Copyright(c) 2018 Intel Corporation. All rights reserved.
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*
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* Author: Pan Xiuli <xiuli.pan@linux.intel.com>
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*/
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <sound/core.h>
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#include <sound/soc.h>
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#include <sound/sof.h>
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#include "../sof-priv.h"
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#include "../ops.h"
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struct xtensa_exception_cause {
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u32 id;
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const char *msg;
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const char *description;
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};
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/* From 4.4.1.5 table 4-64 Exception Causes of
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* Xtensa Instruction Set Architecture (ISA) Reference Manual
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*/
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static const struct xtensa_exception_cause xtensa_exception_causes[] = {
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{0, "IllegalInstructionCause", "Illegal instruction"},
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{1, "SyscallCause", "SYSCALL instruction"},
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{2, "InstructionFetchErrorCause",
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"Processor internal physical address or data error during instruction fetch"},
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{3, "LoadStoreErrorCause",
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"Processor internal physical address or data error during load or store"},
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{4, "Level1InterruptCause",
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"Level-1 interrupt as indicated by set level-1 bits in the INTERRUPT register"},
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{5, "AllocaCause",
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"MOVSP instruction, if caller’s registers are not in the register file"},
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{6, "IntegerDivideByZeroCause",
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"QUOS, QUOU, REMS, or REMU divisor operand is zero"},
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{8, "PrivilegedCause",
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"Attempt to execute a privileged operation when CRING ? 0"},
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{9, "LoadStoreAlignmentCause", "Load or store to an unaligned address"},
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{12, "InstrPIFDataErrorCause",
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"PIF data error during instruction fetch"},
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{13, "LoadStorePIFDataErrorCause",
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"Synchronous PIF data error during LoadStore access"},
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{14, "InstrPIFAddrErrorCause",
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"PIF address error during instruction fetch"},
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{15, "LoadStorePIFAddrErrorCause",
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"Synchronous PIF address error during LoadStore access"},
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{16, "InstTLBMissCause", "Error during Instruction TLB refill"},
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{17, "InstTLBMultiHitCause",
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"Multiple instruction TLB entries matched"},
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{18, "InstFetchPrivilegeCause",
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"An instruction fetch referenced a virtual address at a ring level less than CRING"},
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{20, "InstFetchProhibitedCause",
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"An instruction fetch referenced a page mapped with an attribute that does not permit instruction fetch"},
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{24, "LoadStoreTLBMissCause",
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"Error during TLB refill for a load or store"},
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{25, "LoadStoreTLBMultiHitCause",
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"Multiple TLB entries matched for a load or store"},
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{26, "LoadStorePrivilegeCause",
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"A load or store referenced a virtual address at a ring level less than CRING"},
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{28, "LoadProhibitedCause",
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"A load referenced a page mapped with an attribute that does not permit loads"},
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{32, "Coprocessor0Disabled",
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"Coprocessor 0 instruction when cp0 disabled"},
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{33, "Coprocessor1Disabled",
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"Coprocessor 1 instruction when cp1 disabled"},
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{34, "Coprocessor2Disabled",
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"Coprocessor 2 instruction when cp2 disabled"},
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{35, "Coprocessor3Disabled",
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"Coprocessor 3 instruction when cp3 disabled"},
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{36, "Coprocessor4Disabled",
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"Coprocessor 4 instruction when cp4 disabled"},
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{37, "Coprocessor5Disabled",
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"Coprocessor 5 instruction when cp5 disabled"},
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{38, "Coprocessor6Disabled",
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"Coprocessor 6 instruction when cp6 disabled"},
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{39, "Coprocessor7Disabled",
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"Coprocessor 7 instruction when cp7 disabled"},
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};
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/* only need xtensa atm */
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static void xtensa_dsp_oops(struct snd_sof_dev *sdev, void *oops)
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{
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struct sof_ipc_dsp_oops_xtensa *xoops = oops;
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int i;
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dev_err(sdev->dev, "error: DSP Firmware Oops\n");
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for (i = 0; i < ARRAY_SIZE(xtensa_exception_causes); i++) {
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if (xtensa_exception_causes[i].id == xoops->exccause) {
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dev_err(sdev->dev, "error: Exception Cause: %s, %s\n",
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xtensa_exception_causes[i].msg,
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xtensa_exception_causes[i].description);
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}
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}
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dev_err(sdev->dev, "EXCCAUSE 0x%8.8x EXCVADDR 0x%8.8x PS 0x%8.8x SAR 0x%8.8x\n",
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xoops->exccause, xoops->excvaddr, xoops->ps, xoops->sar);
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dev_err(sdev->dev, "EPC1 0x%8.8x EPC2 0x%8.8x EPC3 0x%8.8x EPC4 0x%8.8x",
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xoops->epc1, xoops->epc2, xoops->epc3, xoops->epc4);
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dev_err(sdev->dev, "EPC5 0x%8.8x EPC6 0x%8.8x EPC7 0x%8.8x DEPC 0x%8.8x",
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xoops->epc5, xoops->epc6, xoops->epc7, xoops->depc);
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dev_err(sdev->dev, "EPS2 0x%8.8x EPS3 0x%8.8x EPS4 0x%8.8x EPS5 0x%8.8x",
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xoops->eps2, xoops->eps3, xoops->eps4, xoops->eps5);
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dev_err(sdev->dev, "EPS6 0x%8.8x EPS7 0x%8.8x INTENABL 0x%8.8x INTERRU 0x%8.8x",
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xoops->eps6, xoops->eps7, xoops->intenable, xoops->interrupt);
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}
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static void xtensa_stack(struct snd_sof_dev *sdev, void *oops, u32 *stack,
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u32 stack_words)
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{
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struct sof_ipc_dsp_oops_xtensa *xoops = oops;
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u32 stack_ptr = xoops->stack;
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int i;
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dev_err(sdev->dev, "stack dump from 0x%8.8x\n", stack_ptr);
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for (i = 0; i <= stack_words - 4; i += 4) {
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dev_err(sdev->dev, "0x%8.8x: 0x%8.8x 0x%8.8x 0x%8.8x 0x%8.8x\n",
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stack_ptr + i, stack[i], stack[i + 1], stack[i + 2],
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stack[i + 3]);
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}
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/* deal with any remaining words */
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switch (stack_words - i) {
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case 0:
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break;
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case 1:
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dev_err(sdev->dev, "0x%8.8x: 0x%8.8x\n",
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stack_ptr + stack_words - 1, stack[stack_words - 1]);
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break;
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case 2:
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dev_err(sdev->dev, "0x%8.8x: 0x%8.8x 0x%8.8x\n",
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stack_ptr + stack_words - 2, stack[stack_words - 2],
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stack[stack_words - 1]);
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break;
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case 3:
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dev_err(sdev->dev, "0x%8.8x: 0x%8.8x 0x%8.8x 0x%8.8x\n",
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stack_ptr + stack_words - 3, stack[stack_words - 3],
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stack[stack_words - 2], stack[stack_words - 1]);
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break;
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default:
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break;
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}
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}
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const struct sof_arch_ops sof_xtensa_arch_ops = {
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.dsp_oops = xtensa_dsp_oops,
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.dsp_stack = xtensa_stack,
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};
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EXPORT_SYMBOL(sof_xtensa_arch_ops);
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MODULE_DESCRIPTION("SOF Xtensa DSP support");
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MODULE_LICENSE("Dual BSD/GPL");
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