From ddb07998b8e9b9b04013f787a4523f23efb6857e Mon Sep 17 00:00:00 2001 From: Kathiravan Thirumoorthy Date: Tue, 11 Aug 2026 21:23:08 +0530 Subject: [PATCH] dt-bindings: interconnect: Add Qualcomm IPQ9650 support On Qualcomm IPQ9650 platform the interconnect busses don't have separate RPM / RPMh controls. Instead they require direct votes through the GCC. To unify hardware descriptions (and software interfaces) between this platform and other Qualcomm platforms, make GCC export corresponding NoC clocks as interconnects. Add IDs for these Network-on-Chip interfaces. The GCC schema already defines #interconnect-cells since it was added in the commit f92b778251ad ("dt-bindings: clock: add Qualcomm IPQ9650 GCC"). Acked-by: Georgi Djakov Signed-off-by: Kathiravan Thirumoorthy Acked-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260811-ipq9650_icc-v2-1-55b8efbd62c6@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- .../dt-bindings/interconnect/qcom,ipq9650.h | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 include/dt-bindings/interconnect/qcom,ipq9650.h diff --git a/include/dt-bindings/interconnect/qcom,ipq9650.h b/include/dt-bindings/interconnect/qcom,ipq9650.h new file mode 100644 index 000000000000..023a3878cc08 --- /dev/null +++ b/include/dt-bindings/interconnect/qcom,ipq9650.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +#ifndef INTERCONNECT_QCOM_IPQ9650_H +#define INTERCONNECT_QCOM_IPQ9650_H + +#define MASTER_ANOC_PCIE0 0 +#define SLAVE_ANOC_PCIE0 1 +#define MASTER_CNOC_PCIE0 2 +#define SLAVE_CNOC_PCIE0 3 +#define MASTER_ANOC_PCIE1 4 +#define SLAVE_ANOC_PCIE1 5 +#define MASTER_CNOC_PCIE1 6 +#define SLAVE_CNOC_PCIE1 7 +#define MASTER_ANOC_PCIE2 8 +#define SLAVE_ANOC_PCIE2 9 +#define MASTER_CNOC_PCIE2 10 +#define SLAVE_CNOC_PCIE2 11 +#define MASTER_ANOC_PCIE3 12 +#define SLAVE_ANOC_PCIE3 13 +#define MASTER_CNOC_PCIE3 14 +#define SLAVE_CNOC_PCIE3 15 +#define MASTER_ANOC_PCIE4 16 +#define SLAVE_ANOC_PCIE4 17 +#define MASTER_CNOC_PCIE4 18 +#define SLAVE_CNOC_PCIE4 19 +#define MASTER_SNOC_USB 20 +#define SLAVE_SNOC_USB 21 + +#endif /* INTERCONNECT_QCOM_IPQ9650_H */