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arm64: dts: nuvoton: Add Ethernet nodes

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Add GMAC nodes for our MA35D1 development boards:
two RGMII interfaces for SOM board, and one RGMII
and one RMII interface for IoT board.

Signed-off-by: Joey Lu <a0987203069@gmail.com>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
This commit is contained in:
Joey Lu 2026-03-23 18:17:55 +08:00 committed by Andrew Jeffery
parent 254f49634e
commit eae82b6e8c
3 changed files with 101 additions and 0 deletions
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25
arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts
View File

@ -18,6 +18,8 @@ aliases {
serial12 = &uart12;
serial13 = &uart13;
serial14 = &uart14;
ethernet0 = &gmac0;
ethernet1 = &gmac1;
};
chosen {
@ -126,3 +128,26 @@ &uart14 {
pinctrl-0 = <&pinctrl_uart14>;
status = "okay";
};
&gmac0 {
status = "okay";
phy-handle = <&eth_phy0>;
};
&mdio0 {
eth_phy0: ethernet-phy@0 {
reg = <0>;
};
};
&gmac1 {
status = "okay";
phy-mode = "rmii";
phy-handle = <&eth_phy1>;
};
&mdio1 {
eth_phy1: ethernet-phy@1 {
reg = <1>;
};
};

24
arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts
View File

@ -18,6 +18,8 @@ aliases {
serial12 = &uart12;
serial14 = &uart14;
serial16 = &uart16;
ethernet0 = &gmac0;
ethernet1 = &gmac1;
};
chosen {
@ -129,3 +131,25 @@ &uart16 {
pinctrl-0 = <&pinctrl_uart16>;
status = "okay";
};
&gmac0 {
status = "okay";
phy-handle = <&eth_phy0>;
};
&mdio0 {
eth_phy0: ethernet-phy@0 {
reg = <0>;
};
};
&gmac1 {
status = "okay";
phy-handle = <&eth_phy1>;
};
&mdio1 {
eth_phy1: ethernet-phy@1 {
reg = <1>;
};
};

52
arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
View File

@ -379,5 +379,57 @@ uart16: serial@40880000 {
clocks = <&clk UART16_GATE>;
status = "disabled";
};
gmac0: ethernet@40120000 {
compatible = "nuvoton,ma35d1-dwmac", "snps,dwmac-3.70a";
reg = <0x0 0x40120000 0x0 0x10000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
clocks = <&clk EMAC0_GATE>, <&clk EPLL_DIV8>;
clock-names = "stmmaceth", "ptp_ref";
nuvoton,sys = <&sys 0>;
resets = <&sys MA35D1_RESET_GMAC0>;
reset-names = "stmmaceth";
snps,multicast-filter-bins = <0>;
snps,perfect-filter-entries = <8>;
rx-fifo-depth = <4096>;
tx-fifo-depth = <2048>;
phy-mode = "rgmii-id";
status = "disabled";
mdio0: mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
};
};
gmac1: ethernet@40130000 {
compatible = "nuvoton,ma35d1-dwmac", "snps,dwmac-3.70a";
reg = <0x0 0x40130000 0x0 0x10000>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
clocks = <&clk EMAC1_GATE>, <&clk EPLL_DIV8>;
clock-names = "stmmaceth", "ptp_ref";
nuvoton,sys = <&sys 1>;
resets = <&sys MA35D1_RESET_GMAC1>;
reset-names = "stmmaceth";
snps,multicast-filter-bins = <0>;
snps,perfect-filter-entries = <8>;
rx-fifo-depth = <4096>;
tx-fifo-depth = <2048>;
phy-mode = "rgmii-id";
status = "disabled";
mdio1: mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
};
};
};
};