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media: atomisp: do lots of other coding style cleanups

Browse Source 
Use some auto-reformat tools to make the atomisp style
a little better. There are still lots of weird things there,
but this will hopefully reduce the number of pure coding
style patches submitted upstream.

Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
This commit is contained in:
Mauro Carvalho Chehab 2020-04-19 17:51:29 +02:00
parent bdfe0beb95
commit eaa399eb54
394 changed files with 23978 additions and 21492 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

259
drivers/staging/media/atomisp/i2c/atomisp-gc0310.c
View File

@ -101,7 +101,7 @@ static int gc0310_i2c_write(struct i2c_client *client, u16 len, u8 *data)
}
static int gc0310_write_reg(struct i2c_client *client, u16 data_length,
u8 reg, u8 val)
u8 reg, u8 val)
{
int ret;
unsigned char data[2] = {0};
@ -191,8 +191,8 @@ static int __gc0310_buf_reg_array(struct i2c_client *client,
}
static int __gc0310_write_reg_is_consecutive(struct i2c_client *client,
struct gc0310_write_ctrl *ctrl,
const struct gc0310_reg *next)
struct gc0310_write_ctrl *ctrl,
const struct gc0310_reg *next)
{
if (ctrl->index == 0)
return 1;
@ -222,7 +222,7 @@ static int gc0310_write_reg_array(struct i2c_client *client,
* flushed before proceed.
*/
if (!__gc0310_write_reg_is_consecutive(client, &ctrl,
next)) {
next)) {
err = __gc0310_flush_reg_array(client, &ctrl);
if (err)
return err;
@ -230,7 +230,7 @@ static int gc0310_write_reg_array(struct i2c_client *client,
err = __gc0310_buf_reg_array(client, &ctrl, next);
if (err) {
dev_err(&client->dev, "%s: write error, aborted\n",
__func__);
__func__);
return err;
}
break;
@ -256,8 +256,8 @@ static int gc0310_g_fnumber(struct v4l2_subdev *sd, s32 *val)
static int gc0310_g_fnumber_range(struct v4l2_subdev *sd, s32 *val)
{
*val = (GC0310_F_NUMBER_DEFAULT_NUM << 24) |
(GC0310_F_NUMBER_DEM << 16) |
(GC0310_F_NUMBER_DEFAULT_NUM << 8) | GC0310_F_NUMBER_DEM;
(GC0310_F_NUMBER_DEM << 16) |
(GC0310_F_NUMBER_DEFAULT_NUM << 8) | GC0310_F_NUMBER_DEM;
return 0;
}
@ -280,8 +280,8 @@ static int gc0310_g_bin_factor_y(struct v4l2_subdev *sd, s32 *val)
}
static int gc0310_get_intg_factor(struct i2c_client *client,
struct camera_mipi_info *info,
const struct gc0310_resolution *res)
struct camera_mipi_info *info,
const struct gc0310_resolution *res)
{
struct v4l2_subdev *sd = i2c_get_clientdata(client);
struct gc0310_device *dev = to_gc0310_sensor(sd);
@ -304,11 +304,11 @@ static int gc0310_get_intg_factor(struct i2c_client *client,
/* get integration time */
buf->coarse_integration_time_min = GC0310_COARSE_INTG_TIME_MIN;
buf->coarse_integration_time_max_margin =
GC0310_COARSE_INTG_TIME_MAX_MARGIN;
GC0310_COARSE_INTG_TIME_MAX_MARGIN;
buf->fine_integration_time_min = GC0310_FINE_INTG_TIME_MIN;
buf->fine_integration_time_max_margin =
GC0310_FINE_INTG_TIME_MAX_MARGIN;
GC0310_FINE_INTG_TIME_MAX_MARGIN;
buf->fine_integration_time_def = GC0310_FINE_INTG_TIME_MIN;
buf->read_mode = res->bin_mode;
@ -316,12 +316,12 @@ static int gc0310_get_intg_factor(struct i2c_client *client,
/* get the cropping and output resolution to ISP for this mode. */
/* Getting crop_horizontal_start */
ret = gc0310_read_reg(client, GC0310_8BIT,
GC0310_H_CROP_START_H, &reg_val);
GC0310_H_CROP_START_H, &reg_val);
if (ret)
return ret;
val = (reg_val & 0xFF) << 8;
ret = gc0310_read_reg(client, GC0310_8BIT,
GC0310_H_CROP_START_L, &reg_val);
GC0310_H_CROP_START_L, &reg_val);
if (ret)
return ret;
buf->crop_horizontal_start = val | (reg_val & 0xFF);
@ -329,12 +329,12 @@ static int gc0310_get_intg_factor(struct i2c_client *client,
/* Getting crop_vertical_start */
ret = gc0310_read_reg(client, GC0310_8BIT,
GC0310_V_CROP_START_H, &reg_val);
GC0310_V_CROP_START_H, &reg_val);
if (ret)
return ret;
val = (reg_val & 0xFF) << 8;
ret = gc0310_read_reg(client, GC0310_8BIT,
GC0310_V_CROP_START_L, &reg_val);
GC0310_V_CROP_START_L, &reg_val);
if (ret)
return ret;
buf->crop_vertical_start = val | (reg_val & 0xFF);
@ -342,12 +342,12 @@ static int gc0310_get_intg_factor(struct i2c_client *client,
/* Getting output_width */
ret = gc0310_read_reg(client, GC0310_8BIT,
GC0310_H_OUTSIZE_H, &reg_val);
GC0310_H_OUTSIZE_H, &reg_val);
if (ret)
return ret;
val = (reg_val & 0xFF) << 8;
ret = gc0310_read_reg(client, GC0310_8BIT,
GC0310_H_OUTSIZE_L, &reg_val);
GC0310_H_OUTSIZE_L, &reg_val);
if (ret)
return ret;
buf->output_width = val | (reg_val & 0xFF);
@ -355,12 +355,12 @@ static int gc0310_get_intg_factor(struct i2c_client *client,
/* Getting output_height */
ret = gc0310_read_reg(client, GC0310_8BIT,
GC0310_V_OUTSIZE_H, &reg_val);
GC0310_V_OUTSIZE_H, &reg_val);
if (ret)
return ret;
val = (reg_val & 0xFF) << 8;
ret = gc0310_read_reg(client, GC0310_8BIT,
GC0310_V_OUTSIZE_L, &reg_val);
GC0310_V_OUTSIZE_L, &reg_val);
if (ret)
return ret;
buf->output_height = val | (reg_val & 0xFF);
@ -373,41 +373,43 @@ static int gc0310_get_intg_factor(struct i2c_client *client,
/* Getting line_length_pck */
ret = gc0310_read_reg(client, GC0310_8BIT,
GC0310_H_BLANKING_H, &reg_val);
GC0310_H_BLANKING_H, &reg_val);
if (ret)
return ret;
val = (reg_val & 0xFF) << 8;
ret = gc0310_read_reg(client, GC0310_8BIT,
GC0310_H_BLANKING_L, &reg_val);
GC0310_H_BLANKING_L, &reg_val);
if (ret)
return ret;
hori_blanking = val | (reg_val & 0xFF);
ret = gc0310_read_reg(client, GC0310_8BIT,
GC0310_SH_DELAY, &reg_val);
GC0310_SH_DELAY, &reg_val);
if (ret)
return ret;
sh_delay = reg_val;
buf->line_length_pck = buf->output_width + hori_blanking + sh_delay + 4;
pr_info("hori_blanking=%d sh_delay=%d line_length_pck=%d\n", hori_blanking, sh_delay, buf->line_length_pck);
pr_info("hori_blanking=%d sh_delay=%d line_length_pck=%d\n", hori_blanking,
sh_delay, buf->line_length_pck);
/* Getting frame_length_lines */
ret = gc0310_read_reg(client, GC0310_8BIT,
GC0310_V_BLANKING_H, &reg_val);
GC0310_V_BLANKING_H, &reg_val);
if (ret)
return ret;
val = (reg_val & 0xFF) << 8;
ret = gc0310_read_reg(client, GC0310_8BIT,
GC0310_V_BLANKING_L, &reg_val);
GC0310_V_BLANKING_L, &reg_val);
if (ret)
return ret;
vert_blanking = val | (reg_val & 0xFF);
buf->frame_length_lines = buf->output_height + vert_blanking;
pr_info("vert_blanking=%d frame_length_lines=%d\n", vert_blanking, buf->frame_length_lines);
pr_info("vert_blanking=%d frame_length_lines=%d\n", vert_blanking,
buf->frame_length_lines);
buf->binning_factor_x = res->bin_factor_x ?
res->bin_factor_x : 1;
res->bin_factor_x : 1;
buf->binning_factor_y = res->bin_factor_y ?
res->bin_factor_y : 1;
res->bin_factor_y : 1;
return 0;
}
@ -435,13 +437,13 @@ static int gc0310_set_gain(struct v4l2_subdev *sd, int gain)
/* set analog gain */
ret = gc0310_write_reg(client, GC0310_8BIT,
GC0310_AGC_ADJ, again);
GC0310_AGC_ADJ, again);
if (ret)
return ret;
/* set digital gain */
ret = gc0310_write_reg(client, GC0310_8BIT,
GC0310_DGC_ADJ, dgain);
GC0310_DGC_ADJ, dgain);
if (ret)
return ret;
@ -459,14 +461,14 @@ static int __gc0310_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
/* set exposure */
ret = gc0310_write_reg(client, GC0310_8BIT,
GC0310_AEC_PK_EXPO_L,
coarse_itg & 0xff);
GC0310_AEC_PK_EXPO_L,
coarse_itg & 0xff);
if (ret)
return ret;
ret = gc0310_write_reg(client, GC0310_8BIT,
GC0310_AEC_PK_EXPO_H,
(coarse_itg >> 8) & 0x0f);
GC0310_AEC_PK_EXPO_H,
(coarse_itg >> 8) & 0x0f);
if (ret)
return ret;
@ -478,7 +480,7 @@ static int __gc0310_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
}
static int gc0310_set_exposure(struct v4l2_subdev *sd, int exposure,
int gain, int digitgain)
int gain, int digitgain)
{
struct gc0310_device *dev = to_gc0310_sensor(sd);
int ret;
@ -491,7 +493,7 @@ static int gc0310_set_exposure(struct v4l2_subdev *sd, int exposure,
}
static long gc0310_s_exposure(struct v4l2_subdev *sd,
struct atomisp_exposure *exposure)
struct atomisp_exposure *exposure)
{
int exp = exposure->integration_time[0];
int gain = exposure->gain[0];
@ -542,15 +544,15 @@ static int gc0310_q_exposure(struct v4l2_subdev *sd, s32 *value)
/* get exposure */
ret = gc0310_read_reg(client, GC0310_8BIT,
GC0310_AEC_PK_EXPO_L,
&reg_v);
GC0310_AEC_PK_EXPO_L,
&reg_v);
if (ret)
goto err;
*value = reg_v;
ret = gc0310_read_reg(client, GC0310_8BIT,
GC0310_AEC_PK_EXPO_H,
&reg_v);
GC0310_AEC_PK_EXPO_H,
&reg_v);
if (ret)
goto err;
@ -622,91 +624,91 @@ static const struct v4l2_ctrl_ops ctrl_ops = {
static const struct v4l2_ctrl_config gc0310_controls[] = {
{
.ops = &ctrl_ops,
.id = V4L2_CID_EXPOSURE_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "exposure",
.min = 0x0,
.max = 0xffff,
.step = 0x01,
.def = 0x00,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_EXPOSURE_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "exposure",
.min = 0x0,
.max = 0xffff,
.step = 0x01,
.def = 0x00,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_VFLIP,
.type = V4L2_CTRL_TYPE_BOOLEAN,
.name = "Flip",
.min = 0,
.max = 1,
.step = 1,
.def = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_VFLIP,
.type = V4L2_CTRL_TYPE_BOOLEAN,
.name = "Flip",
.min = 0,
.max = 1,
.step = 1,
.def = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_HFLIP,
.type = V4L2_CTRL_TYPE_BOOLEAN,
.name = "Mirror",
.min = 0,
.max = 1,
.step = 1,
.def = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_HFLIP,
.type = V4L2_CTRL_TYPE_BOOLEAN,
.name = "Mirror",
.min = 0,
.max = 1,
.step = 1,
.def = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FOCAL_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "focal length",
.min = GC0310_FOCAL_LENGTH_DEFAULT,
.max = GC0310_FOCAL_LENGTH_DEFAULT,
.step = 0x01,
.def = GC0310_FOCAL_LENGTH_DEFAULT,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FOCAL_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "focal length",
.min = GC0310_FOCAL_LENGTH_DEFAULT,
.max = GC0310_FOCAL_LENGTH_DEFAULT,
.step = 0x01,
.def = GC0310_FOCAL_LENGTH_DEFAULT,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number",
.min = GC0310_F_NUMBER_DEFAULT,
.max = GC0310_F_NUMBER_DEFAULT,
.step = 0x01,
.def = GC0310_F_NUMBER_DEFAULT,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number",
.min = GC0310_F_NUMBER_DEFAULT,
.max = GC0310_F_NUMBER_DEFAULT,
.step = 0x01,
.def = GC0310_F_NUMBER_DEFAULT,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_RANGE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number range",
.min = GC0310_F_NUMBER_RANGE,
.max = GC0310_F_NUMBER_RANGE,
.step = 0x01,
.def = GC0310_F_NUMBER_RANGE,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_RANGE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number range",
.min = GC0310_F_NUMBER_RANGE,
.max = GC0310_F_NUMBER_RANGE,
.step = 0x01,
.def = GC0310_F_NUMBER_RANGE,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_BIN_FACTOR_HORZ,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "horizontal binning factor",
.min = 0,
.max = GC0310_BIN_FACTOR_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_BIN_FACTOR_HORZ,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "horizontal binning factor",
.min = 0,
.max = GC0310_BIN_FACTOR_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_BIN_FACTOR_VERT,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "vertical binning factor",
.min = 0,
.max = GC0310_BIN_FACTOR_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_BIN_FACTOR_VERT,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "vertical binning factor",
.min = 0,
.max = GC0310_BIN_FACTOR_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
};
static int gc0310_init(struct v4l2_subdev *sd)
@ -904,7 +906,7 @@ static int distance(struct gc0310_resolution *res, u32 w, u32 h)
match = abs(((w_ratio << 13) / h_ratio) - 8192);
if ((w_ratio < 8192) || (h_ratio < 8192) ||
(match > LARGEST_ALLOWED_RATIO_MISMATCH))
(match > LARGEST_ALLOWED_RATIO_MISMATCH))
return -1;
return w_ratio + h_ratio;
@ -1070,13 +1072,13 @@ static int gc0310_detect(struct i2c_client *client)
return -ENODEV;
ret = gc0310_read_reg(client, GC0310_8BIT,
GC0310_SC_CMMN_CHIP_ID_H, &high);
GC0310_SC_CMMN_CHIP_ID_H, &high);
if (ret) {
dev_err(&client->dev, "read sensor_id_high failed\n");
return -ENODEV;
}
ret = gc0310_read_reg(client, GC0310_8BIT,
GC0310_SC_CMMN_CHIP_ID_L, &low);
GC0310_SC_CMMN_CHIP_ID_L, &low);
if (ret) {
dev_err(&client->dev, "read sensor_id_low failed\n");
return -ENODEV;
@ -1085,7 +1087,8 @@ static int gc0310_detect(struct i2c_client *client)
pr_info("sensor ID = 0x%x\n", id);
if (id != GC0310_ID) {
dev_err(&client->dev, "sensor ID error, read id = 0x%x, target id = 0x%x\n", id, GC0310_ID);
dev_err(&client->dev, "sensor ID error, read id = 0x%x, target id = 0x%x\n", id,
GC0310_ID);
return -ENODEV;
}
@ -1108,7 +1111,7 @@ static int gc0310_s_stream(struct v4l2_subdev *sd, int enable)
if (enable) {
/* enable per frame MIPI and sensor ctrl reset */
ret = gc0310_write_reg(client, GC0310_8BIT,
0xFE, 0x30);
0xFE, 0x30);
if (ret) {
mutex_unlock(&dev->input_lock);
return ret;
@ -1116,22 +1119,22 @@ static int gc0310_s_stream(struct v4l2_subdev *sd, int enable)
}
ret = gc0310_write_reg(client, GC0310_8BIT,
GC0310_RESET_RELATED, GC0310_REGISTER_PAGE_3);
GC0310_RESET_RELATED, GC0310_REGISTER_PAGE_3);
if (ret) {
mutex_unlock(&dev->input_lock);
return ret;
}
ret = gc0310_write_reg(client, GC0310_8BIT, GC0310_SW_STREAM,
enable ? GC0310_START_STREAMING :
GC0310_STOP_STREAMING);
enable ? GC0310_START_STREAMING :
GC0310_STOP_STREAMING);
if (ret) {
mutex_unlock(&dev->input_lock);
return ret;
}
ret = gc0310_write_reg(client, GC0310_8BIT,
GC0310_RESET_RELATED, GC0310_REGISTER_PAGE_0);
GC0310_RESET_RELATED, GC0310_REGISTER_PAGE_0);
if (ret) {
mutex_unlock(&dev->input_lock);
return ret;
@ -1154,7 +1157,7 @@ static int gc0310_s_config(struct v4l2_subdev *sd,
return -ENODEV;
dev->platform_data =
(struct camera_sensor_platform_data *)platform_data;
(struct camera_sensor_platform_data *)platform_data;
mutex_lock(&dev->input_lock);
/* power off the module, then power on it in future

178
drivers/staging/media/atomisp/i2c/atomisp-gc2235.c
View File

@ -102,7 +102,7 @@ static int gc2235_i2c_write(struct i2c_client *client, u16 len, u8 *data)
}
static int gc2235_write_reg(struct i2c_client *client, u16 data_length,
u8 reg, u8 val)
u8 reg, u8 val)
{
int ret;
unsigned char data[4] = {0};
@ -170,8 +170,8 @@ static int __gc2235_buf_reg_array(struct i2c_client *client,
}
static int __gc2235_write_reg_is_consecutive(struct i2c_client *client,
struct gc2235_write_ctrl *ctrl,
const struct gc2235_reg *next)
struct gc2235_write_ctrl *ctrl,
const struct gc2235_reg *next)
{
if (ctrl->index == 0)
return 1;
@ -201,7 +201,7 @@ static int gc2235_write_reg_array(struct i2c_client *client,
* flushed before proceed.
*/
if (!__gc2235_write_reg_is_consecutive(client, &ctrl,
next)) {
next)) {
err = __gc2235_flush_reg_array(client, &ctrl);
if (err)
return err;
@ -209,7 +209,7 @@ static int gc2235_write_reg_array(struct i2c_client *client,
err = __gc2235_buf_reg_array(client, &ctrl, next);
if (err) {
dev_err(&client->dev, "%s: write error, aborted\n",
__func__);
__func__);
return err;
}
break;
@ -235,14 +235,14 @@ static int gc2235_g_fnumber(struct v4l2_subdev *sd, s32 *val)
static int gc2235_g_fnumber_range(struct v4l2_subdev *sd, s32 *val)
{
*val = (GC2235_F_NUMBER_DEFAULT_NUM << 24) |
(GC2235_F_NUMBER_DEM << 16) |
(GC2235_F_NUMBER_DEFAULT_NUM << 8) | GC2235_F_NUMBER_DEM;
(GC2235_F_NUMBER_DEM << 16) |
(GC2235_F_NUMBER_DEFAULT_NUM << 8) | GC2235_F_NUMBER_DEM;
return 0;
}
static int gc2235_get_intg_factor(struct i2c_client *client,
struct camera_mipi_info *info,
const struct gc2235_resolution *res)
struct camera_mipi_info *info,
const struct gc2235_resolution *res)
{
struct v4l2_subdev *sd = i2c_get_clientdata(client);
struct gc2235_device *dev = to_gc2235_sensor(sd);
@ -259,11 +259,11 @@ static int gc2235_get_intg_factor(struct i2c_client *client,
/* get integration time */
buf->coarse_integration_time_min = GC2235_COARSE_INTG_TIME_MIN;
buf->coarse_integration_time_max_margin =
GC2235_COARSE_INTG_TIME_MAX_MARGIN;
GC2235_COARSE_INTG_TIME_MAX_MARGIN;
buf->fine_integration_time_min = GC2235_FINE_INTG_TIME_MIN;
buf->fine_integration_time_max_margin =
GC2235_FINE_INTG_TIME_MAX_MARGIN;
GC2235_FINE_INTG_TIME_MAX_MARGIN;
buf->fine_integration_time_def = GC2235_FINE_INTG_TIME_MIN;
buf->frame_length_lines = res->lines_per_frame;
@ -272,48 +272,48 @@ static int gc2235_get_intg_factor(struct i2c_client *client,
/* get the cropping and output resolution to ISP for this mode. */
ret = gc2235_read_reg(client, GC2235_8BIT,
GC2235_H_CROP_START_H, &reg_val_h);
GC2235_H_CROP_START_H, &reg_val_h);
ret = gc2235_read_reg(client, GC2235_8BIT,
GC2235_H_CROP_START_L, &reg_val);
GC2235_H_CROP_START_L, &reg_val);
if (ret)
return ret;
buf->crop_horizontal_start = (reg_val_h << 8) | reg_val;
ret = gc2235_read_reg(client, GC2235_8BIT,
GC2235_V_CROP_START_H, &reg_val_h);
GC2235_V_CROP_START_H, &reg_val_h);
ret = gc2235_read_reg(client, GC2235_8BIT,
GC2235_V_CROP_START_L, &reg_val);
GC2235_V_CROP_START_L, &reg_val);
if (ret)
return ret;
buf->crop_vertical_start = (reg_val_h << 8) | reg_val;
ret = gc2235_read_reg(client, GC2235_8BIT,
GC2235_H_OUTSIZE_H, &reg_val_h);
GC2235_H_OUTSIZE_H, &reg_val_h);
ret = gc2235_read_reg(client, GC2235_8BIT,
GC2235_H_OUTSIZE_L, &reg_val);
GC2235_H_OUTSIZE_L, &reg_val);
if (ret)
return ret;
buf->output_width = (reg_val_h << 8) | reg_val;
ret = gc2235_read_reg(client, GC2235_8BIT,
GC2235_V_OUTSIZE_H, &reg_val_h);
GC2235_V_OUTSIZE_H, &reg_val_h);
ret = gc2235_read_reg(client, GC2235_8BIT,
GC2235_V_OUTSIZE_L, &reg_val);
GC2235_V_OUTSIZE_L, &reg_val);
if (ret)
return ret;
buf->output_height = (reg_val_h << 8) | reg_val;
buf->crop_horizontal_end = buf->crop_horizontal_start +
buf->output_width - 1;
buf->output_width - 1;
buf->crop_vertical_end = buf->crop_vertical_start +
buf->output_height - 1;
buf->output_height - 1;
ret = gc2235_read_reg(client, GC2235_8BIT,
GC2235_HB_H, &reg_val_h);
GC2235_HB_H, &reg_val_h);
ret = gc2235_read_reg(client, GC2235_8BIT,
GC2235_HB_L, &reg_val);
GC2235_HB_L, &reg_val);
if (ret)
return ret;
@ -322,34 +322,34 @@ static int gc2235_get_intg_factor(struct i2c_client *client,
#endif
ret = gc2235_read_reg(client, GC2235_8BIT,
GC2235_SH_DELAY_H, &reg_val_h);
GC2235_SH_DELAY_H, &reg_val_h);
ret = gc2235_read_reg(client, GC2235_8BIT,
GC2235_SH_DELAY_L, &reg_val);
GC2235_SH_DELAY_L, &reg_val);
#if 0
buf->line_length_pck = buf->output_width + 16 + dummy +
(((u16)reg_val_h << 8) | (u16)reg_val) + 4;
(((u16)reg_val_h << 8) | (u16)reg_val) + 4;
#endif
ret = gc2235_read_reg(client, GC2235_8BIT,
GC2235_VB_H, &reg_val_h);
GC2235_VB_H, &reg_val_h);
ret = gc2235_read_reg(client, GC2235_8BIT,
GC2235_VB_L, &reg_val);
GC2235_VB_L, &reg_val);
if (ret)
return ret;
#if 0
buf->frame_length_lines = buf->output_height + 32 +
(((u16)reg_val_h << 8) | (u16)reg_val);
(((u16)reg_val_h << 8) | (u16)reg_val);
#endif
buf->binning_factor_x = res->bin_factor_x ?
res->bin_factor_x : 1;
res->bin_factor_x : 1;
buf->binning_factor_y = res->bin_factor_y ?
res->bin_factor_y : 1;
res->bin_factor_y : 1;
return 0;
}
static long __gc2235_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
int gain, int digitgain)
int gain, int digitgain)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
@ -361,9 +361,9 @@ static long __gc2235_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
expo_coarse_l = coarse_integration & 0xff;
ret = gc2235_write_reg(client, GC2235_8BIT,
GC2235_EXPOSURE_H, expo_coarse_h);
GC2235_EXPOSURE_H, expo_coarse_h);
ret = gc2235_write_reg(client, GC2235_8BIT,
GC2235_EXPOSURE_L, expo_coarse_l);
GC2235_EXPOSURE_L, expo_coarse_l);
if (gain <= 0x58) {
gain_val = 0x40;
@ -377,15 +377,15 @@ static long __gc2235_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
}
ret = gc2235_write_reg(client, GC2235_8BIT,
GC2235_GLOBAL_GAIN, (u8)gain_val);
GC2235_GLOBAL_GAIN, (u8)gain_val);
ret = gc2235_write_reg(client, GC2235_8BIT,
GC2235_PRE_GAIN, (u8)gain_val2);
GC2235_PRE_GAIN, (u8)gain_val2);
return ret;
}
static int gc2235_set_exposure(struct v4l2_subdev *sd, int exposure,
int gain, int digitgain)
int gain, int digitgain)
{
struct gc2235_device *dev = to_gc2235_sensor(sd);
int ret;
@ -398,7 +398,7 @@ static int gc2235_set_exposure(struct v4l2_subdev *sd, int exposure,
}
static long gc2235_s_exposure(struct v4l2_subdev *sd,
struct atomisp_exposure *exposure)
struct atomisp_exposure *exposure)
{
int exp = exposure->integration_time[0];
int gain = exposure->gain[0];
@ -437,14 +437,14 @@ static int gc2235_q_exposure(struct v4l2_subdev *sd, s32 *value)
/* get exposure */
ret = gc2235_read_reg(client, GC2235_8BIT,
GC2235_EXPOSURE_L,
&reg_v);
GC2235_EXPOSURE_L,
&reg_v);
if (ret)
goto err;
ret = gc2235_read_reg(client, GC2235_8BIT,
GC2235_EXPOSURE_H,
&reg_v2);
GC2235_EXPOSURE_H,
&reg_v2);
if (ret)
goto err;
@ -487,49 +487,49 @@ static const struct v4l2_ctrl_ops ctrl_ops = {
static struct v4l2_ctrl_config gc2235_controls[] = {
{
.ops = &ctrl_ops,
.id = V4L2_CID_EXPOSURE_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "exposure",
.min = 0x0,
.max = 0xffff,
.step = 0x01,
.def = 0x00,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_EXPOSURE_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "exposure",
.min = 0x0,
.max = 0xffff,
.step = 0x01,
.def = 0x00,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FOCAL_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "focal length",
.min = GC2235_FOCAL_LENGTH_DEFAULT,
.max = GC2235_FOCAL_LENGTH_DEFAULT,
.step = 0x01,
.def = GC2235_FOCAL_LENGTH_DEFAULT,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FOCAL_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "focal length",
.min = GC2235_FOCAL_LENGTH_DEFAULT,
.max = GC2235_FOCAL_LENGTH_DEFAULT,
.step = 0x01,
.def = GC2235_FOCAL_LENGTH_DEFAULT,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number",
.min = GC2235_F_NUMBER_DEFAULT,
.max = GC2235_F_NUMBER_DEFAULT,
.step = 0x01,
.def = GC2235_F_NUMBER_DEFAULT,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number",
.min = GC2235_F_NUMBER_DEFAULT,
.max = GC2235_F_NUMBER_DEFAULT,
.step = 0x01,
.def = GC2235_F_NUMBER_DEFAULT,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_RANGE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number range",
.min = GC2235_F_NUMBER_RANGE,
.max = GC2235_F_NUMBER_RANGE,
.step = 0x01,
.def = GC2235_F_NUMBER_RANGE,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_RANGE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number range",
.min = GC2235_F_NUMBER_RANGE,
.max = GC2235_F_NUMBER_RANGE,
.step = 0x01,
.def = GC2235_F_NUMBER_RANGE,
.flags = 0,
},
};
static int __gc2235_init(struct v4l2_subdev *sd)
@ -854,13 +854,13 @@ static int gc2235_detect(struct i2c_client *client)
return -ENODEV;
ret = gc2235_read_reg(client, GC2235_8BIT,
GC2235_SENSOR_ID_H, &high);
GC2235_SENSOR_ID_H, &high);
if (ret) {
dev_err(&client->dev, "sensor_id_high = 0x%x\n", high);
return -ENODEV;
}
ret = gc2235_read_reg(client, GC2235_8BIT,
GC2235_SENSOR_ID_L, &low);
GC2235_SENSOR_ID_L, &low);
id = ((high << 8) | low);
if (id != GC2235_ID) {
@ -900,7 +900,7 @@ static int gc2235_s_config(struct v4l2_subdev *sd,
return -ENODEV;
dev->platform_data =
(struct camera_sensor_platform_data *)platform_data;
(struct camera_sensor_platform_data *)platform_data;
mutex_lock(&dev->input_lock);
/* power off the module, then power on it in future
@ -962,8 +962,8 @@ static int gc2235_g_frame_interval(struct v4l2_subdev *sd,
}
static int gc2235_enum_mbus_code(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_mbus_code_enum *code)
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_mbus_code_enum *code)
{
if (code->index >= MAX_FMTS)
return -EINVAL;
@ -1062,8 +1062,8 @@ static int gc2235_probe(struct i2c_client *client)
v4l2_i2c_subdev_init(&dev->sd, client, &gc2235_ops);
gcpdev = gmin_camera_platform_data(&dev->sd,
ATOMISP_INPUT_FORMAT_RAW_10,
atomisp_bayer_order_grbg);
ATOMISP_INPUT_FORMAT_RAW_10,
atomisp_bayer_order_grbg);
ret = gc2235_s_config(&dev->sd, client->irq, gcpdev);
if (ret)

22
drivers/staging/media/atomisp/i2c/atomisp-libmsrlisthelper.c
View File

@ -47,7 +47,7 @@ struct tbd_data_record_header {
#define TBD_CLASS_DRV_ID 2
static int set_msr_configuration(struct i2c_client *client, uint8_t *bufptr,
unsigned int size)
unsigned int size)
{
/* The configuration data contains any number of sequences where
* the first byte (that is, uint8_t) that marks the number of bytes
@ -87,11 +87,11 @@ static int set_msr_configuration(struct i2c_client *client, uint8_t *bufptr,
}
static int parse_and_apply(struct i2c_client *client, uint8_t *buffer,
unsigned int size)
unsigned int size)
{
u8 *endptr8 = buffer + size;
struct tbd_data_record_header *header =
(struct tbd_data_record_header *)buffer;
(struct tbd_data_record_header *)buffer;
/* There may be any number of datasets present */
unsigned int dataset = 0;
@ -103,7 +103,7 @@ static int parse_and_apply(struct i2c_client *client, uint8_t *buffer,
/* All data should be located within given buffer */
if ((uint8_t *)header + header->data_offset +
header->data_size > endptr8)
header->data_size > endptr8)
return -EINVAL;
/* We have a new valid dataset */
@ -114,16 +114,16 @@ static int parse_and_apply(struct i2c_client *client, uint8_t *buffer,
int ret;
dev_info(&client->dev,
"New MSR data for sensor driver (dataset %02d) size:%d\n",
dataset, header->data_size);
"New MSR data for sensor driver (dataset %02d) size:%d\n",
dataset, header->data_size);
ret = set_msr_configuration(client,
buffer + header->data_offset,
header->data_size);
buffer + header->data_offset,
header->data_size);
if (ret)
return ret;
}
header = (struct tbd_data_record_header *)(buffer +
header->next_offset);
header->next_offset);
} while (header->next_offset);
return 0;
@ -168,7 +168,7 @@ int apply_msr_data(struct i2c_client *client, const struct firmware *fw)
EXPORT_SYMBOL_GPL(apply_msr_data);
int load_msr_list(struct i2c_client *client, char *name,
const struct firmware **fw)
const struct firmware **fw)
{
int ret = request_firmware(fw, name, &client->dev);
@ -179,7 +179,7 @@ int load_msr_list(struct i2c_client *client, char *name,
return ret;
}
dev_info(&client->dev, "Received %lu bytes drv data\n",
(unsigned long)(*fw)->size);
(unsigned long)(*fw)->size);
return 0;
}

182
drivers/staging/media/atomisp/i2c/atomisp-lm3554.c
View File

@ -296,7 +296,7 @@ static int lm3554_g_flash_intensity(struct v4l2_subdev *sd, s32 *val)
struct lm3554 *flash = to_lm3554(sd);
*val = LM3554_VALUE_TO_PERCENT((u32)flash->flash_current,
LM3554_FLASH_STEP);
LM3554_FLASH_STEP);
return 0;
}
@ -318,7 +318,7 @@ static int lm3554_g_torch_intensity(struct v4l2_subdev *sd, s32 *val)
struct lm3554 *flash = to_lm3554(sd);
*val = LM3554_VALUE_TO_PERCENT((u32)flash->torch_current,
LM3554_TORCH_STEP);
LM3554_TORCH_STEP);
return 0;
}
@ -340,7 +340,7 @@ static int lm3554_g_indicator_intensity(struct v4l2_subdev *sd, s32 *val)
struct lm3554 *flash = to_lm3554(sd);
*val = LM3554_VALUE_TO_PERCENT((u32)flash->indicator_current,
LM3554_INDICATOR_STEP);
LM3554_INDICATOR_STEP);
return 0;
}
@ -494,94 +494,94 @@ static const struct v4l2_ctrl_ops ctrl_ops = {
static const struct v4l2_ctrl_config lm3554_controls[] = {
{
.ops = &ctrl_ops,
.id = V4L2_CID_FLASH_TIMEOUT,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Flash Timeout",
.min = 0x0,
.max = LM3554_MAX_TIMEOUT,
.step = 0x01,
.def = LM3554_DEFAULT_TIMEOUT,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FLASH_TIMEOUT,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Flash Timeout",
.min = 0x0,
.max = LM3554_MAX_TIMEOUT,
.step = 0x01,
.def = LM3554_DEFAULT_TIMEOUT,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FLASH_INTENSITY,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Flash Intensity",
.min = LM3554_MIN_PERCENT,
.max = LM3554_MAX_PERCENT,
.step = 0x01,
.def = LM3554_FLASH_DEFAULT_BRIGHTNESS,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FLASH_INTENSITY,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Flash Intensity",
.min = LM3554_MIN_PERCENT,
.max = LM3554_MAX_PERCENT,
.step = 0x01,
.def = LM3554_FLASH_DEFAULT_BRIGHTNESS,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FLASH_TORCH_INTENSITY,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Torch Intensity",
.min = LM3554_MIN_PERCENT,
.max = LM3554_MAX_PERCENT,
.step = 0x01,
.def = LM3554_TORCH_DEFAULT_BRIGHTNESS,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FLASH_TORCH_INTENSITY,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Torch Intensity",
.min = LM3554_MIN_PERCENT,
.max = LM3554_MAX_PERCENT,
.step = 0x01,
.def = LM3554_TORCH_DEFAULT_BRIGHTNESS,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FLASH_INDICATOR_INTENSITY,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Indicator Intensity",
.min = LM3554_MIN_PERCENT,
.max = LM3554_MAX_PERCENT,
.step = 0x01,
.def = LM3554_INDICATOR_DEFAULT_BRIGHTNESS,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FLASH_INDICATOR_INTENSITY,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Indicator Intensity",
.min = LM3554_MIN_PERCENT,
.max = LM3554_MAX_PERCENT,
.step = 0x01,
.def = LM3554_INDICATOR_DEFAULT_BRIGHTNESS,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FLASH_STROBE,
.type = V4L2_CTRL_TYPE_BOOLEAN,
.name = "Flash Strobe",
.min = 0,
.max = 1,
.step = 1,
.def = 0,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FLASH_STROBE,
.type = V4L2_CTRL_TYPE_BOOLEAN,
.name = "Flash Strobe",
.min = 0,
.max = 1,
.step = 1,
.def = 0,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FLASH_MODE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Flash Mode",
.min = 0,
.max = 100,
.step = 1,
.def = ATOMISP_FLASH_MODE_OFF,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FLASH_MODE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Flash Mode",
.min = 0,
.max = 100,
.step = 1,
.def = ATOMISP_FLASH_MODE_OFF,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FLASH_STATUS,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Flash Status",
.min = ATOMISP_FLASH_STATUS_OK,
.max = ATOMISP_FLASH_STATUS_TIMEOUT,
.step = 1,
.def = ATOMISP_FLASH_STATUS_OK,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FLASH_STATUS,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Flash Status",
.min = ATOMISP_FLASH_STATUS_OK,
.max = ATOMISP_FLASH_STATUS_TIMEOUT,
.step = 1,
.def = ATOMISP_FLASH_STATUS_OK,
.flags = 0,
},
#ifndef CSS15
{
.ops = &ctrl_ops,
.id = V4L2_CID_FLASH_STATUS_REGISTER,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Flash Status Register",
.min = 0,
.max = 255,
.step = 1,
.def = 0,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FLASH_STATUS_REGISTER,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Flash Status Register",
.min = 0,
.max = 255,
.step = 1,
.def = 0,
.flags = 0,
},
#endif
};
@ -825,17 +825,17 @@ static void *lm3554_platform_data_func(struct i2c_client *client)
static struct lm3554_platform_data platform_data;
platform_data.gpio_reset =
desc_to_gpio(gpiod_get_index(&client->dev,
NULL, 2, GPIOD_OUT_LOW));
desc_to_gpio(gpiod_get_index(&client->dev,
NULL, 2, GPIOD_OUT_LOW));
platform_data.gpio_strobe =
desc_to_gpio(gpiod_get_index(&client->dev,
NULL, 0, GPIOD_OUT_LOW));
desc_to_gpio(gpiod_get_index(&client->dev,
NULL, 0, GPIOD_OUT_LOW));
platform_data.gpio_torch =
desc_to_gpio(gpiod_get_index(&client->dev,
NULL, 1, GPIOD_OUT_LOW));
desc_to_gpio(gpiod_get_index(&client->dev,
NULL, 1, GPIOD_OUT_LOW));
dev_info(&client->dev, "camera pdata: lm3554: reset: %d strobe %d torch %d\n",
platform_data.gpio_reset, platform_data.gpio_strobe,
platform_data.gpio_torch);
platform_data.gpio_reset, platform_data.gpio_strobe,
platform_data.gpio_torch);
/* Set to TX2 mode, then ENVM/TX2 pin is a power amplifier sync input:
* ENVM/TX pin asserted, flash forced into torch;

324
drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c
View File

@ -62,7 +62,7 @@ mt9m114_read_reg(struct i2c_client *client, u16 data_length, u32 reg, u32 *val)
}
if (data_length != MISENSOR_8BIT && data_length != MISENSOR_16BIT
&& data_length != MISENSOR_32BIT) {
&& data_length != MISENSOR_32BIT) {
v4l2_err(client, "%s error, invalid data length\n", __func__);
return -EINVAL;
}
@ -92,7 +92,7 @@ mt9m114_read_reg(struct i2c_client *client, u16 data_length, u32 reg, u32 *val)
*val = data[1] + (data[0] << 8);
else
*val = data[3] + (data[2] << 8) +
(data[1] << 16) + (data[0] << 24);
(data[1] << 16) + (data[0] << 24);
return 0;
}
@ -116,7 +116,7 @@ mt9m114_write_reg(struct i2c_client *client, u16 data_length, u16 reg, u32 val)
}
if (data_length != MISENSOR_8BIT && data_length != MISENSOR_16BIT
&& data_length != MISENSOR_32BIT) {
&& data_length != MISENSOR_32BIT) {
v4l2_err(client, "%s error, invalid data_length\n", __func__);
return -EINVAL;
}
@ -183,7 +183,7 @@ mt9m114_write_reg(struct i2c_client *client, u16 data_length, u16 reg, u32 val)
*/
static int
misensor_rmw_reg(struct i2c_client *client, u16 data_length, u16 reg,
u32 mask, u32 set)
u32 mask, u32 set)
{
int err;
u32 val;
@ -346,8 +346,8 @@ __mt9m114_write_reg_is_consecutive(struct i2c_client *client,
*
*/
static int mt9m114_write_reg_array(struct i2c_client *client,
const struct misensor_reg *reglist,
int poll)
const struct misensor_reg *reglist,
int poll)
{
const struct misensor_reg *next = reglist;
struct mt9m114_write_ctrl ctrl;
@ -372,7 +372,7 @@ static int mt9m114_write_reg_array(struct i2c_client *client,
err = __mt9m114_flush_reg_array(client, &ctrl);
err |= misensor_rmw_reg(client,
next->length &
~MISENSOR_TOK_RMW,
~MISENSOR_TOK_RMW,
next->reg, next->val,
next->val2);
if (err) {
@ -434,7 +434,7 @@ static int mt9m114_set_suspend(struct v4l2_subdev *sd)
struct i2c_client *client = v4l2_get_subdevdata(sd);
return mt9m114_write_reg_array(client,
mt9m114_standby_reg, POST_POLLING);
mt9m114_standby_reg, POST_POLLING);
}
static int mt9m114_init_common(struct v4l2_subdev *sd)
@ -639,7 +639,7 @@ static int mt9m114_try_res(u32 *w, u32 *h)
int idx = 0;
if ((*w > MT9M114_RES_960P_SIZE_H)
|| (*h > MT9M114_RES_960P_SIZE_V)) {
|| (*h > MT9M114_RES_960P_SIZE_V)) {
*w = MT9M114_RES_960P_SIZE_H;
*h = MT9M114_RES_960P_SIZE_V;
} else {
@ -712,8 +712,8 @@ static int mt9m114_res2size(struct v4l2_subdev *sd, int *h_size, int *v_size)
}
static int mt9m114_get_intg_factor(struct i2c_client *client,
struct camera_mipi_info *info,
const struct mt9m114_res_struct *res)
struct camera_mipi_info *info,
const struct mt9m114_res_struct *res)
{
struct atomisp_sensor_mode_data *buf = &info->data;
u32 reg_val;
@ -723,7 +723,7 @@ static int mt9m114_get_intg_factor(struct i2c_client *client,
return -EINVAL;
ret = mt9m114_read_reg(client, MISENSOR_32BIT,
REG_PIXEL_CLK, &reg_val);
REG_PIXEL_CLK, &reg_val);
if (ret)
return ret;
buf->vt_pix_clk_freq_mhz = reg_val;
@ -731,11 +731,11 @@ static int mt9m114_get_intg_factor(struct i2c_client *client,
/* get integration time */
buf->coarse_integration_time_min = MT9M114_COARSE_INTG_TIME_MIN;
buf->coarse_integration_time_max_margin =
MT9M114_COARSE_INTG_TIME_MAX_MARGIN;
MT9M114_COARSE_INTG_TIME_MAX_MARGIN;
buf->fine_integration_time_min = MT9M114_FINE_INTG_TIME_MIN;
buf->fine_integration_time_max_margin =
MT9M114_FINE_INTG_TIME_MAX_MARGIN;
MT9M114_FINE_INTG_TIME_MAX_MARGIN;
buf->fine_integration_time_def = MT9M114_FINE_INTG_TIME_MIN;
@ -745,63 +745,63 @@ static int mt9m114_get_intg_factor(struct i2c_client *client,
/* get the cropping and output resolution to ISP for this mode. */
ret = mt9m114_read_reg(client, MISENSOR_16BIT,
REG_H_START, &reg_val);
REG_H_START, &reg_val);
if (ret)
return ret;
buf->crop_horizontal_start = reg_val;
ret = mt9m114_read_reg(client, MISENSOR_16BIT,
REG_V_START, &reg_val);
REG_V_START, &reg_val);
if (ret)
return ret;
buf->crop_vertical_start = reg_val;
ret = mt9m114_read_reg(client, MISENSOR_16BIT,
REG_H_END, &reg_val);
REG_H_END, &reg_val);
if (ret)
return ret;
buf->crop_horizontal_end = reg_val;
ret = mt9m114_read_reg(client, MISENSOR_16BIT,
REG_V_END, &reg_val);
REG_V_END, &reg_val);
if (ret)
return ret;
buf->crop_vertical_end = reg_val;
ret = mt9m114_read_reg(client, MISENSOR_16BIT,
REG_WIDTH, &reg_val);
REG_WIDTH, &reg_val);
if (ret)
return ret;
buf->output_width = reg_val;
ret = mt9m114_read_reg(client, MISENSOR_16BIT,
REG_HEIGHT, &reg_val);
REG_HEIGHT, &reg_val);
if (ret)
return ret;
buf->output_height = reg_val;
ret = mt9m114_read_reg(client, MISENSOR_16BIT,
REG_TIMING_HTS, &reg_val);
REG_TIMING_HTS, &reg_val);
if (ret)
return ret;
buf->line_length_pck = reg_val;
ret = mt9m114_read_reg(client, MISENSOR_16BIT,
REG_TIMING_VTS, &reg_val);
REG_TIMING_VTS, &reg_val);
if (ret)
return ret;
buf->frame_length_lines = reg_val;
buf->binning_factor_x = res->bin_factor_x ?
res->bin_factor_x : 1;
res->bin_factor_x : 1;
buf->binning_factor_y = res->bin_factor_y ?
res->bin_factor_y : 1;
res->bin_factor_y : 1;
return 0;
}
static int mt9m114_get_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *format)
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *format)
{
struct v4l2_mbus_framefmt *fmt = &format->format;
int width, height;
@ -860,18 +860,18 @@ static int mt9m114_set_fmt(struct v4l2_subdev *sd,
case MT9M114_RES_736P:
ret = mt9m114_write_reg_array(c, mt9m114_736P_init, NO_POLLING);
ret += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE,
MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET);
MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET);
break;
case MT9M114_RES_864P:
ret = mt9m114_write_reg_array(c, mt9m114_864P_init, NO_POLLING);
ret += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE,
MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET);
MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET);
break;
case MT9M114_RES_960P:
ret = mt9m114_write_reg_array(c, mt9m114_976P_init, NO_POLLING);
/* set sensor read_mode to Normal */
ret += misensor_rmw_reg(c, MISENSOR_16BIT, MISENSOR_READ_MODE,
MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET);
MISENSOR_R_MODE_MASK, MISENSOR_NORMAL_SET);
break;
default:
v4l2_err(sd, "set resolution: %d failed!\n", res_index->res);
@ -920,7 +920,7 @@ static int mt9m114_set_fmt(struct v4l2_subdev *sd,
}
}
ret = mt9m114_get_intg_factor(c, mt9m114_info,
&mt9m114_res[res_index->res]);
&mt9m114_res[res_index->res]);
if (ret) {
dev_err(&c->dev, "failed to get integration_factor\n");
return -EINVAL;
@ -954,8 +954,8 @@ static int mt9m114_g_fnumber(struct v4l2_subdev *sd, s32 *val)
static int mt9m114_g_fnumber_range(struct v4l2_subdev *sd, s32 *val)
{
*val = (MT9M114_F_NUMBER_DEFAULT_NUM << 24) |
(MT9M114_F_NUMBER_DEM << 16) |
(MT9M114_F_NUMBER_DEFAULT_NUM << 8) | MT9M114_F_NUMBER_DEM;
(MT9M114_F_NUMBER_DEM << 16) |
(MT9M114_F_NUMBER_DEFAULT_NUM << 8) | MT9M114_F_NUMBER_DEM;
return 0;
}
@ -967,7 +967,7 @@ static int mt9m114_g_hflip(struct v4l2_subdev *sd, s32 *val)
u32 data;
ret = mt9m114_read_reg(c, MISENSOR_16BIT,
(u32)MISENSOR_READ_MODE, &data);
(u32)MISENSOR_READ_MODE, &data);
if (ret)
return ret;
*val = !!(data & MISENSOR_HFLIP_MASK);
@ -982,7 +982,7 @@ static int mt9m114_g_vflip(struct v4l2_subdev *sd, s32 *val)
u32 data;
ret = mt9m114_read_reg(c, MISENSOR_16BIT,
(u32)MISENSOR_READ_MODE, &data);
(u32)MISENSOR_READ_MODE, &data);
if (ret)
return ret;
*val = !!(data & MISENSOR_VFLIP_MASK);
@ -1003,8 +1003,8 @@ static long mt9m114_s_exposure(struct v4l2_subdev *sd,
u32 AnalogGainToWrite = 0;
dev_dbg(&client->dev, "%s(0x%X 0x%X 0x%X)\n", __func__,
exposure->integration_time[0], exposure->gain[0],
exposure->gain[1]);
exposure->integration_time[0], exposure->gain[0],
exposure->gain[1]);
coarse_integration = exposure->integration_time[0];
/* fine_integration = ExposureTime.FineIntegrationTime; */
@ -1036,7 +1036,7 @@ static long mt9m114_s_exposure(struct v4l2_subdev *sd,
/* 3A provide real exposure time.
should not translate to any value here. */
ret = mt9m114_write_reg(client, MISENSOR_16BIT,
REG_EXPO_COARSE, (u16)(coarse_integration));
REG_EXPO_COARSE, (u16)(coarse_integration));
if (ret) {
v4l2_err(client, "%s: fail to set exposure time\n", __func__);
return -EINVAL;
@ -1072,10 +1072,10 @@ static long mt9m114_s_exposure(struct v4l2_subdev *sd,
(u16)((DigitalGain << 12) | AnalogGainToWrite); */
AnalogGainToWrite = (u16)((DigitalGain << 12) | (u16)AnalogGain);
ret = mt9m114_write_reg(client, MISENSOR_16BIT,
REG_GAIN, AnalogGainToWrite);
REG_GAIN, AnalogGainToWrite);
if (ret) {
v4l2_err(client, "%s: fail to set AnalogGainToWrite\n",
__func__);
__func__);
return -EINVAL;
}
@ -1135,7 +1135,7 @@ static int mt9m114_s_exposure_metering(struct v4l2_subdev *sd, s32 val)
switch (val) {
case V4L2_EXPOSURE_METERING_SPOT:
ret = mt9m114_write_reg_array(client, mt9m114_exp_average,
NO_POLLING);
NO_POLLING);
if (ret) {
dev_err(&client->dev, "write exp_average reg err.\n");
return ret;
@ -1144,7 +1144,7 @@ static int mt9m114_s_exposure_metering(struct v4l2_subdev *sd, s32 val)
case V4L2_EXPOSURE_METERING_CENTER_WEIGHTED:
default:
ret = mt9m114_write_reg_array(client, mt9m114_exp_center,
NO_POLLING);
NO_POLLING);
if (ret) {
dev_err(&client->dev, "write exp_default reg err");
return ret;
@ -1309,7 +1309,7 @@ static int mt9m114_g_3a_lock(struct v4l2_subdev *sd, s32 *val)
{
if (aaalock)
return V4L2_LOCK_EXPOSURE | V4L2_LOCK_WHITE_BALANCE
| V4L2_LOCK_FOCUS;
| V4L2_LOCK_FOCUS;
return 0;
}
@ -1404,137 +1404,137 @@ static const struct v4l2_ctrl_ops ctrl_ops = {
static struct v4l2_ctrl_config mt9m114_controls[] = {
{
.ops = &ctrl_ops,
.id = V4L2_CID_VFLIP,
.name = "Image v-Flip",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = 0,
.max = 1,
.step = 1,
.def = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_VFLIP,
.name = "Image v-Flip",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = 0,
.max = 1,
.step = 1,
.def = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_HFLIP,
.name = "Image h-Flip",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = 0,
.max = 1,
.step = 1,
.def = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_HFLIP,
.name = "Image h-Flip",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = 0,
.max = 1,
.step = 1,
.def = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FOCAL_ABSOLUTE,
.name = "focal length",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = MT9M114_FOCAL_LENGTH_DEFAULT,
.max = MT9M114_FOCAL_LENGTH_DEFAULT,
.step = 1,
.def = MT9M114_FOCAL_LENGTH_DEFAULT,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FOCAL_ABSOLUTE,
.name = "focal length",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = MT9M114_FOCAL_LENGTH_DEFAULT,
.max = MT9M114_FOCAL_LENGTH_DEFAULT,
.step = 1,
.def = MT9M114_FOCAL_LENGTH_DEFAULT,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_ABSOLUTE,
.name = "f-number",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = MT9M114_F_NUMBER_DEFAULT,
.max = MT9M114_F_NUMBER_DEFAULT,
.step = 1,
.def = MT9M114_F_NUMBER_DEFAULT,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_ABSOLUTE,
.name = "f-number",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = MT9M114_F_NUMBER_DEFAULT,
.max = MT9M114_F_NUMBER_DEFAULT,
.step = 1,
.def = MT9M114_F_NUMBER_DEFAULT,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_RANGE,
.name = "f-number range",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = MT9M114_F_NUMBER_RANGE,
.max = MT9M114_F_NUMBER_RANGE,
.step = 1,
.def = MT9M114_F_NUMBER_RANGE,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_RANGE,
.name = "f-number range",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = MT9M114_F_NUMBER_RANGE,
.max = MT9M114_F_NUMBER_RANGE,
.step = 1,
.def = MT9M114_F_NUMBER_RANGE,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_EXPOSURE_ABSOLUTE,
.name = "exposure",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = 0,
.max = 0xffff,
.step = 1,
.def = 0,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_EXPOSURE_ABSOLUTE,
.name = "exposure",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = 0,
.max = 0xffff,
.step = 1,
.def = 0,
.flags = 0,
},
#ifndef CSS15
{
.ops = &ctrl_ops,
.id = V4L2_CID_EXPOSURE_ZONE_NUM,
.name = "one-time exposure zone number",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = 0,
.max = 0xffff,
.step = 1,
.def = 0,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_EXPOSURE_ZONE_NUM,
.name = "one-time exposure zone number",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = 0,
.max = 0xffff,
.step = 1,
.def = 0,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_EXPOSURE_METERING,
.name = "metering",
.type = V4L2_CTRL_TYPE_MENU,
.min = 0,
.max = 3,
.step = 0,
.def = 1,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_EXPOSURE_METERING,
.name = "metering",
.type = V4L2_CTRL_TYPE_MENU,
.min = 0,
.max = 3,
.step = 0,
.def = 1,
.flags = 0,
},
#endif
{
.ops = &ctrl_ops,
.id = V4L2_CID_BIN_FACTOR_HORZ,
.name = "horizontal binning factor",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = 0,
.max = MT9M114_BIN_FACTOR_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_BIN_FACTOR_HORZ,
.name = "horizontal binning factor",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = 0,
.max = MT9M114_BIN_FACTOR_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_BIN_FACTOR_VERT,
.name = "vertical binning factor",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = 0,
.max = MT9M114_BIN_FACTOR_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_BIN_FACTOR_VERT,
.name = "vertical binning factor",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = 0,
.max = MT9M114_BIN_FACTOR_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_EXPOSURE,
.name = "exposure biasx",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = -2,
.max = 2,
.step = 1,
.def = 0,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_EXPOSURE,
.name = "exposure biasx",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = -2,
.max = 2,
.step = 1,
.def = 0,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_3A_LOCK,
.name = "3a lock",
.type = V4L2_CTRL_TYPE_BITMASK,
.min = 0,
.max = V4L2_LOCK_EXPOSURE | V4L2_LOCK_WHITE_BALANCE | V4L2_LOCK_FOCUS,
.step = 1,
.def = 0,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_3A_LOCK,
.name = "3a lock",
.type = V4L2_CTRL_TYPE_BITMASK,
.min = 0,
.max = V4L2_LOCK_EXPOSURE | V4L2_LOCK_WHITE_BALANCE | V4L2_LOCK_FOCUS,
.step = 1,
.def = 0,
.flags = 0,
},
};
static int mt9m114_detect(struct mt9m114_device *dev, struct i2c_client *client)
@ -1686,7 +1686,7 @@ static int mt9m114_t_vflip(struct v4l2_subdev *sd, int value)
}
static int mt9m114_g_frame_interval(struct v4l2_subdev *sd,
struct v4l2_subdev_frame_interval *interval)
struct v4l2_subdev_frame_interval *interval)
{
struct mt9m114_device *dev = to_mt9m114_sensor(sd);
@ -1705,7 +1705,7 @@ static int mt9m114_s_stream(struct v4l2_subdev *sd, int enable)
if (enable) {
ret = mt9m114_write_reg_array(c, mt9m114_chgstat_reg,
POST_POLLING);
POST_POLLING);
if (ret < 0)
return ret;

266
drivers/staging/media/atomisp/i2c/atomisp-ov2680.c
View File

@ -58,7 +58,7 @@ static int ov2680_read_reg(struct i2c_client *client,
}
if (data_length != OV2680_8BIT && data_length != OV2680_16BIT
&& data_length != OV2680_32BIT) {
&& data_length != OV2680_32BIT) {
dev_err(&client->dev, "%s error, invalid data length\n",
__func__);
return -EINVAL;
@ -117,7 +117,7 @@ static int ov2680_i2c_write(struct i2c_client *client, u16 len, u8 *data)
}
static int ov2680_write_reg(struct i2c_client *client, u16 data_length,
u16 reg, u16 val)
u16 reg, u16 val)
{
int ret;
unsigned char data[4] = {0};
@ -220,8 +220,8 @@ static int __ov2680_buf_reg_array(struct i2c_client *client,
}
static int __ov2680_write_reg_is_consecutive(struct i2c_client *client,
struct ov2680_write_ctrl *ctrl,
const struct ov2680_reg *next)
struct ov2680_write_ctrl *ctrl,
const struct ov2680_reg *next)
{
if (ctrl->index == 0)
return 1;
@ -251,9 +251,10 @@ static int ov2680_write_reg_array(struct i2c_client *client,
* If next address is not consecutive, data needs to be
* flushed before proceed.
*/
dev_dbg(&client->dev, "+++ov2680_write_reg_array reg=%x->%x\n", next->reg, next->val);
dev_dbg(&client->dev, "+++ov2680_write_reg_array reg=%x->%x\n", next->reg,
next->val);
if (!__ov2680_write_reg_is_consecutive(client, &ctrl,
next)) {
next)) {
err = __ov2680_flush_reg_array(client, &ctrl);
if (err)
return err;
@ -261,7 +262,7 @@ static int ov2680_write_reg_array(struct i2c_client *client,
err = __ov2680_buf_reg_array(client, &ctrl, next);
if (err) {
dev_err(&client->dev, "%s: write error, aborted\n",
__func__);
__func__);
return err;
}
break;
@ -288,8 +289,8 @@ static int ov2680_g_fnumber(struct v4l2_subdev *sd, s32 *val)
static int ov2680_g_fnumber_range(struct v4l2_subdev *sd, s32 *val)
{
*val = (OV2680_F_NUMBER_DEFAULT_NUM << 24) |
(OV2680_F_NUMBER_DEM << 16) |
(OV2680_F_NUMBER_DEFAULT_NUM << 8) | OV2680_F_NUMBER_DEM;
(OV2680_F_NUMBER_DEM << 16) |
(OV2680_F_NUMBER_DEFAULT_NUM << 8) | OV2680_F_NUMBER_DEM;
return 0;
}
@ -315,8 +316,8 @@ static int ov2680_g_bin_factor_y(struct v4l2_subdev *sd, s32 *val)
}
static int ov2680_get_intg_factor(struct i2c_client *client,
struct camera_mipi_info *info,
const struct ov2680_resolution *res)
struct camera_mipi_info *info,
const struct ov2680_resolution *res)
{
struct v4l2_subdev *sd = i2c_get_clientdata(client);
struct ov2680_device *dev = to_ov2680_sensor(sd);
@ -338,11 +339,11 @@ static int ov2680_get_intg_factor(struct i2c_client *client,
/* get integration time */
buf->coarse_integration_time_min = OV2680_COARSE_INTG_TIME_MIN;
buf->coarse_integration_time_max_margin =
OV2680_COARSE_INTG_TIME_MAX_MARGIN;
OV2680_COARSE_INTG_TIME_MAX_MARGIN;
buf->fine_integration_time_min = OV2680_FINE_INTG_TIME_MIN;
buf->fine_integration_time_max_margin =
OV2680_FINE_INTG_TIME_MAX_MARGIN;
OV2680_FINE_INTG_TIME_MAX_MARGIN;
buf->fine_integration_time_def = OV2680_FINE_INTG_TIME_MIN;
buf->frame_length_lines = res->lines_per_frame;
@ -351,50 +352,50 @@ static int ov2680_get_intg_factor(struct i2c_client *client,
/* get the cropping and output resolution to ISP for this mode. */
ret = ov2680_read_reg(client, OV2680_16BIT,
OV2680_HORIZONTAL_START_H, &reg_val);
OV2680_HORIZONTAL_START_H, &reg_val);
if (ret)
return ret;
buf->crop_horizontal_start = reg_val;
ret = ov2680_read_reg(client, OV2680_16BIT,
OV2680_VERTICAL_START_H, &reg_val);
OV2680_VERTICAL_START_H, &reg_val);
if (ret)
return ret;
buf->crop_vertical_start = reg_val;
ret = ov2680_read_reg(client, OV2680_16BIT,
OV2680_HORIZONTAL_END_H, &reg_val);
OV2680_HORIZONTAL_END_H, &reg_val);
if (ret)
return ret;
buf->crop_horizontal_end = reg_val;
ret = ov2680_read_reg(client, OV2680_16BIT,
OV2680_VERTICAL_END_H, &reg_val);
OV2680_VERTICAL_END_H, &reg_val);
if (ret)
return ret;
buf->crop_vertical_end = reg_val;
ret = ov2680_read_reg(client, OV2680_16BIT,
OV2680_HORIZONTAL_OUTPUT_SIZE_H, &reg_val);
OV2680_HORIZONTAL_OUTPUT_SIZE_H, &reg_val);
if (ret)
return ret;
buf->output_width = reg_val;
ret = ov2680_read_reg(client, OV2680_16BIT,
OV2680_VERTICAL_OUTPUT_SIZE_H, &reg_val);
OV2680_VERTICAL_OUTPUT_SIZE_H, &reg_val);
if (ret)
return ret;
buf->output_height = reg_val;
buf->binning_factor_x = res->bin_factor_x ?
(res->bin_factor_x * 2) : 1;
(res->bin_factor_x * 2) : 1;
buf->binning_factor_y = res->bin_factor_y ?
(res->bin_factor_y * 2) : 1;
(res->bin_factor_y * 2) : 1;
return 0;
}
static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
int gain, int digitgain)
int gain, int digitgain)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
@ -410,7 +411,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
/* group hold */
ret = ov2680_write_reg(client, OV2680_8BIT,
OV2680_GROUP_ACCESS, 0x00);
OV2680_GROUP_ACCESS, 0x00);
if (ret) {
dev_err(&client->dev, "%s: write %x error, aborted\n",
__func__, OV2680_GROUP_ACCESS);
@ -466,7 +467,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
/* Digital gain */
if (digitgain) {
ret = ov2680_write_reg(client, OV2680_16BIT,
OV2680_MWB_RED_GAIN_H, digitgain);
OV2680_MWB_RED_GAIN_H, digitgain);
if (ret) {
dev_err(&client->dev, "%s: write %x error, aborted\n",
__func__, OV2680_MWB_RED_GAIN_H);
@ -474,7 +475,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
}
ret = ov2680_write_reg(client, OV2680_16BIT,
OV2680_MWB_GREEN_GAIN_H, digitgain);
OV2680_MWB_GREEN_GAIN_H, digitgain);
if (ret) {
dev_err(&client->dev, "%s: write %x error, aborted\n",
__func__, OV2680_MWB_RED_GAIN_H);
@ -482,7 +483,7 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
}
ret = ov2680_write_reg(client, OV2680_16BIT,
OV2680_MWB_BLUE_GAIN_H, digitgain);
OV2680_MWB_BLUE_GAIN_H, digitgain);
if (ret) {
dev_err(&client->dev, "%s: write %x error, aborted\n",
__func__, OV2680_MWB_RED_GAIN_H);
@ -498,14 +499,14 @@ static long __ov2680_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
/* Delay launch group */
ret = ov2680_write_reg(client, OV2680_8BIT,
OV2680_GROUP_ACCESS, 0xa0);
OV2680_GROUP_ACCESS, 0xa0);
if (ret)
return ret;
return ret;
}
static int ov2680_set_exposure(struct v4l2_subdev *sd, int exposure,
int gain, int digitgain)
int gain, int digitgain)
{
struct ov2680_device *dev = to_ov2680_sensor(sd);
int ret;
@ -518,7 +519,7 @@ static int ov2680_set_exposure(struct v4l2_subdev *sd, int exposure,
}
static long ov2680_s_exposure(struct v4l2_subdev *sd,
struct atomisp_exposure *exposure)
struct atomisp_exposure *exposure)
{
u16 coarse_itg = exposure->integration_time[0];
u16 analog_gain = exposure->gain[0];
@ -559,21 +560,21 @@ static int ov2680_q_exposure(struct v4l2_subdev *sd, s32 *value)
/* get exposure */
ret = ov2680_read_reg(client, OV2680_8BIT,
OV2680_EXPOSURE_L,
&reg_v);
OV2680_EXPOSURE_L,
&reg_v);
if (ret)
goto err;
ret = ov2680_read_reg(client, OV2680_8BIT,
OV2680_EXPOSURE_M,
&reg_v2);
OV2680_EXPOSURE_M,
&reg_v2);
if (ret)
goto err;
reg_v += reg_v2 << 8;
ret = ov2680_read_reg(client, OV2680_8BIT,
OV2680_EXPOSURE_H,
&reg_v2);
OV2680_EXPOSURE_H,
&reg_v2);
if (ret)
goto err;
@ -616,15 +617,16 @@ static int ov2680_v_flip(struct v4l2_subdev *sd, s32 value)
val &= ~OV2680_FLIP_MIRROR_BIT_ENABLE;
}
ret = ov2680_write_reg(client, OV2680_8BIT,
OV2680_FLIP_REG, val);
OV2680_FLIP_REG, val);
if (ret)
return ret;
index = (v_flag > 0 ? OV2680_FLIP_BIT : 0) | (h_flag > 0 ? OV2680_MIRROR_BIT : 0);
index = (v_flag > 0 ? OV2680_FLIP_BIT : 0) | (h_flag > 0 ? OV2680_MIRROR_BIT :
0);
ov2680_info = v4l2_get_subdev_hostdata(sd);
if (ov2680_info) {
ov2680_info->raw_bayer_order = ov2680_bayer_order_mapping[index];
dev->format.code = ov2680_translate_bayer_order(
ov2680_info->raw_bayer_order);
ov2680_info->raw_bayer_order);
}
return ret;
}
@ -649,15 +651,16 @@ static int ov2680_h_flip(struct v4l2_subdev *sd, s32 value)
val &= ~OV2680_FLIP_MIRROR_BIT_ENABLE;
}
ret = ov2680_write_reg(client, OV2680_8BIT,
OV2680_MIRROR_REG, val);
OV2680_MIRROR_REG, val);
if (ret)
return ret;
index = (v_flag > 0 ? OV2680_FLIP_BIT : 0) | (h_flag > 0 ? OV2680_MIRROR_BIT : 0);
index = (v_flag > 0 ? OV2680_FLIP_BIT : 0) | (h_flag > 0 ? OV2680_MIRROR_BIT :
0);
ov2680_info = v4l2_get_subdev_hostdata(sd);
if (ov2680_info) {
ov2680_info->raw_bayer_order = ov2680_bayer_order_mapping[index];
dev->format.code = ov2680_translate_bayer_order(
ov2680_info->raw_bayer_order);
ov2680_info->raw_bayer_order);
}
return ret;
}
@ -725,91 +728,91 @@ static const struct v4l2_ctrl_ops ctrl_ops = {
static const struct v4l2_ctrl_config ov2680_controls[] = {
{
.ops = &ctrl_ops,
.id = V4L2_CID_EXPOSURE_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "exposure",
.min = 0x0,
.max = 0xffff,
.step = 0x01,
.def = 0x00,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_EXPOSURE_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "exposure",
.min = 0x0,
.max = 0xffff,
.step = 0x01,
.def = 0x00,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FOCAL_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "focal length",
.min = OV2680_FOCAL_LENGTH_DEFAULT,
.max = OV2680_FOCAL_LENGTH_DEFAULT,
.step = 0x01,
.def = OV2680_FOCAL_LENGTH_DEFAULT,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FOCAL_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "focal length",
.min = OV2680_FOCAL_LENGTH_DEFAULT,
.max = OV2680_FOCAL_LENGTH_DEFAULT,
.step = 0x01,
.def = OV2680_FOCAL_LENGTH_DEFAULT,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number",
.min = OV2680_F_NUMBER_DEFAULT,
.max = OV2680_F_NUMBER_DEFAULT,
.step = 0x01,
.def = OV2680_F_NUMBER_DEFAULT,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number",
.min = OV2680_F_NUMBER_DEFAULT,
.max = OV2680_F_NUMBER_DEFAULT,
.step = 0x01,
.def = OV2680_F_NUMBER_DEFAULT,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_RANGE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number range",
.min = OV2680_F_NUMBER_RANGE,
.max = OV2680_F_NUMBER_RANGE,
.step = 0x01,
.def = OV2680_F_NUMBER_RANGE,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_RANGE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number range",
.min = OV2680_F_NUMBER_RANGE,
.max = OV2680_F_NUMBER_RANGE,
.step = 0x01,
.def = OV2680_F_NUMBER_RANGE,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_BIN_FACTOR_HORZ,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "horizontal binning factor",
.min = 0,
.max = OV2680_BIN_FACTOR_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_BIN_FACTOR_HORZ,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "horizontal binning factor",
.min = 0,
.max = OV2680_BIN_FACTOR_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_BIN_FACTOR_VERT,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "vertical binning factor",
.min = 0,
.max = OV2680_BIN_FACTOR_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_BIN_FACTOR_VERT,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "vertical binning factor",
.min = 0,
.max = OV2680_BIN_FACTOR_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_VFLIP,
.type = V4L2_CTRL_TYPE_BOOLEAN,
.name = "Flip",
.min = 0,
.max = 1,
.step = 1,
.def = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_VFLIP,
.type = V4L2_CTRL_TYPE_BOOLEAN,
.name = "Flip",
.min = 0,
.max = 1,
.step = 1,
.def = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_HFLIP,
.type = V4L2_CTRL_TYPE_BOOLEAN,
.name = "Mirror",
.min = 0,
.max = 1,
.step = 1,
.def = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_HFLIP,
.type = V4L2_CTRL_TYPE_BOOLEAN,
.name = "Mirror",
.min = 0,
.max = 1,
.step = 1,
.def = 0,
},
};
static int ov2680_init_registers(struct v4l2_subdev *sd)
@ -1009,7 +1012,7 @@ static int distance(struct ov2680_resolution *res, u32 w, u32 h)
match = abs(((w_ratio << 13) / h_ratio) - 8192);
if ((w_ratio < 8192) || (h_ratio < 8192) ||
(match > LARGEST_ALLOWED_RATIO_MISMATCH))
(match > LARGEST_ALLOWED_RATIO_MISMATCH))
return -1;
return w_ratio + h_ratio;
@ -1091,10 +1094,10 @@ static int ov2680_set_fmt(struct v4l2_subdev *sd,
cfg->try_fmt = *fmt;
mutex_unlock(&dev->input_lock);
return 0;
}
}
dev->fmt_idx = get_resolution_index(fmt->width, fmt->height);
dev_dbg(&client->dev, "+++++get_resolution_index=%d+++++l\n",
dev->fmt_idx);
dev->fmt_idx);
if (dev->fmt_idx == -1) {
dev_err(&client->dev, "get resolution fail\n");
mutex_unlock(&dev->input_lock);
@ -1103,7 +1106,7 @@ static int ov2680_set_fmt(struct v4l2_subdev *sd,
v4l2_info(client, "__s_mbus_fmt i=%d, w=%d, h=%d\n", dev->fmt_idx,
fmt->width, fmt->height);
dev_dbg(&client->dev, "__s_mbus_fmt i=%d, w=%d, h=%d\n",
dev->fmt_idx, fmt->width, fmt->height);
dev->fmt_idx, fmt->width, fmt->height);
ret = ov2680_write_reg_array(client, ov2680_res[dev->fmt_idx].regs);
if (ret)
@ -1167,13 +1170,13 @@ static int ov2680_detect(struct i2c_client *client)
return -ENODEV;
ret = ov2680_read_reg(client, OV2680_8BIT,
OV2680_SC_CMMN_CHIP_ID_H, &high);
OV2680_SC_CMMN_CHIP_ID_H, &high);
if (ret) {
dev_err(&client->dev, "sensor_id_high = 0x%x\n", high);
return -ENODEV;
}
ret = ov2680_read_reg(client, OV2680_8BIT,
OV2680_SC_CMMN_CHIP_ID_L, &low);
OV2680_SC_CMMN_CHIP_ID_L, &low);
id = ((((u16)high) << 8) | (u16)low);
if (id != OV2680_ID) {
@ -1182,7 +1185,7 @@ static int ov2680_detect(struct i2c_client *client)
}
ret = ov2680_read_reg(client, OV2680_8BIT,
OV2680_SC_CMMN_SUB_ID, &high);
OV2680_SC_CMMN_SUB_ID, &high);
revision = (u8)high & 0x0f;
dev_info(&client->dev, "sensor_revision id = 0x%x, rev= %d\n",
@ -1204,8 +1207,8 @@ static int ov2680_s_stream(struct v4l2_subdev *sd, int enable)
dev_dbg(&client->dev, "ov2680_s_stream off\n");
ret = ov2680_write_reg(client, OV2680_8BIT, OV2680_SW_STREAM,
enable ? OV2680_START_STREAMING :
OV2680_STOP_STREAMING);
enable ? OV2680_START_STREAMING :
OV2680_STOP_STREAMING);
#if 0
/* restore settings */
ov2680_res = ov2680_res_preview;
@ -1232,7 +1235,7 @@ static int ov2680_s_config(struct v4l2_subdev *sd,
return -ENODEV;
dev->platform_data =
(struct camera_sensor_platform_data *)platform_data;
(struct camera_sensor_platform_data *)platform_data;
mutex_lock(&dev->input_lock);
/* power off the module, then power on it in future
@ -1338,7 +1341,7 @@ static const struct v4l2_subdev_video_ops ov2680_video_ops = {
};
static const struct v4l2_subdev_sensor_ops ov2680_sensor_ops = {
.g_skip_frames = ov2680_g_skip_frames,
.g_skip_frames = ov2680_g_skip_frames,
};
static const struct v4l2_subdev_core_ops ov2680_core_ops = {
@ -1435,8 +1438,7 @@ static int ov2680_probe(struct i2c_client *client)
dev->sd.ctrl_handler = &dev->ctrl_handler;
ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad);
if (ret)
{
if (ret) {
ov2680_remove(client);
dev_dbg(&client->dev, "+++ remove ov2680\n");
}

202
drivers/staging/media/atomisp/i2c/atomisp-ov2722.c
View File

@ -49,7 +49,7 @@ static int ov2722_read_reg(struct i2c_client *client,
}
if (data_length != OV2722_8BIT && data_length != OV2722_16BIT
&& data_length != OV2722_32BIT) {
&& data_length != OV2722_32BIT) {
dev_err(&client->dev, "%s error, invalid data length\n",
__func__);
return -EINVAL;
@ -108,7 +108,7 @@ static int ov2722_i2c_write(struct i2c_client *client, u16 len, u8 *data)
}
static int ov2722_write_reg(struct i2c_client *client, u16 data_length,
u16 reg, u16 val)
u16 reg, u16 val)
{
int ret;
unsigned char data[4] = {0};
@ -211,8 +211,8 @@ static int __ov2722_buf_reg_array(struct i2c_client *client,
}
static int __ov2722_write_reg_is_consecutive(struct i2c_client *client,
struct ov2722_write_ctrl *ctrl,
const struct ov2722_reg *next)
struct ov2722_write_ctrl *ctrl,
const struct ov2722_reg *next)
{
if (ctrl->index == 0)
return 1;
@ -242,7 +242,7 @@ static int ov2722_write_reg_array(struct i2c_client *client,
* flushed before proceed.
*/
if (!__ov2722_write_reg_is_consecutive(client, &ctrl,
next)) {
next)) {
err = __ov2722_flush_reg_array(client, &ctrl);
if (err)
return err;
@ -250,7 +250,7 @@ static int ov2722_write_reg_array(struct i2c_client *client,
err = __ov2722_buf_reg_array(client, &ctrl, next);
if (err) {
dev_err(&client->dev, "%s: write error, aborted\n",
__func__);
__func__);
return err;
}
break;
@ -276,14 +276,14 @@ static int ov2722_g_fnumber(struct v4l2_subdev *sd, s32 *val)
static int ov2722_g_fnumber_range(struct v4l2_subdev *sd, s32 *val)
{
*val = (OV2722_F_NUMBER_DEFAULT_NUM << 24) |
(OV2722_F_NUMBER_DEM << 16) |
(OV2722_F_NUMBER_DEFAULT_NUM << 8) | OV2722_F_NUMBER_DEM;
(OV2722_F_NUMBER_DEM << 16) |
(OV2722_F_NUMBER_DEFAULT_NUM << 8) | OV2722_F_NUMBER_DEM;
return 0;
}
static int ov2722_get_intg_factor(struct i2c_client *client,
struct camera_mipi_info *info,
const struct ov2722_resolution *res)
struct camera_mipi_info *info,
const struct ov2722_resolution *res)
{
struct v4l2_subdev *sd = i2c_get_clientdata(client);
struct ov2722_device *dev = NULL;
@ -304,17 +304,17 @@ static int ov2722_get_intg_factor(struct i2c_client *client,
/* pixel clock calculattion */
ret = ov2722_read_reg(client, OV2722_8BIT,
OV2722_SC_CMMN_PLL_CTRL3, &pre_pll_clk_div);
OV2722_SC_CMMN_PLL_CTRL3, &pre_pll_clk_div);
if (ret)
return ret;
ret = ov2722_read_reg(client, OV2722_8BIT,
OV2722_SC_CMMN_PLL_MULTIPLIER, &pll_multiplier);
OV2722_SC_CMMN_PLL_MULTIPLIER, &pll_multiplier);
if (ret)
return ret;
ret = ov2722_read_reg(client, OV2722_8BIT,
OV2722_SC_CMMN_PLL_DEBUG_OPT, &op_pix_clk_div);
OV2722_SC_CMMN_PLL_DEBUG_OPT, &op_pix_clk_div);
if (ret)
return ret;
@ -325,7 +325,7 @@ static int ov2722_get_intg_factor(struct i2c_client *client,
pll_multiplier = pll_multiplier & 0x7f;
op_pix_clk_div = op_pix_clk_div & 0x03;
pix_clk_freq_hz = ext_clk_freq_hz / pre_pll_clk_div * pll_multiplier
* op_pix_clk_div / pll_invariant_div;
* op_pix_clk_div / pll_invariant_div;
dev->vt_pix_clk_freq_mhz = pix_clk_freq_hz;
buf->vt_pix_clk_freq_mhz = pix_clk_freq_hz;
@ -333,11 +333,11 @@ static int ov2722_get_intg_factor(struct i2c_client *client,
/* get integration time */
buf->coarse_integration_time_min = OV2722_COARSE_INTG_TIME_MIN;
buf->coarse_integration_time_max_margin =
OV2722_COARSE_INTG_TIME_MAX_MARGIN;
OV2722_COARSE_INTG_TIME_MAX_MARGIN;
buf->fine_integration_time_min = OV2722_FINE_INTG_TIME_MIN;
buf->fine_integration_time_max_margin =
OV2722_FINE_INTG_TIME_MAX_MARGIN;
OV2722_FINE_INTG_TIME_MAX_MARGIN;
buf->fine_integration_time_def = OV2722_FINE_INTG_TIME_MIN;
buf->frame_length_lines = res->lines_per_frame;
@ -346,50 +346,50 @@ static int ov2722_get_intg_factor(struct i2c_client *client,
/* get the cropping and output resolution to ISP for this mode. */
ret = ov2722_read_reg(client, OV2722_16BIT,
OV2722_H_CROP_START_H, &reg_val);
OV2722_H_CROP_START_H, &reg_val);
if (ret)
return ret;
buf->crop_horizontal_start = reg_val;
ret = ov2722_read_reg(client, OV2722_16BIT,
OV2722_V_CROP_START_H, &reg_val);
OV2722_V_CROP_START_H, &reg_val);
if (ret)
return ret;
buf->crop_vertical_start = reg_val;
ret = ov2722_read_reg(client, OV2722_16BIT,
OV2722_H_CROP_END_H, &reg_val);
OV2722_H_CROP_END_H, &reg_val);
if (ret)
return ret;
buf->crop_horizontal_end = reg_val;
ret = ov2722_read_reg(client, OV2722_16BIT,
OV2722_V_CROP_END_H, &reg_val);
OV2722_V_CROP_END_H, &reg_val);
if (ret)
return ret;
buf->crop_vertical_end = reg_val;
ret = ov2722_read_reg(client, OV2722_16BIT,
OV2722_H_OUTSIZE_H, &reg_val);
OV2722_H_OUTSIZE_H, &reg_val);
if (ret)
return ret;
buf->output_width = reg_val;
ret = ov2722_read_reg(client, OV2722_16BIT,
OV2722_V_OUTSIZE_H, &reg_val);
OV2722_V_OUTSIZE_H, &reg_val);
if (ret)
return ret;
buf->output_height = reg_val;
buf->binning_factor_x = res->bin_factor_x ?
res->bin_factor_x : 1;
res->bin_factor_x : 1;
buf->binning_factor_y = res->bin_factor_y ?
res->bin_factor_y : 1;
res->bin_factor_y : 1;
return 0;
}
static long __ov2722_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
int gain, int digitgain)
int gain, int digitgain)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
@ -414,53 +414,53 @@ static long __ov2722_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
digitgain <<= 2;
ret = ov2722_write_reg(client, OV2722_16BIT,
OV2722_VTS_H, vts);
OV2722_VTS_H, vts);
if (ret)
return ret;
ret = ov2722_write_reg(client, OV2722_16BIT,
OV2722_HTS_H, hts);
OV2722_HTS_H, hts);
if (ret)
return ret;
/* set exposure */
ret = ov2722_write_reg(client, OV2722_8BIT,
OV2722_AEC_PK_EXPO_L,
coarse_itg & 0xff);
OV2722_AEC_PK_EXPO_L,
coarse_itg & 0xff);
if (ret)
return ret;
ret = ov2722_write_reg(client, OV2722_16BIT,
OV2722_AEC_PK_EXPO_H,
(coarse_itg >> 8) & 0xfff);
OV2722_AEC_PK_EXPO_H,
(coarse_itg >> 8) & 0xfff);
if (ret)
return ret;
/* set analog gain */
ret = ov2722_write_reg(client, OV2722_16BIT,
OV2722_AGC_ADJ_H, gain);
OV2722_AGC_ADJ_H, gain);
if (ret)
return ret;
/* set digital gain */
ret = ov2722_write_reg(client, OV2722_16BIT,
OV2722_MWB_GAIN_R_H, digitgain);
OV2722_MWB_GAIN_R_H, digitgain);
if (ret)
return ret;
ret = ov2722_write_reg(client, OV2722_16BIT,
OV2722_MWB_GAIN_G_H, digitgain);
OV2722_MWB_GAIN_G_H, digitgain);
if (ret)
return ret;
ret = ov2722_write_reg(client, OV2722_16BIT,
OV2722_MWB_GAIN_B_H, digitgain);
OV2722_MWB_GAIN_B_H, digitgain);
return ret;
}
static int ov2722_set_exposure(struct v4l2_subdev *sd, int exposure,
int gain, int digitgain)
int gain, int digitgain)
{
struct ov2722_device *dev = to_ov2722_sensor(sd);
int ret;
@ -473,7 +473,7 @@ static int ov2722_set_exposure(struct v4l2_subdev *sd, int exposure,
}
static long ov2722_s_exposure(struct v4l2_subdev *sd,
struct atomisp_exposure *exposure)
struct atomisp_exposure *exposure)
{
int exp = exposure->integration_time[0];
int gain = exposure->gain[0];
@ -512,21 +512,21 @@ static int ov2722_q_exposure(struct v4l2_subdev *sd, s32 *value)
/* get exposure */
ret = ov2722_read_reg(client, OV2722_8BIT,
OV2722_AEC_PK_EXPO_L,
&reg_v);
OV2722_AEC_PK_EXPO_L,
&reg_v);
if (ret)
goto err;
ret = ov2722_read_reg(client, OV2722_8BIT,
OV2722_AEC_PK_EXPO_M,
&reg_v2);
OV2722_AEC_PK_EXPO_M,
&reg_v2);
if (ret)
goto err;
reg_v += reg_v2 << 8;
ret = ov2722_read_reg(client, OV2722_8BIT,
OV2722_AEC_PK_EXPO_H,
&reg_v2);
OV2722_AEC_PK_EXPO_H,
&reg_v2);
if (ret)
goto err;
@ -575,60 +575,60 @@ static const struct v4l2_ctrl_ops ctrl_ops = {
static const struct v4l2_ctrl_config ov2722_controls[] = {
{
.ops = &ctrl_ops,
.id = V4L2_CID_EXPOSURE_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "exposure",
.min = 0x0,
.max = 0xffff,
.step = 0x01,
.def = 0x00,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_EXPOSURE_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "exposure",
.min = 0x0,
.max = 0xffff,
.step = 0x01,
.def = 0x00,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FOCAL_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "focal length",
.min = OV2722_FOCAL_LENGTH_DEFAULT,
.max = OV2722_FOCAL_LENGTH_DEFAULT,
.step = 0x01,
.def = OV2722_FOCAL_LENGTH_DEFAULT,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FOCAL_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "focal length",
.min = OV2722_FOCAL_LENGTH_DEFAULT,
.max = OV2722_FOCAL_LENGTH_DEFAULT,
.step = 0x01,
.def = OV2722_FOCAL_LENGTH_DEFAULT,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number",
.min = OV2722_F_NUMBER_DEFAULT,
.max = OV2722_F_NUMBER_DEFAULT,
.step = 0x01,
.def = OV2722_F_NUMBER_DEFAULT,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number",
.min = OV2722_F_NUMBER_DEFAULT,
.max = OV2722_F_NUMBER_DEFAULT,
.step = 0x01,
.def = OV2722_F_NUMBER_DEFAULT,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_RANGE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number range",
.min = OV2722_F_NUMBER_RANGE,
.max = OV2722_F_NUMBER_RANGE,
.step = 0x01,
.def = OV2722_F_NUMBER_RANGE,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_RANGE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number range",
.min = OV2722_F_NUMBER_RANGE,
.max = OV2722_F_NUMBER_RANGE,
.step = 0x01,
.def = OV2722_F_NUMBER_RANGE,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_LINK_FREQ,
.name = "Link Frequency",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = 1,
.max = 1500000 * 1000,
.step = 1,
.def = 1,
.flags = V4L2_CTRL_FLAG_VOLATILE | V4L2_CTRL_FLAG_READ_ONLY,
},
.ops = &ctrl_ops,
.id = V4L2_CID_LINK_FREQ,
.name = "Link Frequency",
.type = V4L2_CTRL_TYPE_INTEGER,
.min = 1,
.max = 1500000 * 1000,
.step = 1,
.def = 1,
.flags = V4L2_CTRL_FLAG_VOLATILE | V4L2_CTRL_FLAG_READ_ONLY,
},
};
static int ov2722_init(struct v4l2_subdev *sd)
@ -859,7 +859,7 @@ static int startup(struct v4l2_subdev *sd)
int ret = 0;
ret = ov2722_write_reg(client, OV2722_8BIT,
OV2722_SW_RESET, 0x01);
OV2722_SW_RESET, 0x01);
if (ret) {
dev_err(&client->dev, "ov2722 reset err.\n");
return ret;
@ -950,7 +950,7 @@ static int ov2722_set_fmt(struct v4l2_subdev *sd,
}
ret = ov2722_get_intg_factor(client, ov2722_info,
&ov2722_res[dev->fmt_idx]);
&ov2722_res[dev->fmt_idx]);
if (ret)
dev_err(&client->dev, "failed to get integration_factor\n");
@ -990,13 +990,13 @@ static int ov2722_detect(struct i2c_client *client)
return -ENODEV;
ret = ov2722_read_reg(client, OV2722_8BIT,
OV2722_SC_CMMN_CHIP_ID_H, &high);
OV2722_SC_CMMN_CHIP_ID_H, &high);
if (ret) {
dev_err(&client->dev, "sensor_id_high = 0x%x\n", high);
return -ENODEV;
}
ret = ov2722_read_reg(client, OV2722_8BIT,
OV2722_SC_CMMN_CHIP_ID_L, &low);
OV2722_SC_CMMN_CHIP_ID_L, &low);
id = (high << 8) | low;
if ((id != OV2722_ID) && (id != OV2720_ID)) {
@ -1005,7 +1005,7 @@ static int ov2722_detect(struct i2c_client *client)
}
ret = ov2722_read_reg(client, OV2722_8BIT,
OV2722_SC_CMMN_SUB_ID, &high);
OV2722_SC_CMMN_SUB_ID, &high);
revision = (u8)high & 0x0f;
dev_dbg(&client->dev, "sensor_revision = 0x%x\n", revision);
@ -1022,8 +1022,8 @@ static int ov2722_s_stream(struct v4l2_subdev *sd, int enable)
mutex_lock(&dev->input_lock);
ret = ov2722_write_reg(client, OV2722_8BIT, OV2722_SW_STREAM,
enable ? OV2722_START_STREAMING :
OV2722_STOP_STREAMING);
enable ? OV2722_START_STREAMING :
OV2722_STOP_STREAMING);
mutex_unlock(&dev->input_lock);
return ret;
@ -1040,7 +1040,7 @@ static int ov2722_s_config(struct v4l2_subdev *sd,
return -ENODEV;
dev->platform_data =
(struct camera_sensor_platform_data *)platform_data;
(struct camera_sensor_platform_data *)platform_data;
mutex_lock(&dev->input_lock);

132
drivers/staging/media/atomisp/i2c/mt9m114.h
View File

@ -341,52 +341,52 @@ struct mt9m114_write_ctrl {
*/
static struct mt9m114_res_struct mt9m114_res[] = {
{
.desc = "720P",
.res = MT9M114_RES_736P,
.width = 1296,
.height = 736,
.fps = 30,
.used = false,
.regs = NULL,
.skip_frames = 1,
.desc = "720P",
.res = MT9M114_RES_736P,
.width = 1296,
.height = 736,
.fps = 30,
.used = false,
.regs = NULL,
.skip_frames = 1,
.pixels_per_line = 0x0640,
.lines_per_frame = 0x0307,
.bin_factor_x = 1,
.bin_factor_y = 1,
.bin_mode = 0,
.pixels_per_line = 0x0640,
.lines_per_frame = 0x0307,
.bin_factor_x = 1,
.bin_factor_y = 1,
.bin_mode = 0,
},
{
.desc = "848P",
.res = MT9M114_RES_864P,
.width = 1296,
.height = 864,
.fps = 30,
.used = false,
.regs = NULL,
.skip_frames = 1,
.desc = "848P",
.res = MT9M114_RES_864P,
.width = 1296,
.height = 864,
.fps = 30,
.used = false,
.regs = NULL,
.skip_frames = 1,
.pixels_per_line = 0x0640,
.lines_per_frame = 0x03E8,
.bin_factor_x = 1,
.bin_factor_y = 1,
.bin_mode = 0,
.pixels_per_line = 0x0640,
.lines_per_frame = 0x03E8,
.bin_factor_x = 1,
.bin_factor_y = 1,
.bin_mode = 0,
},
{
.desc = "960P",
.res = MT9M114_RES_960P,
.width = 1296,
.height = 976,
.fps = 30,
.used = false,
.regs = NULL,
.skip_frames = 1,
.desc = "960P",
.res = MT9M114_RES_960P,
.width = 1296,
.height = 976,
.fps = 30,
.used = false,
.regs = NULL,
.skip_frames = 1,
.pixels_per_line = 0x0644, /* consistent with regs arrays */
.lines_per_frame = 0x03E5, /* consistent with regs arrays */
.bin_factor_x = 1,
.bin_factor_y = 1,
.bin_mode = 0,
.pixels_per_line = 0x0644, /* consistent with regs arrays */
.lines_per_frame = 0x03E5, /* consistent with regs arrays */
.bin_factor_x = 1,
.bin_factor_y = 1,
.bin_mode = 0,
},
};
@ -500,33 +500,33 @@ static struct misensor_reg const mt9m114_exp_center[] = {
#if 0 /* Currently unused */
static struct misensor_reg const mt9m114_suspend[] = {
{MISENSOR_16BIT, 0x098E, 0xDC00},
{MISENSOR_8BIT, 0xDC00, 0x40},
{MISENSOR_16BIT, 0x0080, 0x8002},
{MISENSOR_TOK_TERM, 0, 0}
{MISENSOR_16BIT, 0x098E, 0xDC00},
{MISENSOR_8BIT, 0xDC00, 0x40},
{MISENSOR_16BIT, 0x0080, 0x8002},
{MISENSOR_TOK_TERM, 0, 0}
};
static struct misensor_reg const mt9m114_streaming[] = {
{MISENSOR_16BIT, 0x098E, 0xDC00},
{MISENSOR_8BIT, 0xDC00, 0x34},
{MISENSOR_16BIT, 0x0080, 0x8002},
{MISENSOR_TOK_TERM, 0, 0}
{MISENSOR_16BIT, 0x098E, 0xDC00},
{MISENSOR_8BIT, 0xDC00, 0x34},
{MISENSOR_16BIT, 0x0080, 0x8002},
{MISENSOR_TOK_TERM, 0, 0}
};
#endif
static struct misensor_reg const mt9m114_standby_reg[] = {
{MISENSOR_16BIT, 0x098E, 0xDC00},
{MISENSOR_8BIT, 0xDC00, 0x50},
{MISENSOR_16BIT, 0x0080, 0x8002},
{MISENSOR_TOK_TERM, 0, 0}
{MISENSOR_16BIT, 0x098E, 0xDC00},
{MISENSOR_8BIT, 0xDC00, 0x50},
{MISENSOR_16BIT, 0x0080, 0x8002},
{MISENSOR_TOK_TERM, 0, 0}
};
#if 0 /* Currently unused */
static struct misensor_reg const mt9m114_wakeup_reg[] = {
{MISENSOR_16BIT, 0x098E, 0xDC00},
{MISENSOR_8BIT, 0xDC00, 0x54},
{MISENSOR_16BIT, 0x0080, 0x8002},
{MISENSOR_TOK_TERM, 0, 0}
{MISENSOR_16BIT, 0x098E, 0xDC00},
{MISENSOR_8BIT, 0xDC00, 0x54},
{MISENSOR_16BIT, 0x0080, 0x8002},
{MISENSOR_TOK_TERM, 0, 0}
};
#endif
@ -590,7 +590,7 @@ static struct misensor_reg const mt9m114_976P_init[] = {
{MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */
/* cam_sensor_cfg_fine_integ_time_min = 219 */
{MISENSOR_16BIT, 0xC80E, 0x00DB},
/* 0x062E //cam_sensor_cfg_fine_integ_time_max = 1459 */
/* 0x062E //cam_sensor_cfg_fine_integ_time_max = 1459 */
{MISENSOR_16BIT, 0xC810, 0x05B3},
/* 0x074C //cam_sensor_cfg_frame_length_lines = 1006 */
{MISENSOR_16BIT, 0xC812, 0x03E5},
@ -800,19 +800,19 @@ static struct misensor_reg const mt9m114_common[] = {
#if 0 /* Currently unused */
static struct misensor_reg const mt9m114_antiflicker_50hz[] = {
{MISENSOR_16BIT, 0x098E, 0xC88B},
{MISENSOR_8BIT, 0xC88B, 0x32},
{MISENSOR_8BIT, 0xDC00, 0x28},
{MISENSOR_16BIT, 0x0080, 0x8002},
{MISENSOR_TOK_TERM, 0, 0}
{MISENSOR_16BIT, 0x098E, 0xC88B},
{MISENSOR_8BIT, 0xC88B, 0x32},
{MISENSOR_8BIT, 0xDC00, 0x28},
{MISENSOR_16BIT, 0x0080, 0x8002},
{MISENSOR_TOK_TERM, 0, 0}
};
static struct misensor_reg const mt9m114_antiflicker_60hz[] = {
{MISENSOR_16BIT, 0x098E, 0xC88B},
{MISENSOR_8BIT, 0xC88B, 0x3C},
{MISENSOR_8BIT, 0xDC00, 0x28},
{MISENSOR_16BIT, 0x0080, 0x8002},
{MISENSOR_TOK_TERM, 0, 0}
{MISENSOR_16BIT, 0x098E, 0xC88B},
{MISENSOR_8BIT, 0xC88B, 0x3C},
{MISENSOR_8BIT, 0xDC00, 0x28},
{MISENSOR_16BIT, 0x0080, 0x8002},
{MISENSOR_TOK_TERM, 0, 0}
};
static struct misensor_reg const mt9m114_iq[] = {

1258
drivers/staging/media/atomisp/i2c/ov2680.h
View File

File diff suppressed because it is too large Load Diff

347
drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c
View File

@ -53,7 +53,8 @@
*/
static uint up_delay = 30;
module_param(up_delay, uint, 0644);
MODULE_PARM_DESC(up_delay, "Delay prior to the first CCI transaction for ov5693");
MODULE_PARM_DESC(up_delay,
"Delay prior to the first CCI transaction for ov5693");
static int vcm_ad_i2c_wr8(struct i2c_client *client, u8 reg, u8 val)
{
@ -136,7 +137,7 @@ static int ov5693_read_reg(struct i2c_client *client,
}
if (data_length != OV5693_8BIT && data_length != OV5693_16BIT
&& data_length != OV5693_32BIT) {
&& data_length != OV5693_32BIT) {
dev_err(&client->dev, "%s error, invalid data length\n",
__func__);
return -EINVAL;
@ -258,7 +259,7 @@ static int vcm_detect(struct i2c_client *client)
}
static int ov5693_write_reg(struct i2c_client *client, u16 data_length,
u16 reg, u16 val)
u16 reg, u16 val)
{
int ret;
unsigned char data[4] = {0};
@ -363,8 +364,8 @@ static int __ov5693_buf_reg_array(struct i2c_client *client,
}
static int __ov5693_write_reg_is_consecutive(struct i2c_client *client,
struct ov5693_write_ctrl *ctrl,
const struct ov5693_reg *next)
struct ov5693_write_ctrl *ctrl,
const struct ov5693_reg *next)
{
if (ctrl->index == 0)
return 1;
@ -394,7 +395,7 @@ static int ov5693_write_reg_array(struct i2c_client *client,
* flushed before proceed.
*/
if (!__ov5693_write_reg_is_consecutive(client, &ctrl,
next)) {
next)) {
err = __ov5693_flush_reg_array(client, &ctrl);
if (err)
return err;
@ -429,8 +430,8 @@ static int ov5693_g_fnumber(struct v4l2_subdev *sd, s32 *val)
static int ov5693_g_fnumber_range(struct v4l2_subdev *sd, s32 *val)
{
*val = (OV5693_F_NUMBER_DEFAULT_NUM << 24) |
(OV5693_F_NUMBER_DEM << 16) |
(OV5693_F_NUMBER_DEFAULT_NUM << 8) | OV5693_F_NUMBER_DEM;
(OV5693_F_NUMBER_DEM << 16) |
(OV5693_F_NUMBER_DEFAULT_NUM << 8) | OV5693_F_NUMBER_DEM;
return 0;
}
@ -453,8 +454,8 @@ static int ov5693_g_bin_factor_y(struct v4l2_subdev *sd, s32 *val)
}
static int ov5693_get_intg_factor(struct i2c_client *client,
struct camera_mipi_info *info,
const struct ov5693_resolution *res)
struct camera_mipi_info *info,
const struct ov5693_resolution *res)
{
struct v4l2_subdev *sd = i2c_get_clientdata(client);
struct ov5693_device *dev = to_ov5693_sensor(sd);
@ -475,11 +476,11 @@ static int ov5693_get_intg_factor(struct i2c_client *client,
/* get integration time */
buf->coarse_integration_time_min = OV5693_COARSE_INTG_TIME_MIN;
buf->coarse_integration_time_max_margin =
OV5693_COARSE_INTG_TIME_MAX_MARGIN;
OV5693_COARSE_INTG_TIME_MAX_MARGIN;
buf->fine_integration_time_min = OV5693_FINE_INTG_TIME_MIN;
buf->fine_integration_time_max_margin =
OV5693_FINE_INTG_TIME_MAX_MARGIN;
OV5693_FINE_INTG_TIME_MAX_MARGIN;
buf->fine_integration_time_def = OV5693_FINE_INTG_TIME_MIN;
buf->frame_length_lines = res->lines_per_frame;
@ -488,50 +489,50 @@ static int ov5693_get_intg_factor(struct i2c_client *client,
/* get the cropping and output resolution to ISP for this mode. */
ret = ov5693_read_reg(client, OV5693_16BIT,
OV5693_HORIZONTAL_START_H, &reg_val);
OV5693_HORIZONTAL_START_H, &reg_val);
if (ret)
return ret;
buf->crop_horizontal_start = reg_val;
ret = ov5693_read_reg(client, OV5693_16BIT,
OV5693_VERTICAL_START_H, &reg_val);
OV5693_VERTICAL_START_H, &reg_val);
if (ret)
return ret;
buf->crop_vertical_start = reg_val;
ret = ov5693_read_reg(client, OV5693_16BIT,
OV5693_HORIZONTAL_END_H, &reg_val);
OV5693_HORIZONTAL_END_H, &reg_val);
if (ret)
return ret;
buf->crop_horizontal_end = reg_val;
ret = ov5693_read_reg(client, OV5693_16BIT,
OV5693_VERTICAL_END_H, &reg_val);
OV5693_VERTICAL_END_H, &reg_val);
if (ret)
return ret;
buf->crop_vertical_end = reg_val;
ret = ov5693_read_reg(client, OV5693_16BIT,
OV5693_HORIZONTAL_OUTPUT_SIZE_H, &reg_val);
OV5693_HORIZONTAL_OUTPUT_SIZE_H, &reg_val);
if (ret)
return ret;
buf->output_width = reg_val;
ret = ov5693_read_reg(client, OV5693_16BIT,
OV5693_VERTICAL_OUTPUT_SIZE_H, &reg_val);
OV5693_VERTICAL_OUTPUT_SIZE_H, &reg_val);
if (ret)
return ret;
buf->output_height = reg_val;
buf->binning_factor_x = res->bin_factor_x ?
res->bin_factor_x : 1;
res->bin_factor_x : 1;
buf->binning_factor_y = res->bin_factor_y ?
res->bin_factor_y : 1;
res->bin_factor_y : 1;
return 0;
}
static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
int gain, int digitgain)
int gain, int digitgain)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
@ -552,7 +553,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
}
/* group hold */
ret = ov5693_write_reg(client, OV5693_8BIT,
OV5693_GROUP_ACCESS, 0x00);
OV5693_GROUP_ACCESS, 0x00);
if (ret) {
dev_err(&client->dev, "%s: write %x error, aborted\n",
__func__, OV5693_GROUP_ACCESS);
@ -560,7 +561,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
}
ret = ov5693_write_reg(client, OV5693_8BIT,
OV5693_TIMING_HTS_H, (hts >> 8) & 0xFF);
OV5693_TIMING_HTS_H, (hts >> 8) & 0xFF);
if (ret) {
dev_err(&client->dev, "%s: write %x error, aborted\n",
__func__, OV5693_TIMING_HTS_H);
@ -568,7 +569,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
}
ret = ov5693_write_reg(client, OV5693_8BIT,
OV5693_TIMING_HTS_L, hts & 0xFF);
OV5693_TIMING_HTS_L, hts & 0xFF);
if (ret) {
dev_err(&client->dev, "%s: write %x error, aborted\n",
__func__, OV5693_TIMING_HTS_L);
@ -579,7 +580,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
vts = (u16)coarse_itg + OV5693_INTEGRATION_TIME_MARGIN;
ret = ov5693_write_reg(client, OV5693_8BIT,
OV5693_TIMING_VTS_H, (vts >> 8) & 0xFF);
OV5693_TIMING_VTS_H, (vts >> 8) & 0xFF);
if (ret) {
dev_err(&client->dev, "%s: write %x error, aborted\n",
__func__, OV5693_TIMING_VTS_H);
@ -587,7 +588,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
}
ret = ov5693_write_reg(client, OV5693_8BIT,
OV5693_TIMING_VTS_L, vts & 0xFF);
OV5693_TIMING_VTS_L, vts & 0xFF);
if (ret) {
dev_err(&client->dev, "%s: write %x error, aborted\n",
__func__, OV5693_TIMING_VTS_L);
@ -624,7 +625,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
/* Analog gain */
ret = ov5693_write_reg(client, OV5693_8BIT,
OV5693_AGC_L, gain & 0xff);
OV5693_AGC_L, gain & 0xff);
if (ret) {
dev_err(&client->dev, "%s: write %x error, aborted\n",
__func__, OV5693_AGC_L);
@ -632,7 +633,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
}
ret = ov5693_write_reg(client, OV5693_8BIT,
OV5693_AGC_H, (gain >> 8) & 0xff);
OV5693_AGC_H, (gain >> 8) & 0xff);
if (ret) {
dev_err(&client->dev, "%s: write %x error, aborted\n",
__func__, OV5693_AGC_H);
@ -642,7 +643,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
/* Digital gain */
if (digitgain) {
ret = ov5693_write_reg(client, OV5693_16BIT,
OV5693_MWB_RED_GAIN_H, digitgain);
OV5693_MWB_RED_GAIN_H, digitgain);
if (ret) {
dev_err(&client->dev, "%s: write %x error, aborted\n",
__func__, OV5693_MWB_RED_GAIN_H);
@ -650,7 +651,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
}
ret = ov5693_write_reg(client, OV5693_16BIT,
OV5693_MWB_GREEN_GAIN_H, digitgain);
OV5693_MWB_GREEN_GAIN_H, digitgain);
if (ret) {
dev_err(&client->dev, "%s: write %x error, aborted\n",
__func__, OV5693_MWB_RED_GAIN_H);
@ -658,7 +659,7 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
}
ret = ov5693_write_reg(client, OV5693_16BIT,
OV5693_MWB_BLUE_GAIN_H, digitgain);
OV5693_MWB_BLUE_GAIN_H, digitgain);
if (ret) {
dev_err(&client->dev, "%s: write %x error, aborted\n",
__func__, OV5693_MWB_RED_GAIN_H);
@ -668,20 +669,20 @@ static long __ov5693_set_exposure(struct v4l2_subdev *sd, int coarse_itg,
/* End group */
ret = ov5693_write_reg(client, OV5693_8BIT,
OV5693_GROUP_ACCESS, 0x10);
OV5693_GROUP_ACCESS, 0x10);
if (ret)
return ret;
/* Delay launch group */
ret = ov5693_write_reg(client, OV5693_8BIT,
OV5693_GROUP_ACCESS, 0xa0);
OV5693_GROUP_ACCESS, 0xa0);
if (ret)
return ret;
return ret;
}
static int ov5693_set_exposure(struct v4l2_subdev *sd, int exposure,
int gain, int digitgain)
int gain, int digitgain)
{
struct ov5693_device *dev = to_ov5693_sensor(sd);
int ret;
@ -694,7 +695,7 @@ static int ov5693_set_exposure(struct v4l2_subdev *sd, int exposure,
}
static long ov5693_s_exposure(struct v4l2_subdev *sd,
struct atomisp_exposure *exposure)
struct atomisp_exposure *exposure)
{
u16 coarse_itg = exposure->integration_time[0];
u16 analog_gain = exposure->gain[0];
@ -720,7 +721,7 @@ static int ov5693_read_otp_reg_array(struct i2c_client *client, u16 size,
for (index = 0; index <= size; index++) {
pVal = (u16 *)(buf + index);
ret =
ov5693_read_reg(client, OV5693_8BIT, addr + index,
ov5693_read_reg(client, OV5693_8BIT, addr + index,
pVal);
if (ret)
return ret;
@ -740,7 +741,8 @@ static int __ov5693_otp_read(struct v4l2_subdev *sd, u8 *buf)
dev->otp_size = 0;
for (i = 1; i < OV5693_OTP_BANK_MAX; i++) {
/*set bank NO and OTP read mode. */
ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_OTP_BANK_REG, (i | 0xc0)); //[7:6] 2'b11 [5:0] bank no
ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_OTP_BANK_REG,
(i | 0xc0)); //[7:6] 2'b11 [5:0] bank no
if (ret) {
dev_err(&client->dev, "failed to prepare OTP page\n");
return ret;
@ -748,7 +750,8 @@ static int __ov5693_otp_read(struct v4l2_subdev *sd, u8 *buf)
//pr_debug("write 0x%x->0x%x\n",OV5693_OTP_BANK_REG,(i|0xc0));
/*enable read */
ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_OTP_READ_REG, OV5693_OTP_MODE_READ); // enable :1
ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_OTP_READ_REG,
OV5693_OTP_MODE_READ); // enable :1
if (ret) {
dev_err(&client->dev,
"failed to set OTP reading mode page");
@ -776,7 +779,8 @@ static int __ov5693_otp_read(struct v4l2_subdev *sd, u8 *buf)
b = buf;
continue;
}
} else if (i == 24) { //if the first 320bytes data doesn't not exist, try to read the next 32bytes data.
} else if (i ==
24) { //if the first 320bytes data doesn't not exist, try to read the next 32bytes data.
if ((*b) == 0) {
dev->otp_size = 32;
break;
@ -784,7 +788,8 @@ static int __ov5693_otp_read(struct v4l2_subdev *sd, u8 *buf)
b = buf;
continue;
}
} else if (i == 27) { //if the prvious 32bytes data doesn't exist, try to read the next 32bytes data again.
} else if (i ==
27) { //if the prvious 32bytes data doesn't exist, try to read the next 32bytes data again.
if ((*b) == 0) {
dev->otp_size = 32;
break;
@ -900,21 +905,21 @@ static int ov5693_q_exposure(struct v4l2_subdev *sd, s32 *value)
/* get exposure */
ret = ov5693_read_reg(client, OV5693_8BIT,
OV5693_EXPOSURE_L,
&reg_v);
OV5693_EXPOSURE_L,
&reg_v);
if (ret)
goto err;
ret = ov5693_read_reg(client, OV5693_8BIT,
OV5693_EXPOSURE_M,
&reg_v2);
OV5693_EXPOSURE_M,
&reg_v2);
if (ret)
goto err;
reg_v += reg_v2 << 8;
ret = ov5693_read_reg(client, OV5693_8BIT,
OV5693_EXPOSURE_H,
&reg_v2);
OV5693_EXPOSURE_H,
&reg_v2);
if (ret)
goto err;
@ -935,7 +940,7 @@ static int ad5823_t_focus_vcm(struct v4l2_subdev *sd, u16 val)
/* set reg VCM_CODE_MSB Bit[1:0] */
vcm_code = (vcm_code & VCM_CODE_MSB_MASK) |
((val >> 8) & ~VCM_CODE_MSB_MASK);
((val >> 8) & ~VCM_CODE_MSB_MASK);
ret = ad5823_i2c_write(client, AD5823_REG_VCM_CODE_MSB, vcm_code);
if (ret)
return ret;
@ -947,7 +952,7 @@ static int ad5823_t_focus_vcm(struct v4l2_subdev *sd, u16 val)
/* set required vcm move time */
vcm_code = AD5823_RESONANCE_PERIOD / AD5823_RESONANCE_COEF
- AD5823_HIGH_FREQ_RANGE;
- AD5823_HIGH_FREQ_RANGE;
ret = ad5823_i2c_write(client, AD5823_REG_VCM_MOVE_TIME, vcm_code);
return ret;
@ -1011,8 +1016,8 @@ static int ov5693_q_focus_status(struct v4l2_subdev *sd, s32 *value)
struct ov5693_device *dev = to_ov5693_sensor(sd);
ktime_t temptime;
ktime_t timedelay = ns_to_ktime(min_t(u32,
abs(dev->number_of_steps) * DELAY_PER_STEP_NS,
DELAY_MAX_PER_STEP_NS));
abs(dev->number_of_steps) * DELAY_PER_STEP_NS,
DELAY_MAX_PER_STEP_NS));
temptime = ktime_sub(ktime_get(), (dev->timestamp_t_focus_abs));
if (ktime_compare(temptime, timedelay) <= 0) {
@ -1136,126 +1141,126 @@ static const struct v4l2_ctrl_ops ctrl_ops = {
static const struct v4l2_ctrl_config ov5693_controls[] = {
{
.ops = &ctrl_ops,
.id = V4L2_CID_EXPOSURE_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "exposure",
.min = 0x0,
.max = 0xffff,
.step = 0x01,
.def = 0x00,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_EXPOSURE_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "exposure",
.min = 0x0,
.max = 0xffff,
.step = 0x01,
.def = 0x00,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FOCAL_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "focal length",
.min = OV5693_FOCAL_LENGTH_DEFAULT,
.max = OV5693_FOCAL_LENGTH_DEFAULT,
.step = 0x01,
.def = OV5693_FOCAL_LENGTH_DEFAULT,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FOCAL_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "focal length",
.min = OV5693_FOCAL_LENGTH_DEFAULT,
.max = OV5693_FOCAL_LENGTH_DEFAULT,
.step = 0x01,
.def = OV5693_FOCAL_LENGTH_DEFAULT,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number",
.min = OV5693_F_NUMBER_DEFAULT,
.max = OV5693_F_NUMBER_DEFAULT,
.step = 0x01,
.def = OV5693_F_NUMBER_DEFAULT,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number",
.min = OV5693_F_NUMBER_DEFAULT,
.max = OV5693_F_NUMBER_DEFAULT,
.step = 0x01,
.def = OV5693_F_NUMBER_DEFAULT,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_RANGE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number range",
.min = OV5693_F_NUMBER_RANGE,
.max = OV5693_F_NUMBER_RANGE,
.step = 0x01,
.def = OV5693_F_NUMBER_RANGE,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FNUMBER_RANGE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "f-number range",
.min = OV5693_F_NUMBER_RANGE,
.max = OV5693_F_NUMBER_RANGE,
.step = 0x01,
.def = OV5693_F_NUMBER_RANGE,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FOCUS_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "focus move absolute",
.min = 0,
.max = OV5693_VCM_MAX_FOCUS_POS,
.step = 1,
.def = 0,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FOCUS_ABSOLUTE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "focus move absolute",
.min = 0,
.max = OV5693_VCM_MAX_FOCUS_POS,
.step = 1,
.def = 0,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FOCUS_RELATIVE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "focus move relative",
.min = OV5693_VCM_MAX_FOCUS_NEG,
.max = OV5693_VCM_MAX_FOCUS_POS,
.step = 1,
.def = 0,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FOCUS_RELATIVE,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "focus move relative",
.min = OV5693_VCM_MAX_FOCUS_NEG,
.max = OV5693_VCM_MAX_FOCUS_POS,
.step = 1,
.def = 0,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_FOCUS_STATUS,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "focus status",
.min = 0,
.max = 100, /* allow enum to grow in the future */
.step = 1,
.def = 0,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_FOCUS_STATUS,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "focus status",
.min = 0,
.max = 100, /* allow enum to grow in the future */
.step = 1,
.def = 0,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_VCM_SLEW,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "vcm slew",
.min = 0,
.max = OV5693_VCM_SLEW_STEP_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_VCM_SLEW,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "vcm slew",
.min = 0,
.max = OV5693_VCM_SLEW_STEP_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_VCM_TIMEING,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "vcm step time",
.min = 0,
.max = OV5693_VCM_SLEW_TIME_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_VCM_TIMEING,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "vcm step time",
.min = 0,
.max = OV5693_VCM_SLEW_TIME_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_BIN_FACTOR_HORZ,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "horizontal binning factor",
.min = 0,
.max = OV5693_BIN_FACTOR_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_BIN_FACTOR_HORZ,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "horizontal binning factor",
.min = 0,
.max = OV5693_BIN_FACTOR_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
{
.ops = &ctrl_ops,
.id = V4L2_CID_BIN_FACTOR_VERT,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "vertical binning factor",
.min = 0,
.max = OV5693_BIN_FACTOR_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
.ops = &ctrl_ops,
.id = V4L2_CID_BIN_FACTOR_VERT,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "vertical binning factor",
.min = 0,
.max = OV5693_BIN_FACTOR_MAX,
.step = 1,
.def = 0,
.flags = 0,
},
};
static int ov5693_init(struct v4l2_subdev *sd)
@ -1280,7 +1285,7 @@ static int ov5693_init(struct v4l2_subdev *sd)
dev_err(&client->dev,
"vcm enable ringing failed\n");
ret = ad5823_i2c_write(client, AD5823_REG_MODE,
AD5823_ARC_RES1);
AD5823_ARC_RES1);
if (ret)
dev_err(&client->dev,
"vcm change mode failed\n");
@ -1549,7 +1554,7 @@ static int startup(struct v4l2_subdev *sd)
int ret = 0;
ret = ov5693_write_reg(client, OV5693_8BIT,
OV5693_SW_RESET, 0x01);
OV5693_SW_RESET, 0x01);
if (ret) {
dev_err(&client->dev, "ov5693 reset err.\n");
return ret;
@ -1649,12 +1654,12 @@ static int ov5693_set_fmt(struct v4l2_subdev *sd,
* data yet. So add stop streaming here.
*/
ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_SW_STREAM,
OV5693_STOP_STREAMING);
OV5693_STOP_STREAMING);
if (ret)
dev_warn(&client->dev, "ov5693 stream off err\n");
ret = ov5693_get_intg_factor(client, ov5693_info,
&ov5693_res[dev->fmt_idx]);
&ov5693_res[dev->fmt_idx]);
if (ret) {
dev_err(&client->dev, "failed to get integration_factor\n");
goto err;
@ -1701,13 +1706,13 @@ static int ov5693_detect(struct i2c_client *client)
return -ENODEV;
ret = ov5693_read_reg(client, OV5693_8BIT,
OV5693_SC_CMMN_CHIP_ID_H, &high);
OV5693_SC_CMMN_CHIP_ID_H, &high);
if (ret) {
dev_err(&client->dev, "sensor_id_high = 0x%x\n", high);
return -ENODEV;
}
ret = ov5693_read_reg(client, OV5693_8BIT,
OV5693_SC_CMMN_CHIP_ID_L, &low);
OV5693_SC_CMMN_CHIP_ID_L, &low);
id = ((((u16)high) << 8) | (u16)low);
if (id != OV5693_ID) {
@ -1716,7 +1721,7 @@ static int ov5693_detect(struct i2c_client *client)
}
ret = ov5693_read_reg(client, OV5693_8BIT,
OV5693_SC_CMMN_SUB_ID, &high);
OV5693_SC_CMMN_SUB_ID, &high);
revision = (u8)high & 0x0f;
dev_dbg(&client->dev, "sensor_revision = 0x%x\n", revision);
@ -1733,8 +1738,8 @@ static int ov5693_s_stream(struct v4l2_subdev *sd, int enable)
mutex_lock(&dev->input_lock);
ret = ov5693_write_reg(client, OV5693_8BIT, OV5693_SW_STREAM,
enable ? OV5693_START_STREAMING :
OV5693_STOP_STREAMING);
enable ? OV5693_START_STREAMING :
OV5693_STOP_STREAMING);
mutex_unlock(&dev->input_lock);
@ -1752,7 +1757,7 @@ static int ov5693_s_config(struct v4l2_subdev *sd,
return -ENODEV;
dev->platform_data =
(struct camera_sensor_platform_data *)platform_data;
(struct camera_sensor_platform_data *)platform_data;
mutex_lock(&dev->input_lock);
/* power off the module, then power on it in future
@ -1906,7 +1911,7 @@ static int ov5693_probe(struct i2c_client *client)
i2c = gmin_get_var_int(&client->dev, "I2CAddr", -1);
if (i2c != -1) {
dev_info(&client->dev,
"Overriding firmware-provided I2C address (0x%x) with 0x%x\n",
"Overriding firmware-provided I2C address (0x%x) with 0x%x\n",
client->addr, i2c);
client->addr = i2c;
}

3
drivers/staging/media/atomisp/include/linux/atomisp.h
View File

@ -407,7 +407,8 @@ struct atomisp_zoom_point {
* This specifies the region
*/
struct atomisp_zoom_region {
struct atomisp_zoom_point origin; /* Starting point coordinates for the region */
struct atomisp_zoom_point
origin; /* Starting point coordinates for the region */
struct atomisp_resolution resolution; /* Region resolution */
};

8
drivers/staging/media/atomisp/include/linux/atomisp_gmin_platform.h
View File

@ -21,15 +21,15 @@ int atomisp_register_i2c_module(struct v4l2_subdev *subdev,
struct camera_sensor_platform_data *plat_data,
enum intel_v4l2_subdev_type type);
struct v4l2_subdev *atomisp_gmin_find_subdev(struct i2c_adapter *adapter,
struct i2c_board_info *board_info);
struct i2c_board_info *board_info);
int atomisp_gmin_remove_subdev(struct v4l2_subdev *sd);
int gmin_get_var_int(struct device *dev, const char *var, int def);
int camera_sensor_csi(struct v4l2_subdev *sd, u32 port,
u32 lanes, u32 format, u32 bayer_order, int flag);
struct camera_sensor_platform_data *gmin_camera_platform_data(
struct v4l2_subdev *subdev,
enum atomisp_input_format csi_format,
enum atomisp_bayer_order csi_bayer);
struct v4l2_subdev *subdev,
enum atomisp_input_format csi_format,
enum atomisp_bayer_order csi_bayer);
int atomisp_gmin_register_vcm_control(struct camera_vcm_control *);

12
drivers/staging/media/atomisp/include/linux/atomisp_platform.h
View File

@ -187,13 +187,13 @@ struct camera_vcm_control;
struct camera_vcm_ops {
int (*power_up)(struct v4l2_subdev *sd, struct camera_vcm_control *vcm);
int (*power_down)(struct v4l2_subdev *sd,
struct camera_vcm_control *vcm);
struct camera_vcm_control *vcm);
int (*queryctrl)(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc,
struct camera_vcm_control *vcm);
struct camera_vcm_control *vcm);
int (*g_ctrl)(struct v4l2_subdev *sd, struct v4l2_control *ctrl,
struct camera_vcm_control *vcm);
struct camera_vcm_control *vcm);
int (*s_ctrl)(struct v4l2_subdev *sd, struct v4l2_control *ctrl,
struct camera_vcm_control *vcm);
struct camera_vcm_control *vcm);
};
struct camera_vcm_control {
@ -215,8 +215,8 @@ struct camera_sensor_platform_data {
int (*v1p8_ctrl)(struct v4l2_subdev *subdev, int on);
int (*v2p8_ctrl)(struct v4l2_subdev *subdev, int on);
int (*v1p2_ctrl)(struct v4l2_subdev *subdev, int on);
struct camera_vcm_control * (*get_vcm_ctrl)(struct v4l2_subdev *subdev,
char *module_id);
struct camera_vcm_control *(*get_vcm_ctrl)(struct v4l2_subdev *subdev,
char *module_id);
};
struct camera_mipi_info {

4
drivers/staging/media/atomisp/include/linux/libmsrlisthelper.h
View File

@ -19,9 +19,9 @@ struct i2c_client;
struct firmware;
int load_msr_list(struct i2c_client *client, char *path,
const struct firmware **fw);
const struct firmware **fw);
int apply_msr_data(struct i2c_client *client, const struct firmware *fw);
void release_msr_list(struct i2c_client *client,
const struct firmware *fw);
const struct firmware *fw);
#endif /* ifndef __LIBMSRLISTHELPER_H__ */

37
drivers/staging/media/atomisp/pci/atomisp2/atomisp_acc.c
View File

@ -76,8 +76,8 @@ acc_get_fw(struct atomisp_sub_device *asd, unsigned int handle)
struct atomisp_acc_fw *acc_fw;
list_for_each_entry(acc_fw, &asd->acc.fw, list)
if (acc_fw->handle == handle)
return acc_fw;
if (acc_fw->handle == handle)
return acc_fw;
return NULL;
}
@ -141,9 +141,9 @@ int atomisp_acc_load_to_pipe(struct atomisp_sub_device *asd,
struct atomisp_acc_fw_load_to_pipe *user_fw)
{
static const unsigned int pipeline_flags =
ATOMISP_ACC_FW_LOAD_FL_PREVIEW | ATOMISP_ACC_FW_LOAD_FL_COPY |
ATOMISP_ACC_FW_LOAD_FL_VIDEO |
ATOMISP_ACC_FW_LOAD_FL_CAPTURE | ATOMISP_ACC_FW_LOAD_FL_ACC;
ATOMISP_ACC_FW_LOAD_FL_PREVIEW | ATOMISP_ACC_FW_LOAD_FL_COPY |
ATOMISP_ACC_FW_LOAD_FL_VIDEO |
ATOMISP_ACC_FW_LOAD_FL_CAPTURE | ATOMISP_ACC_FW_LOAD_FL_ACC;
struct atomisp_acc_fw *acc_fw;
int handle;
@ -194,11 +194,11 @@ int atomisp_acc_load_to_pipe(struct atomisp_sub_device *asd,
if (acc_fw->fw->type == ia_css_isp_firmware) {
static const int type_to_css[] = {
[ATOMISP_ACC_FW_LOAD_TYPE_OUTPUT] =
IA_CSS_ACC_OUTPUT,
IA_CSS_ACC_OUTPUT,
[ATOMISP_ACC_FW_LOAD_TYPE_VIEWFINDER] =
IA_CSS_ACC_VIEWFINDER,
IA_CSS_ACC_VIEWFINDER,
[ATOMISP_ACC_FW_LOAD_TYPE_STANDALONE] =
IA_CSS_ACC_STANDALONE,
IA_CSS_ACC_STANDALONE,
};
acc_fw->fw->info.isp.type = type_to_css[acc_fw->type];
}
@ -383,7 +383,8 @@ int atomisp_acc_map(struct atomisp_sub_device *asd, struct atomisp_acc_map *map)
return 0;
}
int atomisp_acc_unmap(struct atomisp_sub_device *asd, struct atomisp_acc_map *map)
int atomisp_acc_unmap(struct atomisp_sub_device *asd,
struct atomisp_acc_map *map)
{
struct atomisp_map *atomisp_map;
@ -465,9 +466,9 @@ int atomisp_acc_load_extensions(struct atomisp_sub_device *asd)
if (acc_fw->flags & acc_flag_to_pipe[i].flag) {
ret = atomisp_css_load_acc_extension(asd,
acc_fw->fw,
acc_flag_to_pipe[i].pipe_id,
acc_fw->type);
acc_fw->fw,
acc_flag_to_pipe[i].pipe_id,
acc_fw->type);
if (ret)
goto error;
@ -496,7 +497,7 @@ int atomisp_acc_load_extensions(struct atomisp_sub_device *asd)
while (--i >= 0) {
if (acc_fw->flags & acc_flag_to_pipe[i].flag) {
atomisp_css_unload_acc_extension(asd, acc_fw->fw,
acc_flag_to_pipe[i].pipe_id);
acc_flag_to_pipe[i].pipe_id);
}
}
@ -512,8 +513,8 @@ int atomisp_acc_load_extensions(struct atomisp_sub_device *asd)
continue;
if (acc_fw->flags & acc_flag_to_pipe[i].flag) {
atomisp_css_unload_acc_extension(asd,
acc_fw->fw,
acc_flag_to_pipe[i].pipe_id);
acc_fw->fw,
acc_flag_to_pipe[i].pipe_id);
}
}
}
@ -536,8 +537,8 @@ void atomisp_acc_unload_extensions(struct atomisp_sub_device *asd)
for (i = ARRAY_SIZE(acc_flag_to_pipe) - 1; i >= 0; i--) {
if (acc_fw->flags & acc_flag_to_pipe[i].flag) {
atomisp_css_unload_acc_extension(asd,
acc_fw->fw,
acc_flag_to_pipe[i].pipe_id);
acc_fw->fw,
acc_flag_to_pipe[i].pipe_id);
}
}
}
@ -570,7 +571,7 @@ int atomisp_acc_set_state(struct atomisp_sub_device *asd,
for (i = 0; i < ARRAY_SIZE(acc_flag_to_pipe); i++) {
if (acc_fw->flags & acc_flag_to_pipe[i].flag) {
pipe = asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].
pipes[acc_flag_to_pipe[i].pipe_id];
pipes[acc_flag_to_pipe[i].pipe_id];
r = ia_css_pipe_set_qos_ext_state(pipe, acc_fw->handle,
enable);
if (r != IA_CSS_SUCCESS)

1502
drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c
View File

File diff suppressed because it is too large Load Diff

44
drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.h
View File

@ -86,7 +86,7 @@ void atomisp_setup_flash(struct atomisp_sub_device *asd);
irqreturn_t atomisp_isr(int irq, void *dev);
irqreturn_t atomisp_isr_thread(int irq, void *isp_ptr);
const struct atomisp_format_bridge *get_atomisp_format_bridge_from_mbus(
u32 mbus_code);
u32 mbus_code);
bool atomisp_is_mbuscode_raw(uint32_t code);
int atomisp_get_frame_pgnr(struct atomisp_device *isp,
const struct atomisp_css_frame *frame, u32 *p_pgnr);
@ -108,7 +108,7 @@ bool atomisp_is_viewfinder_support(struct atomisp_device *isp);
* ATOMISP_IOC_S_SENSOR_RUNMODE ioctl was called
*/
int atomisp_set_sensor_runmode(struct atomisp_sub_device *asd,
struct atomisp_s_runmode *runmode);
struct atomisp_s_runmode *runmode);
/*
#endif
* Function to enable/disable lens geometry distortion correction (GDC) and
@ -130,7 +130,7 @@ int atomisp_low_light(struct atomisp_sub_device *asd, int flag,
int atomisp_xnr(struct atomisp_sub_device *asd, int flag, int *arg);
int atomisp_formats(struct atomisp_sub_device *asd, int flag,
struct atomisp_formats_config *config);
struct atomisp_formats_config *config);
/*
* Function to configure noise reduction
@ -171,7 +171,7 @@ int atomisp_ctc(struct atomisp_sub_device *asd, int flag,
* Function to update gamma correction parameters
*/
int atomisp_gamma_correction(struct atomisp_sub_device *asd, int flag,
struct atomisp_gc_config *config);
struct atomisp_gc_config *config);
/*
* Function to update Gdc table for gdc
@ -194,7 +194,7 @@ int atomisp_get_dis_stat(struct atomisp_sub_device *asd,
* Function to get DVS2 BQ resolution settings
*/
int atomisp_get_dvs2_bq_resolutions(struct atomisp_sub_device *asd,
struct atomisp_dvs2_bq_resolutions *bq_res);
struct atomisp_dvs2_bq_resolutions *bq_res);
/*
* Function to set the DIS coefficients.
@ -221,10 +221,10 @@ int atomisp_get_metadata(struct atomisp_sub_device *asd, int flag,
struct atomisp_metadata *config);
int atomisp_get_metadata_by_type(struct atomisp_sub_device *asd, int flag,
struct atomisp_metadata_with_type *config);
struct atomisp_metadata_with_type *config);
int atomisp_set_parameters(struct video_device *vdev,
struct atomisp_parameters *arg);
struct atomisp_parameters *arg);
/*
* Function to set/get isp parameters to isp
*/
@ -298,14 +298,14 @@ int atomisp_digital_zoom(struct atomisp_sub_device *asd, int flag,
* Function set camera_prefiles.xml current sensor pixel array size
*/
int atomisp_set_array_res(struct atomisp_sub_device *asd,
struct atomisp_resolution *config);
struct atomisp_resolution *config);
/*
* Function to calculate real zoom region for every pipe
*/
int atomisp_calculate_real_zoom_region(struct atomisp_sub_device *asd,
struct atomisp_css_dz_config *dz_config,
enum atomisp_css_pipe_id css_pipe_id);
struct atomisp_css_dz_config *dz_config,
enum atomisp_css_pipe_id css_pipe_id);
int atomisp_cp_general_isp_parameters(struct atomisp_sub_device *asd,
struct atomisp_parameters *arg,
@ -328,16 +328,16 @@ int atomisp_cp_morph_table(struct atomisp_sub_device *asd,
bool from_user);
int atomisp_cp_dvs_6axis_config(struct atomisp_sub_device *asd,
struct atomisp_dvs_6axis_config *user_6axis_config,
struct atomisp_css_params *css_param,
bool from_user);
struct atomisp_dvs_6axis_config *user_6axis_config,
struct atomisp_css_params *css_param,
bool from_user);
int atomisp_makeup_css_parameters(struct atomisp_sub_device *asd,
struct atomisp_parameters *arg,
struct atomisp_css_params *css_param);
int atomisp_compare_grid(struct atomisp_sub_device *asd,
struct atomisp_grid_info *atomgrid);
struct atomisp_grid_info *atomgrid);
int atomisp_get_sensor_mode_data(struct atomisp_sub_device *asd,
struct atomisp_sensor_mode_data *config);
@ -346,7 +346,7 @@ int atomisp_get_fmt(struct video_device *vdev, struct v4l2_format *f);
/* This function looks up the closest available resolution. */
int atomisp_try_fmt(struct video_device *vdev, struct v4l2_format *f,
bool *res_overflow);
bool *res_overflow);
int atomisp_set_fmt(struct video_device *vdev, struct v4l2_format *f);
int atomisp_set_fmt_file(struct video_device *vdev, struct v4l2_format *f);
@ -355,7 +355,7 @@ int atomisp_set_shading_table(struct atomisp_sub_device *asd,
struct atomisp_shading_table *shading_table);
int atomisp_offline_capture_configure(struct atomisp_sub_device *asd,
struct atomisp_cont_capture_conf *cvf_config);
struct atomisp_cont_capture_conf *cvf_config);
int atomisp_ospm_dphy_down(struct atomisp_device *isp);
int atomisp_ospm_dphy_up(struct atomisp_device *isp);
@ -381,7 +381,7 @@ void atomisp_buf_done(struct atomisp_sub_device *asd, int error,
void atomisp_css_flush(struct atomisp_device *isp);
int atomisp_source_pad_to_stream_id(struct atomisp_sub_device *asd,
uint16_t source_pad);
uint16_t source_pad);
/*
* Events. Only one event has to be exported for now.
@ -389,13 +389,13 @@ int atomisp_source_pad_to_stream_id(struct atomisp_sub_device *asd,
void atomisp_eof_event(struct atomisp_sub_device *asd, uint8_t exp_id);
enum mipi_port_id __get_mipi_port(struct atomisp_device *isp,
enum atomisp_camera_port port);
enum atomisp_camera_port port);
bool atomisp_is_vf_pipe(struct atomisp_video_pipe *pipe);
void atomisp_apply_css_parameters(
struct atomisp_sub_device *asd,
struct atomisp_css_params *css_param);
struct atomisp_sub_device *asd,
struct atomisp_css_params *css_param);
void atomisp_free_css_parameters(struct atomisp_css_params *css_param);
void atomisp_handle_parameter_and_buffer(struct atomisp_video_pipe *pipe);
@ -417,7 +417,7 @@ void atomisp_init_raw_buffer_bitmap(struct atomisp_sub_device *asd);
* Function to enable/disable zoom for capture pipe
*/
int atomisp_enable_dz_capt_pipe(struct atomisp_sub_device *asd,
unsigned int *enable);
unsigned int *enable);
/*
* Function to get metadata type bu pipe id
@ -436,7 +436,7 @@ int atomisp_inject_a_fake_event(struct atomisp_sub_device *asd, int *event);
* pipeline output
*/
int atomisp_get_invalid_frame_num(struct video_device *vdev,
int *invalid_frame_num);
int *invalid_frame_num);
int atomisp_mrfld_power_up(struct atomisp_device *isp);
int atomisp_mrfld_power_down(struct atomisp_device *isp);

355
drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat.h
View File

@ -149,34 +149,34 @@ int atomisp_css_irq_translate(struct atomisp_device *isp,
unsigned int *infos);
void atomisp_css_rx_get_irq_info(enum mipi_port_id port,
unsigned int *infos);
unsigned int *infos);
void atomisp_css_rx_clear_irq_info(enum mipi_port_id port,
unsigned int infos);
unsigned int infos);
int atomisp_css_irq_enable(struct atomisp_device *isp,
enum atomisp_css_irq_info info, bool enable);
int atomisp_q_video_buffer_to_css(struct atomisp_sub_device *asd,
struct videobuf_vmalloc_memory *vm_mem,
enum atomisp_input_stream_id stream_id,
enum atomisp_css_buffer_type css_buf_type,
enum atomisp_css_pipe_id css_pipe_id);
struct videobuf_vmalloc_memory *vm_mem,
enum atomisp_input_stream_id stream_id,
enum atomisp_css_buffer_type css_buf_type,
enum atomisp_css_pipe_id css_pipe_id);
int atomisp_q_s3a_buffer_to_css(struct atomisp_sub_device *asd,
struct atomisp_s3a_buf *s3a_buf,
enum atomisp_input_stream_id stream_id,
enum atomisp_css_pipe_id css_pipe_id);
struct atomisp_s3a_buf *s3a_buf,
enum atomisp_input_stream_id stream_id,
enum atomisp_css_pipe_id css_pipe_id);
int atomisp_q_metadata_buffer_to_css(struct atomisp_sub_device *asd,
struct atomisp_metadata_buf *metadata_buf,
enum atomisp_input_stream_id stream_id,
enum atomisp_css_pipe_id css_pipe_id);
struct atomisp_metadata_buf *metadata_buf,
enum atomisp_input_stream_id stream_id,
enum atomisp_css_pipe_id css_pipe_id);
int atomisp_q_dis_buffer_to_css(struct atomisp_sub_device *asd,
struct atomisp_dis_buf *dis_buf,
enum atomisp_input_stream_id stream_id,
enum atomisp_css_pipe_id css_pipe_id);
struct atomisp_dis_buf *dis_buf,
enum atomisp_input_stream_id stream_id,
enum atomisp_css_pipe_id css_pipe_id);
void atomisp_css_mmu_invalidate_cache(void);
@ -187,7 +187,7 @@ int atomisp_css_start(struct atomisp_sub_device *asd,
void atomisp_css_update_isp_params(struct atomisp_sub_device *asd);
void atomisp_css_update_isp_params_on_pipe(struct atomisp_sub_device *asd,
struct ia_css_pipe *pipe);
struct ia_css_pipe *pipe);
int atomisp_css_queue_buffer(struct atomisp_sub_device *asd,
enum atomisp_input_stream_id stream_id,
@ -196,10 +196,10 @@ int atomisp_css_queue_buffer(struct atomisp_sub_device *asd,
struct atomisp_css_buffer *isp_css_buffer);
int atomisp_css_dequeue_buffer(struct atomisp_sub_device *asd,
enum atomisp_input_stream_id stream_id,
enum atomisp_css_pipe_id pipe_id,
enum atomisp_css_buffer_type buf_type,
struct atomisp_css_buffer *isp_css_buffer);
enum atomisp_input_stream_id stream_id,
enum atomisp_css_pipe_id pipe_id,
enum atomisp_css_buffer_type buf_type,
struct atomisp_css_buffer *isp_css_buffer);
int atomisp_css_allocate_stat_buffers(struct atomisp_sub_device *asd,
u16 stream_id,
@ -213,11 +213,12 @@ void atomisp_css_free_3a_buffer(struct atomisp_s3a_buf *s3a_buf);
void atomisp_css_free_dis_buffer(struct atomisp_dis_buf *dis_buf);
void atomisp_css_free_metadata_buffer(struct atomisp_metadata_buf *metadata_buf);
void atomisp_css_free_metadata_buffer(struct atomisp_metadata_buf
*metadata_buf);
int atomisp_css_get_grid_info(struct atomisp_sub_device *asd,
enum atomisp_css_pipe_id pipe_id,
int source_pad);
enum atomisp_css_pipe_id pipe_id,
int source_pad);
int atomisp_alloc_3a_output_buf(struct atomisp_sub_device *asd);
@ -265,102 +266,102 @@ int atomisp_css_isys_two_stream_cfg(struct atomisp_sub_device *asd,
enum atomisp_input_format input_format);
void atomisp_css_isys_two_stream_cfg_update_stream1(
struct atomisp_sub_device *asd,
enum atomisp_input_stream_id stream_id,
enum atomisp_input_format input_format,
unsigned int width, unsigned int height);
struct atomisp_sub_device *asd,
enum atomisp_input_stream_id stream_id,
enum atomisp_input_format input_format,
unsigned int width, unsigned int height);
void atomisp_css_isys_two_stream_cfg_update_stream2(
struct atomisp_sub_device *asd,
enum atomisp_input_stream_id stream_id,
enum atomisp_input_format input_format,
unsigned int width, unsigned int height);
struct atomisp_sub_device *asd,
enum atomisp_input_stream_id stream_id,
enum atomisp_input_format input_format,
unsigned int width, unsigned int height);
int atomisp_css_input_set_resolution(struct atomisp_sub_device *asd,
enum atomisp_input_stream_id stream_id,
struct v4l2_mbus_framefmt *ffmt);
enum atomisp_input_stream_id stream_id,
struct v4l2_mbus_framefmt *ffmt);
void atomisp_css_input_set_binning_factor(struct atomisp_sub_device *asd,
enum atomisp_input_stream_id stream_id,
unsigned int bin_factor);
enum atomisp_input_stream_id stream_id,
unsigned int bin_factor);
void atomisp_css_input_set_bayer_order(struct atomisp_sub_device *asd,
enum atomisp_input_stream_id stream_id,
enum atomisp_css_bayer_order bayer_order);
enum atomisp_input_stream_id stream_id,
enum atomisp_css_bayer_order bayer_order);
void atomisp_css_input_set_format(struct atomisp_sub_device *asd,
enum atomisp_input_stream_id stream_id,
enum atomisp_input_format format);
enum atomisp_input_stream_id stream_id,
enum atomisp_input_format format);
int atomisp_css_input_set_effective_resolution(
struct atomisp_sub_device *asd,
enum atomisp_input_stream_id stream_id,
unsigned int width,
unsigned int height);
struct atomisp_sub_device *asd,
enum atomisp_input_stream_id stream_id,
unsigned int width,
unsigned int height);
void atomisp_css_video_set_dis_envelope(struct atomisp_sub_device *asd,
unsigned int dvs_w, unsigned int dvs_h);
void atomisp_css_input_set_two_pixels_per_clock(
struct atomisp_sub_device *asd,
bool two_ppc);
struct atomisp_sub_device *asd,
bool two_ppc);
void atomisp_css_enable_raw_binning(struct atomisp_sub_device *asd,
bool enable);
bool enable);
void atomisp_css_enable_dz(struct atomisp_sub_device *asd, bool enable);
void atomisp_css_capture_set_mode(struct atomisp_sub_device *asd,
enum atomisp_css_capture_mode mode);
enum atomisp_css_capture_mode mode);
void atomisp_css_input_set_mode(struct atomisp_sub_device *asd,
enum atomisp_css_input_mode mode);
void atomisp_css_capture_enable_online(struct atomisp_sub_device *asd,
unsigned short stream_index, bool enable);
unsigned short stream_index, bool enable);
void atomisp_css_preview_enable_online(struct atomisp_sub_device *asd,
unsigned short stream_index, bool enable);
unsigned short stream_index, bool enable);
void atomisp_css_video_enable_online(struct atomisp_sub_device *asd,
bool enable);
bool enable);
void atomisp_css_enable_continuous(struct atomisp_sub_device *asd,
bool enable);
bool enable);
void atomisp_css_enable_cvf(struct atomisp_sub_device *asd,
bool enable);
bool enable);
int atomisp_css_input_configure_port(struct atomisp_sub_device *asd,
enum mipi_port_id port,
unsigned int num_lanes,
unsigned int timeout,
unsigned int mipi_freq,
enum atomisp_input_format metadata_format,
unsigned int metadata_width,
unsigned int metadata_height);
enum mipi_port_id port,
unsigned int num_lanes,
unsigned int timeout,
unsigned int mipi_freq,
enum atomisp_input_format metadata_format,
unsigned int metadata_width,
unsigned int metadata_height);
int atomisp_css_frame_allocate(struct atomisp_css_frame **frame,
unsigned int width, unsigned int height,
enum atomisp_css_frame_format format,
unsigned int padded_width,
unsigned int raw_bit_depth);
unsigned int width, unsigned int height,
enum atomisp_css_frame_format format,
unsigned int padded_width,
unsigned int raw_bit_depth);
int atomisp_css_frame_allocate_from_info(struct atomisp_css_frame **frame,
const struct atomisp_css_frame_info *info);
const struct atomisp_css_frame_info *info);
void atomisp_css_frame_free(struct atomisp_css_frame *frame);
int atomisp_css_frame_map(struct atomisp_css_frame **frame,
const struct atomisp_css_frame_info *info,
const void __user *data, uint16_t attribute,
void *context);
const struct atomisp_css_frame_info *info,
const void __user *data, uint16_t attribute,
void *context);
int atomisp_css_set_black_frame(struct atomisp_sub_device *asd,
const struct atomisp_css_frame *raw_black_frame);
const struct atomisp_css_frame *raw_black_frame);
int atomisp_css_allocate_continuous_frames(bool init_time,
struct atomisp_sub_device *asd);
struct atomisp_sub_device *asd);
void atomisp_css_update_continuous_frames(struct atomisp_sub_device *asd);
@ -368,117 +369,117 @@ void atomisp_create_pipes_stream(struct atomisp_sub_device *asd);
void atomisp_destroy_pipes_stream_force(struct atomisp_sub_device *asd);
int atomisp_css_stop(struct atomisp_sub_device *asd,
enum atomisp_css_pipe_id pipe_id, bool in_reset);
enum atomisp_css_pipe_id pipe_id, bool in_reset);
int atomisp_css_continuous_set_num_raw_frames(
struct atomisp_sub_device *asd,
int num_frames);
struct atomisp_sub_device *asd,
int num_frames);
void atomisp_css_disable_vf_pp(struct atomisp_sub_device *asd,
bool disable);
int atomisp_css_copy_configure_output(struct atomisp_sub_device *asd,
unsigned int stream_index,
unsigned int width, unsigned int height,
unsigned int padded_width,
enum atomisp_css_frame_format format);
unsigned int stream_index,
unsigned int width, unsigned int height,
unsigned int padded_width,
enum atomisp_css_frame_format format);
int atomisp_css_yuvpp_configure_output(struct atomisp_sub_device *asd,
unsigned int stream_index,
unsigned int width, unsigned int height,
unsigned int padded_width,
enum atomisp_css_frame_format format);
unsigned int stream_index,
unsigned int width, unsigned int height,
unsigned int padded_width,
enum atomisp_css_frame_format format);
int atomisp_css_yuvpp_configure_viewfinder(
struct atomisp_sub_device *asd,
unsigned int stream_index,
unsigned int width, unsigned int height,
unsigned int min_width,
enum atomisp_css_frame_format format);
struct atomisp_sub_device *asd,
unsigned int stream_index,
unsigned int width, unsigned int height,
unsigned int min_width,
enum atomisp_css_frame_format format);
int atomisp_css_yuvpp_get_output_frame_info(
struct atomisp_sub_device *asd,
unsigned int stream_index,
struct atomisp_css_frame_info *info);
struct atomisp_sub_device *asd,
unsigned int stream_index,
struct atomisp_css_frame_info *info);
int atomisp_css_yuvpp_get_viewfinder_frame_info(
struct atomisp_sub_device *asd,
unsigned int stream_index,
struct atomisp_css_frame_info *info);
struct atomisp_sub_device *asd,
unsigned int stream_index,
struct atomisp_css_frame_info *info);
int atomisp_css_preview_configure_output(struct atomisp_sub_device *asd,
unsigned int width, unsigned int height,
unsigned int min_width,
enum atomisp_css_frame_format format);
unsigned int width, unsigned int height,
unsigned int min_width,
enum atomisp_css_frame_format format);
int atomisp_css_capture_configure_output(struct atomisp_sub_device *asd,
unsigned int width, unsigned int height,
unsigned int min_width,
enum atomisp_css_frame_format format);
unsigned int width, unsigned int height,
unsigned int min_width,
enum atomisp_css_frame_format format);
int atomisp_css_video_configure_output(struct atomisp_sub_device *asd,
unsigned int width, unsigned int height,
unsigned int min_width,
enum atomisp_css_frame_format format);
unsigned int width, unsigned int height,
unsigned int min_width,
enum atomisp_css_frame_format format);
int atomisp_get_css_frame_info(struct atomisp_sub_device *asd,
u16 source_pad,
struct atomisp_css_frame_info *frame_info);
u16 source_pad,
struct atomisp_css_frame_info *frame_info);
int atomisp_css_video_configure_viewfinder(struct atomisp_sub_device *asd,
unsigned int width, unsigned int height,
unsigned int min_width,
enum atomisp_css_frame_format format);
unsigned int width, unsigned int height,
unsigned int min_width,
enum atomisp_css_frame_format format);
int atomisp_css_capture_configure_viewfinder(
struct atomisp_sub_device *asd,
unsigned int width, unsigned int height,
unsigned int min_width,
enum atomisp_css_frame_format format);
struct atomisp_sub_device *asd,
unsigned int width, unsigned int height,
unsigned int min_width,
enum atomisp_css_frame_format format);
int atomisp_css_video_get_viewfinder_frame_info(
struct atomisp_sub_device *asd,
struct atomisp_css_frame_info *info);
struct atomisp_sub_device *asd,
struct atomisp_css_frame_info *info);
int atomisp_css_capture_get_viewfinder_frame_info(
struct atomisp_sub_device *asd,
struct atomisp_css_frame_info *info);
struct atomisp_sub_device *asd,
struct atomisp_css_frame_info *info);
int atomisp_css_copy_get_output_frame_info(
struct atomisp_sub_device *asd,
unsigned int stream_index,
struct atomisp_css_frame_info *info);
struct atomisp_sub_device *asd,
unsigned int stream_index,
struct atomisp_css_frame_info *info);
int atomisp_css_capture_get_output_raw_frame_info(
struct atomisp_sub_device *asd,
struct atomisp_css_frame_info *info);
struct atomisp_sub_device *asd,
struct atomisp_css_frame_info *info);
int atomisp_css_preview_get_output_frame_info(
struct atomisp_sub_device *asd,
struct atomisp_css_frame_info *info);
struct atomisp_sub_device *asd,
struct atomisp_css_frame_info *info);
int atomisp_css_capture_get_output_frame_info(
struct atomisp_sub_device *asd,
struct atomisp_css_frame_info *info);
struct atomisp_sub_device *asd,
struct atomisp_css_frame_info *info);
int atomisp_css_video_get_output_frame_info(
struct atomisp_sub_device *asd,
struct atomisp_css_frame_info *info);
struct atomisp_sub_device *asd,
struct atomisp_css_frame_info *info);
int atomisp_css_preview_configure_pp_input(
struct atomisp_sub_device *asd,
unsigned int width, unsigned int height);
struct atomisp_sub_device *asd,
unsigned int width, unsigned int height);
int atomisp_css_capture_configure_pp_input(
struct atomisp_sub_device *asd,
unsigned int width, unsigned int height);
struct atomisp_sub_device *asd,
unsigned int width, unsigned int height);
int atomisp_css_video_configure_pp_input(
struct atomisp_sub_device *asd,
unsigned int width, unsigned int height);
struct atomisp_sub_device *asd,
unsigned int width, unsigned int height);
int atomisp_css_offline_capture_configure(struct atomisp_sub_device *asd,
int num_captures, unsigned int skip, int offset);
int num_captures, unsigned int skip, int offset);
int atomisp_css_exp_id_capture(struct atomisp_sub_device *asd, int exp_id);
int atomisp_css_exp_id_unlock(struct atomisp_sub_device *asd, int exp_id);
@ -494,130 +495,130 @@ bool atomisp_css_isp_has_started(void);
void atomisp_css_request_flash(struct atomisp_sub_device *asd);
void atomisp_css_set_wb_config(struct atomisp_sub_device *asd,
struct atomisp_css_wb_config *wb_config);
struct atomisp_css_wb_config *wb_config);
void atomisp_css_set_ob_config(struct atomisp_sub_device *asd,
struct atomisp_css_ob_config *ob_config);
struct atomisp_css_ob_config *ob_config);
void atomisp_css_set_dp_config(struct atomisp_sub_device *asd,
struct atomisp_css_dp_config *dp_config);
struct atomisp_css_dp_config *dp_config);
void atomisp_css_set_de_config(struct atomisp_sub_device *asd,
struct atomisp_css_de_config *de_config);
struct atomisp_css_de_config *de_config);
void atomisp_css_set_dz_config(struct atomisp_sub_device *asd,
struct atomisp_css_dz_config *dz_config);
struct atomisp_css_dz_config *dz_config);
void atomisp_css_set_default_de_config(struct atomisp_sub_device *asd);
void atomisp_css_set_ce_config(struct atomisp_sub_device *asd,
struct atomisp_css_ce_config *ce_config);
struct atomisp_css_ce_config *ce_config);
void atomisp_css_set_nr_config(struct atomisp_sub_device *asd,
struct atomisp_css_nr_config *nr_config);
struct atomisp_css_nr_config *nr_config);
void atomisp_css_set_ee_config(struct atomisp_sub_device *asd,
struct atomisp_css_ee_config *ee_config);
struct atomisp_css_ee_config *ee_config);
void atomisp_css_set_tnr_config(struct atomisp_sub_device *asd,
struct atomisp_css_tnr_config *tnr_config);
struct atomisp_css_tnr_config *tnr_config);
void atomisp_css_set_cc_config(struct atomisp_sub_device *asd,
struct atomisp_css_cc_config *cc_config);
struct atomisp_css_cc_config *cc_config);
void atomisp_css_set_macc_table(struct atomisp_sub_device *asd,
struct atomisp_css_macc_table *macc_table);
struct atomisp_css_macc_table *macc_table);
void atomisp_css_set_gamma_table(struct atomisp_sub_device *asd,
struct atomisp_css_gamma_table *gamma_table);
struct atomisp_css_gamma_table *gamma_table);
void atomisp_css_set_ctc_table(struct atomisp_sub_device *asd,
struct atomisp_css_ctc_table *ctc_table);
struct atomisp_css_ctc_table *ctc_table);
void atomisp_css_set_gc_config(struct atomisp_sub_device *asd,
struct atomisp_css_gc_config *gc_config);
struct atomisp_css_gc_config *gc_config);
void atomisp_css_set_3a_config(struct atomisp_sub_device *asd,
struct atomisp_css_3a_config *s3a_config);
struct atomisp_css_3a_config *s3a_config);
void atomisp_css_video_set_dis_vector(struct atomisp_sub_device *asd,
struct atomisp_dis_vector *vector);
struct atomisp_dis_vector *vector);
void atomisp_css_set_dvs2_coefs(struct atomisp_sub_device *asd,
struct ia_css_dvs2_coefficients *coefs);
int atomisp_css_set_dis_coefs(struct atomisp_sub_device *asd,
struct atomisp_dis_coefficients *coefs);
struct atomisp_dis_coefficients *coefs);
void atomisp_css_set_zoom_factor(struct atomisp_sub_device *asd,
unsigned int zoom);
unsigned int zoom);
int atomisp_css_get_wb_config(struct atomisp_sub_device *asd,
struct atomisp_wb_config *config);
struct atomisp_wb_config *config);
int atomisp_css_get_ob_config(struct atomisp_sub_device *asd,
struct atomisp_ob_config *config);
struct atomisp_ob_config *config);
int atomisp_css_get_dp_config(struct atomisp_sub_device *asd,
struct atomisp_dp_config *config);
struct atomisp_dp_config *config);
int atomisp_css_get_de_config(struct atomisp_sub_device *asd,
struct atomisp_de_config *config);
struct atomisp_de_config *config);
int atomisp_css_get_nr_config(struct atomisp_sub_device *asd,
struct atomisp_nr_config *config);
struct atomisp_nr_config *config);
int atomisp_css_get_ee_config(struct atomisp_sub_device *asd,
struct atomisp_ee_config *config);
struct atomisp_ee_config *config);
int atomisp_css_get_tnr_config(struct atomisp_sub_device *asd,
struct atomisp_tnr_config *config);
struct atomisp_tnr_config *config);
int atomisp_css_get_ctc_table(struct atomisp_sub_device *asd,
struct atomisp_ctc_table *config);
struct atomisp_ctc_table *config);
int atomisp_css_get_gamma_table(struct atomisp_sub_device *asd,
struct atomisp_gamma_table *config);
struct atomisp_gamma_table *config);
int atomisp_css_get_gc_config(struct atomisp_sub_device *asd,
struct atomisp_gc_config *config);
struct atomisp_gc_config *config);
int atomisp_css_get_3a_config(struct atomisp_sub_device *asd,
struct atomisp_3a_config *config);
struct atomisp_3a_config *config);
int atomisp_css_get_formats_config(struct atomisp_sub_device *asd,
struct atomisp_formats_config *formats_config);
struct atomisp_formats_config *formats_config);
void atomisp_css_set_formats_config(struct atomisp_sub_device *asd,
struct atomisp_css_formats_config *formats_config);
struct atomisp_css_formats_config *formats_config);
int atomisp_css_get_zoom_factor(struct atomisp_sub_device *asd,
unsigned int *zoom);
unsigned int *zoom);
struct atomisp_css_shading_table *atomisp_css_shading_table_alloc(
unsigned int width, unsigned int height);
unsigned int width, unsigned int height);
void atomisp_css_set_shading_table(struct atomisp_sub_device *asd,
struct atomisp_css_shading_table *table);
struct atomisp_css_shading_table *table);
void atomisp_css_shading_table_free(struct atomisp_css_shading_table *table);
struct atomisp_css_morph_table *atomisp_css_morph_table_allocate(
unsigned int width, unsigned int height);
unsigned int width, unsigned int height);
void atomisp_css_set_morph_table(struct atomisp_sub_device *asd,
struct atomisp_css_morph_table *table);
struct atomisp_css_morph_table *table);
void atomisp_css_get_morph_table(struct atomisp_sub_device *asd,
struct atomisp_css_morph_table *table);
struct atomisp_css_morph_table *table);
void atomisp_css_morph_table_free(struct atomisp_css_morph_table *table);
void atomisp_css_set_cont_prev_start_time(struct atomisp_device *isp,
unsigned int overlap);
unsigned int overlap);
int atomisp_css_get_dis_stat(struct atomisp_sub_device *asd,
struct atomisp_dis_statistics *stats);
struct atomisp_dis_statistics *stats);
int atomisp_css_update_stream(struct atomisp_sub_device *asd);
@ -630,21 +631,21 @@ int atomisp_css_stop_acc_pipe(struct atomisp_sub_device *asd);
void atomisp_css_destroy_acc_pipe(struct atomisp_sub_device *asd);
int atomisp_css_load_acc_extension(struct atomisp_sub_device *asd,
struct atomisp_css_fw_info *fw,
enum atomisp_css_pipe_id pipe_id,
unsigned int type);
struct atomisp_css_fw_info *fw,
enum atomisp_css_pipe_id pipe_id,
unsigned int type);
void atomisp_css_unload_acc_extension(struct atomisp_sub_device *asd,
struct atomisp_css_fw_info *fw,
enum atomisp_css_pipe_id pipe_id);
struct atomisp_css_fw_info *fw,
enum atomisp_css_pipe_id pipe_id);
int atomisp_css_wait_acc_finish(struct atomisp_sub_device *asd);
void atomisp_css_acc_done(struct atomisp_sub_device *asd);
int atomisp_css_load_acc_binary(struct atomisp_sub_device *asd,
struct atomisp_css_fw_info *fw,
unsigned int index);
struct atomisp_css_fw_info *fw,
unsigned int index);
void atomisp_css_unload_acc_binary(struct atomisp_sub_device *asd);

1393
drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.c
View File

File diff suppressed because it is too large Load Diff

42
drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_css20.h
View File

@ -196,55 +196,55 @@ struct atomisp_css_event {
};
void atomisp_css_set_macc_config(struct atomisp_sub_device *asd,
struct atomisp_css_macc_config *macc_config);
struct atomisp_css_macc_config *macc_config);
void atomisp_css_set_ecd_config(struct atomisp_sub_device *asd,
struct atomisp_css_ecd_config *ecd_config);
struct atomisp_css_ecd_config *ecd_config);
void atomisp_css_set_ynr_config(struct atomisp_sub_device *asd,
struct atomisp_css_ynr_config *ynr_config);
struct atomisp_css_ynr_config *ynr_config);
void atomisp_css_set_fc_config(struct atomisp_sub_device *asd,
struct atomisp_css_fc_config *fc_config);
struct atomisp_css_fc_config *fc_config);
void atomisp_css_set_aa_config(struct atomisp_sub_device *asd,
struct atomisp_css_aa_config *aa_config);
struct atomisp_css_aa_config *aa_config);
void atomisp_css_set_baa_config(struct atomisp_sub_device *asd,
struct atomisp_css_baa_config *baa_config);
struct atomisp_css_baa_config *baa_config);
void atomisp_css_set_anr_config(struct atomisp_sub_device *asd,
struct atomisp_css_anr_config *anr_config);
struct atomisp_css_anr_config *anr_config);
void atomisp_css_set_xnr_config(struct atomisp_sub_device *asd,
struct atomisp_css_xnr_config *xnr_config);
struct atomisp_css_xnr_config *xnr_config);
void atomisp_css_set_cnr_config(struct atomisp_sub_device *asd,
struct atomisp_css_cnr_config *cnr_config);
struct atomisp_css_cnr_config *cnr_config);
void atomisp_css_set_ctc_config(struct atomisp_sub_device *asd,
struct atomisp_css_ctc_config *ctc_config);
struct atomisp_css_ctc_config *ctc_config);
void atomisp_css_set_yuv2rgb_cc_config(struct atomisp_sub_device *asd,
struct atomisp_css_cc_config *yuv2rgb_cc_config);
struct atomisp_css_cc_config *yuv2rgb_cc_config);
void atomisp_css_set_rgb2yuv_cc_config(struct atomisp_sub_device *asd,
struct atomisp_css_cc_config *rgb2yuv_cc_config);
struct atomisp_css_cc_config *rgb2yuv_cc_config);
void atomisp_css_set_xnr_table(struct atomisp_sub_device *asd,
struct atomisp_css_xnr_table *xnr_table);
struct atomisp_css_xnr_table *xnr_table);
void atomisp_css_set_r_gamma_table(struct atomisp_sub_device *asd,
struct atomisp_css_rgb_gamma_table *r_gamma_table);
struct atomisp_css_rgb_gamma_table *r_gamma_table);
void atomisp_css_set_g_gamma_table(struct atomisp_sub_device *asd,
struct atomisp_css_rgb_gamma_table *g_gamma_table);
struct atomisp_css_rgb_gamma_table *g_gamma_table);
void atomisp_css_set_b_gamma_table(struct atomisp_sub_device *asd,
struct atomisp_css_rgb_gamma_table *b_gamma_table);
struct atomisp_css_rgb_gamma_table *b_gamma_table);
void atomisp_css_set_anr_thres(struct atomisp_sub_device *asd,
struct atomisp_css_anr_thres *anr_thres);
struct atomisp_css_anr_thres *anr_thres);
int atomisp_css_check_firmware_version(struct atomisp_device *isp);
@ -253,7 +253,7 @@ int atomisp_css_load_firmware(struct atomisp_device *isp);
void atomisp_css_unload_firmware(struct atomisp_device *isp);
void atomisp_css_set_dvs_6axis(struct atomisp_sub_device *asd,
struct atomisp_css_dvs_6axis *dvs_6axis);
struct atomisp_css_dvs_6axis *dvs_6axis);
unsigned int atomisp_css_debug_get_dtrace_level(void);
@ -264,14 +264,14 @@ int atomisp_css_dump_sp_raw_copy_linecount(bool reduced);
int atomisp_css_dump_blob_infor(void);
void atomisp_css_set_isp_config_id(struct atomisp_sub_device *asd,
uint32_t isp_config_id);
uint32_t isp_config_id);
void atomisp_css_set_isp_config_applied_frame(struct atomisp_sub_device *asd,
struct atomisp_css_frame *output_frame);
struct atomisp_css_frame *output_frame);
int atomisp_get_css_dbgfunc(void);
int atomisp_set_css_dbgfunc(struct atomisp_device *isp, int opt);
struct atomisp_css_dvs_grid_info *atomisp_css_get_dvs_grid_info(
struct atomisp_css_grid_info *grid_info);
struct atomisp_css_grid_info *grid_info);
#endif

147
drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.c
View File

@ -25,7 +25,7 @@
#include "atomisp_compat_ioctl32.h"
static int get_atomisp_histogram32(struct atomisp_histogram *kp,
struct atomisp_histogram32 __user *up)
struct atomisp_histogram32 __user *up)
{
compat_uptr_t tmp;
@ -39,7 +39,7 @@ static int get_atomisp_histogram32(struct atomisp_histogram *kp,
}
static int put_atomisp_histogram32(struct atomisp_histogram *kp,
struct atomisp_histogram32 __user *up)
struct atomisp_histogram32 __user *up)
{
compat_uptr_t tmp = (compat_uptr_t)((uintptr_t)kp->data);
@ -52,7 +52,7 @@ static int put_atomisp_histogram32(struct atomisp_histogram *kp,
}
static inline int get_v4l2_pix_format(struct v4l2_pix_format *kp,
struct v4l2_pix_format __user *up)
struct v4l2_pix_format __user *up)
{
if (copy_from_user(kp, up, sizeof(struct v4l2_pix_format)))
return -EFAULT;
@ -60,7 +60,7 @@ static inline int get_v4l2_pix_format(struct v4l2_pix_format *kp,
}
static inline int put_v4l2_pix_format(struct v4l2_pix_format *kp,
struct v4l2_pix_format __user *up)
struct v4l2_pix_format __user *up)
{
if (copy_to_user(up, kp, sizeof(struct v4l2_pix_format)))
return -EFAULT;
@ -68,7 +68,7 @@ static inline int put_v4l2_pix_format(struct v4l2_pix_format *kp,
}
static int get_v4l2_framebuffer32(struct v4l2_framebuffer *kp,
struct v4l2_framebuffer32 __user *up)
struct v4l2_framebuffer32 __user *up)
{
compat_uptr_t tmp;
@ -84,7 +84,7 @@ static int get_v4l2_framebuffer32(struct v4l2_framebuffer *kp,
}
static int get_atomisp_dis_statistics32(struct atomisp_dis_statistics *kp,
struct atomisp_dis_statistics32 __user *up)
struct atomisp_dis_statistics32 __user *up)
{
compat_uptr_t hor_prod_odd_real;
compat_uptr_t hor_prod_odd_imag;
@ -120,24 +120,24 @@ static int get_atomisp_dis_statistics32(struct atomisp_dis_statistics *kp,
}
static int put_atomisp_dis_statistics32(struct atomisp_dis_statistics *kp,
struct atomisp_dis_statistics32 __user *up)
struct atomisp_dis_statistics32 __user *up)
{
compat_uptr_t hor_prod_odd_real =
(compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.odd_real);
(compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.odd_real);
compat_uptr_t hor_prod_odd_imag =
(compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.odd_imag);
(compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.odd_imag);
compat_uptr_t hor_prod_even_real =
(compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.even_real);
(compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.even_real);
compat_uptr_t hor_prod_even_imag =
(compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.even_imag);
(compat_uptr_t)((uintptr_t)kp->dvs2_stat.hor_prod.even_imag);
compat_uptr_t ver_prod_odd_real =
(compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.odd_real);
(compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.odd_real);
compat_uptr_t ver_prod_odd_imag =
(compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.odd_imag);
(compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.odd_imag);
compat_uptr_t ver_prod_even_real =
(compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.even_real);
(compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.even_real);
compat_uptr_t ver_prod_even_imag =
(compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.even_imag);
(compat_uptr_t)((uintptr_t)kp->dvs2_stat.ver_prod.even_imag);
if (!access_ok(up, sizeof(struct atomisp_dis_statistics32)) ||
copy_to_user(up, kp, sizeof(struct atomisp_dvs_grid_info)) ||
@ -156,7 +156,7 @@ static int put_atomisp_dis_statistics32(struct atomisp_dis_statistics *kp,
}
static int get_atomisp_dis_coefficients32(struct atomisp_dis_coefficients *kp,
struct atomisp_dis_coefficients32 __user *up)
struct atomisp_dis_coefficients32 __user *up)
{
compat_uptr_t hor_coefs_odd_real;
compat_uptr_t hor_coefs_odd_imag;
@ -191,8 +191,9 @@ static int get_atomisp_dis_coefficients32(struct atomisp_dis_coefficients *kp,
}
static int get_atomisp_dvs_6axis_config32(struct atomisp_dvs_6axis_config *kp,
struct atomisp_dvs_6axis_config32 __user *up)
{ compat_uptr_t xcoords_y;
struct atomisp_dvs_6axis_config32 __user *up)
{
compat_uptr_t xcoords_y;
compat_uptr_t ycoords_y;
compat_uptr_t xcoords_uv;
compat_uptr_t ycoords_uv;
@ -217,7 +218,7 @@ static int get_atomisp_dvs_6axis_config32(struct atomisp_dvs_6axis_config *kp,
}
static int get_atomisp_3a_statistics32(struct atomisp_3a_statistics *kp,
struct atomisp_3a_statistics32 __user *up)
struct atomisp_3a_statistics32 __user *up)
{
compat_uptr_t data;
compat_uptr_t rgby_data;
@ -237,7 +238,7 @@ static int get_atomisp_3a_statistics32(struct atomisp_3a_statistics *kp,
}
static int put_atomisp_3a_statistics32(struct atomisp_3a_statistics *kp,
struct atomisp_3a_statistics32 __user *up)
struct atomisp_3a_statistics32 __user *up)
{
compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data);
compat_uptr_t rgby_data = (compat_uptr_t)((uintptr_t)kp->rgby_data);
@ -254,7 +255,7 @@ static int put_atomisp_3a_statistics32(struct atomisp_3a_statistics *kp,
}
static int get_atomisp_metadata_stat32(struct atomisp_metadata *kp,
struct atomisp_metadata32 __user *up)
struct atomisp_metadata32 __user *up)
{
compat_uptr_t data;
compat_uptr_t effective_width;
@ -274,11 +275,11 @@ static int get_atomisp_metadata_stat32(struct atomisp_metadata *kp,
}
static int put_atomisp_metadata_stat32(struct atomisp_metadata *kp,
struct atomisp_metadata32 __user *up)
struct atomisp_metadata32 __user *up)
{
compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data);
compat_uptr_t effective_width =
(compat_uptr_t)((uintptr_t)kp->effective_width);
(compat_uptr_t)((uintptr_t)kp->effective_width);
if (!access_ok(up, sizeof(struct atomisp_metadata32)) ||
put_user(data, &up->data) ||
put_user(kp->width, &up->width) ||
@ -292,12 +293,12 @@ static int put_atomisp_metadata_stat32(struct atomisp_metadata *kp,
}
static int put_atomisp_metadata_by_type_stat32(
struct atomisp_metadata_with_type *kp,
struct atomisp_metadata_with_type32 __user *up)
struct atomisp_metadata_with_type *kp,
struct atomisp_metadata_with_type32 __user *up)
{
compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data);
compat_uptr_t effective_width =
(compat_uptr_t)((uintptr_t)kp->effective_width);
(compat_uptr_t)((uintptr_t)kp->effective_width);
if (!access_ok(up, sizeof(struct atomisp_metadata_with_type32)) ||
put_user(data, &up->data) ||
put_user(kp->width, &up->width) ||
@ -312,8 +313,8 @@ static int put_atomisp_metadata_by_type_stat32(
}
static int get_atomisp_metadata_by_type_stat32(
struct atomisp_metadata_with_type *kp,
struct atomisp_metadata_with_type32 __user *up)
struct atomisp_metadata_with_type *kp,
struct atomisp_metadata_with_type32 __user *up)
{
compat_uptr_t data;
compat_uptr_t effective_width;
@ -334,7 +335,7 @@ static int get_atomisp_metadata_by_type_stat32(
}
static int get_atomisp_morph_table32(struct atomisp_morph_table *kp,
struct atomisp_morph_table32 __user *up)
struct atomisp_morph_table32 __user *up)
{
unsigned int n = ATOMISP_MORPH_TABLE_NUM_PLANES;
@ -358,7 +359,7 @@ static int get_atomisp_morph_table32(struct atomisp_morph_table *kp,
}
static int put_atomisp_morph_table32(struct atomisp_morph_table *kp,
struct atomisp_morph_table32 __user *up)
struct atomisp_morph_table32 __user *up)
{
unsigned int n = ATOMISP_MORPH_TABLE_NUM_PLANES;
@ -382,7 +383,7 @@ static int put_atomisp_morph_table32(struct atomisp_morph_table *kp,
}
static int get_atomisp_overlay32(struct atomisp_overlay *kp,
struct atomisp_overlay32 __user *up)
struct atomisp_overlay32 __user *up)
{
compat_uptr_t frame;
@ -406,7 +407,7 @@ static int get_atomisp_overlay32(struct atomisp_overlay *kp,
}
static int put_atomisp_overlay32(struct atomisp_overlay *kp,
struct atomisp_overlay32 __user *up)
struct atomisp_overlay32 __user *up)
{
compat_uptr_t frame = (compat_uptr_t)((uintptr_t)kp->frame);
@ -429,8 +430,8 @@ static int put_atomisp_overlay32(struct atomisp_overlay *kp,
}
static int get_atomisp_calibration_group32(
struct atomisp_calibration_group *kp,
struct atomisp_calibration_group32 __user *up)
struct atomisp_calibration_group *kp,
struct atomisp_calibration_group32 __user *up)
{
compat_uptr_t calb_grp_values;
@ -445,11 +446,11 @@ static int get_atomisp_calibration_group32(
}
static int put_atomisp_calibration_group32(
struct atomisp_calibration_group *kp,
struct atomisp_calibration_group32 __user *up)
struct atomisp_calibration_group *kp,
struct atomisp_calibration_group32 __user *up)
{
compat_uptr_t calb_grp_values =
(compat_uptr_t)((uintptr_t)kp->calb_grp_values);
(compat_uptr_t)((uintptr_t)kp->calb_grp_values);
if (!access_ok(up, sizeof(struct atomisp_calibration_group32)) ||
put_user(kp->size, &up->size) ||
@ -461,7 +462,7 @@ static int put_atomisp_calibration_group32(
}
static int get_atomisp_acc_fw_load32(struct atomisp_acc_fw_load *kp,
struct atomisp_acc_fw_load32 __user *up)
struct atomisp_acc_fw_load32 __user *up)
{
compat_uptr_t data;
@ -476,7 +477,7 @@ static int get_atomisp_acc_fw_load32(struct atomisp_acc_fw_load *kp,
}
static int put_atomisp_acc_fw_load32(struct atomisp_acc_fw_load *kp,
struct atomisp_acc_fw_load32 __user *up)
struct atomisp_acc_fw_load32 __user *up)
{
compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data);
@ -490,7 +491,7 @@ static int put_atomisp_acc_fw_load32(struct atomisp_acc_fw_load *kp,
}
static int get_atomisp_acc_fw_arg32(struct atomisp_acc_fw_arg *kp,
struct atomisp_acc_fw_arg32 __user *up)
struct atomisp_acc_fw_arg32 __user *up)
{
compat_uptr_t value;
@ -506,7 +507,7 @@ static int get_atomisp_acc_fw_arg32(struct atomisp_acc_fw_arg *kp,
}
static int put_atomisp_acc_fw_arg32(struct atomisp_acc_fw_arg *kp,
struct atomisp_acc_fw_arg32 __user *up)
struct atomisp_acc_fw_arg32 __user *up)
{
compat_uptr_t value = (compat_uptr_t)((uintptr_t)kp->value);
@ -521,7 +522,7 @@ static int put_atomisp_acc_fw_arg32(struct atomisp_acc_fw_arg *kp,
}
static int get_v4l2_private_int_data32(struct v4l2_private_int_data *kp,
struct v4l2_private_int_data32 __user *up)
struct v4l2_private_int_data32 __user *up)
{
compat_uptr_t data;
@ -537,7 +538,7 @@ static int get_v4l2_private_int_data32(struct v4l2_private_int_data *kp,
}
static int put_v4l2_private_int_data32(struct v4l2_private_int_data *kp,
struct v4l2_private_int_data32 __user *up)
struct v4l2_private_int_data32 __user *up)
{
compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data);
@ -552,7 +553,7 @@ static int put_v4l2_private_int_data32(struct v4l2_private_int_data *kp,
}
static int get_atomisp_shading_table32(struct atomisp_shading_table *kp,
struct atomisp_shading_table32 __user *up)
struct atomisp_shading_table32 __user *up)
{
unsigned int n = ATOMISP_NUM_SC_COLORS;
@ -575,7 +576,7 @@ static int get_atomisp_shading_table32(struct atomisp_shading_table *kp,
}
static int get_atomisp_acc_map32(struct atomisp_acc_map *kp,
struct atomisp_acc_map32 __user *up)
struct atomisp_acc_map32 __user *up)
{
compat_uptr_t user_ptr;
@ -595,7 +596,7 @@ static int get_atomisp_acc_map32(struct atomisp_acc_map *kp,
}
static int put_atomisp_acc_map32(struct atomisp_acc_map *kp,
struct atomisp_acc_map32 __user *up)
struct atomisp_acc_map32 __user *up)
{
compat_uptr_t user_ptr = (compat_uptr_t)((uintptr_t)kp->user_ptr);
@ -614,7 +615,7 @@ static int put_atomisp_acc_map32(struct atomisp_acc_map *kp,
}
static int get_atomisp_acc_s_mapped_arg32(struct atomisp_acc_s_mapped_arg *kp,
struct atomisp_acc_s_mapped_arg32 __user *up)
struct atomisp_acc_s_mapped_arg32 __user *up)
{
if (!access_ok(up, sizeof(struct atomisp_acc_s_mapped_arg32)) ||
get_user(kp->fw_handle, &up->fw_handle) ||
@ -627,7 +628,7 @@ static int get_atomisp_acc_s_mapped_arg32(struct atomisp_acc_s_mapped_arg *kp,
}
static int put_atomisp_acc_s_mapped_arg32(struct atomisp_acc_s_mapped_arg *kp,
struct atomisp_acc_s_mapped_arg32 __user *up)
struct atomisp_acc_s_mapped_arg32 __user *up)
{
if (!access_ok(up, sizeof(struct atomisp_acc_s_mapped_arg32)) ||
put_user(kp->fw_handle, &up->fw_handle) ||
@ -640,10 +641,10 @@ static int put_atomisp_acc_s_mapped_arg32(struct atomisp_acc_s_mapped_arg *kp,
}
static int get_atomisp_parameters32(struct atomisp_parameters *kp,
struct atomisp_parameters32 __user *up)
struct atomisp_parameters32 __user *up)
{
int n = offsetof(struct atomisp_parameters32, output_frame) /
sizeof(compat_uptr_t);
sizeof(compat_uptr_t);
unsigned int size, offset = 0;
void __user *user_ptr;
unsigned int stp, mtp, dcp, dscp = 0;
@ -676,16 +677,16 @@ static int get_atomisp_parameters32(struct atomisp_parameters *kp,
} karg;
size = sizeof(struct atomisp_shading_table) +
sizeof(struct atomisp_morph_table) +
sizeof(struct atomisp_dis_coefficients) +
sizeof(struct atomisp_dvs_6axis_config);
sizeof(struct atomisp_morph_table) +
sizeof(struct atomisp_dis_coefficients) +
sizeof(struct atomisp_dvs_6axis_config);
user_ptr = compat_alloc_user_space(size);
/* handle shading table */
if (stp != 0) {
if (get_atomisp_shading_table32(&karg.shading_table,
(struct atomisp_shading_table32 __user *)
(uintptr_t)stp))
(struct atomisp_shading_table32 __user *)
(uintptr_t)stp))
return -EFAULT;
kp->shading_table = (void __force *)user_ptr + offset;
@ -702,8 +703,8 @@ static int get_atomisp_parameters32(struct atomisp_parameters *kp,
/* handle morph table */
if (mtp != 0) {
if (get_atomisp_morph_table32(&karg.morph_table,
(struct atomisp_morph_table32 __user *)
(uintptr_t)mtp))
(struct atomisp_morph_table32 __user *)
(uintptr_t)mtp))
return -EFAULT;
kp->morph_table = (void __force *)user_ptr + offset;
@ -720,8 +721,8 @@ static int get_atomisp_parameters32(struct atomisp_parameters *kp,
/* handle dvs2 coefficients */
if (dcp != 0) {
if (get_atomisp_dis_coefficients32(&karg.dvs2_coefs,
(struct atomisp_dis_coefficients32 __user *)
(uintptr_t)dcp))
(struct atomisp_dis_coefficients32 __user *)
(uintptr_t)dcp))
return -EFAULT;
kp->dvs2_coefs = (void __force *)user_ptr + offset;
@ -737,8 +738,8 @@ static int get_atomisp_parameters32(struct atomisp_parameters *kp,
/* handle dvs 6axis configuration */
if (dscp != 0) {
if (get_atomisp_dvs_6axis_config32(&karg.dvs_6axis_config,
(struct atomisp_dvs_6axis_config32 __user *)
(uintptr_t)dscp))
(struct atomisp_dvs_6axis_config32 __user *)
(uintptr_t)dscp))
return -EFAULT;
kp->dvs_6axis_config = (void __force *)user_ptr + offset;
@ -756,8 +757,8 @@ static int get_atomisp_parameters32(struct atomisp_parameters *kp,
}
static int get_atomisp_acc_fw_load_to_pipe32(
struct atomisp_acc_fw_load_to_pipe *kp,
struct atomisp_acc_fw_load_to_pipe32 __user *up)
struct atomisp_acc_fw_load_to_pipe *kp,
struct atomisp_acc_fw_load_to_pipe32 __user *up)
{
compat_uptr_t data;
@ -777,8 +778,8 @@ static int get_atomisp_acc_fw_load_to_pipe32(
}
static int put_atomisp_acc_fw_load_to_pipe32(
struct atomisp_acc_fw_load_to_pipe *kp,
struct atomisp_acc_fw_load_to_pipe32 __user *up)
struct atomisp_acc_fw_load_to_pipe *kp,
struct atomisp_acc_fw_load_to_pipe32 __user *up)
{
compat_uptr_t data = (compat_uptr_t)((uintptr_t)kp->data);
@ -797,8 +798,8 @@ static int put_atomisp_acc_fw_load_to_pipe32(
}
static int get_atomisp_sensor_ae_bracketing_lut(
struct atomisp_sensor_ae_bracketing_lut *kp,
struct atomisp_sensor_ae_bracketing_lut32 __user *up)
struct atomisp_sensor_ae_bracketing_lut *kp,
struct atomisp_sensor_ae_bracketing_lut32 __user *up)
{
compat_uptr_t lut;
@ -822,7 +823,7 @@ static long native_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
}
static long atomisp_do_compat_ioctl(struct file *file,
unsigned int cmd, unsigned long arg)
unsigned int cmd, unsigned long arg)
{
union {
struct atomisp_histogram his;
@ -996,7 +997,7 @@ static long atomisp_do_compat_ioctl(struct file *file,
break;
case ATOMISP_IOC_G_METADATA_BY_TYPE:
err = get_atomisp_metadata_by_type_stat32(&karg.md_with_type,
up);
up);
break;
case ATOMISP_IOC_S_SENSOR_AE_BRACKETING_LUT:
err = get_atomisp_sensor_ae_bracketing_lut(&karg.lut, up);
@ -1058,7 +1059,7 @@ static long atomisp_do_compat_ioctl(struct file *file,
break;
case ATOMISP_IOC_G_METADATA_BY_TYPE:
err = put_atomisp_metadata_by_type_stat32(&karg.md_with_type,
up);
up);
break;
}
@ -1168,9 +1169,9 @@ long atomisp_compat_ioctl32(struct file *file,
default:
dev_warn(isp->dev,
"%s: unknown ioctl '%c', dir=%d, #%d (0x%08x)\n",
__func__, _IOC_TYPE(cmd), _IOC_DIR(cmd), _IOC_NR(cmd),
cmd);
"%s: unknown ioctl '%c', dir=%d, #%d (0x%08x)\n",
__func__, _IOC_TYPE(cmd), _IOC_DIR(cmd), _IOC_NR(cmd),
cmd);
break;
}
return ret;

6
drivers/staging/media/atomisp/pci/atomisp2/atomisp_compat_ioctl32.h
View File

@ -241,12 +241,14 @@ struct atomisp_parameters32 {
compat_uptr_t tnr_2500_config; /* Skylake: TNR config */
compat_uptr_t dpc_2500_config; /* Skylake: DPC config */
compat_uptr_t awb_2500_config; /* Skylake: auto white balance config */
compat_uptr_t awb_fr_2500_config; /* Skylake: auto white balance filter response config */
compat_uptr_t
awb_fr_2500_config; /* Skylake: auto white balance filter response config */
compat_uptr_t anr_2500_config; /* Skylake: ANR config */
compat_uptr_t af_2500_config; /* Skylake: auto focus config */
compat_uptr_t ae_2500_config; /* Skylake: auto exposure config */
compat_uptr_t bds_2500_config; /* Skylake: bayer downscaler config */
compat_uptr_t dvs_2500_config; /* Skylake: digital video stabilization config */
compat_uptr_t
dvs_2500_config; /* Skylake: digital video stabilization config */
compat_uptr_t res_mgr_2500_config;
/*

49
drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.c
View File

@ -22,14 +22,13 @@
#include "atomisp-regs.h"
static struct v4l2_mbus_framefmt *__csi2_get_format(struct
atomisp_mipi_csi2_device
* csi2,
struct
v4l2_subdev_pad_config * cfg,
enum
v4l2_subdev_format_whence
which, unsigned int pad)
{
atomisp_mipi_csi2_device
* csi2,
struct
v4l2_subdev_pad_config *cfg,
enum
v4l2_subdev_format_whence
which, unsigned int pad) {
if (which == V4L2_SUBDEV_FORMAT_TRY)
return v4l2_subdev_get_try_format(&csi2->subdev, cfg, pad);
else
@ -91,7 +90,7 @@ int atomisp_csi2_set_ffmt(struct v4l2_subdev *sd,
struct atomisp_mipi_csi2_device *csi2 = v4l2_get_subdevdata(sd);
struct v4l2_mbus_framefmt *actual_ffmt =
#ifndef ISP2401
__csi2_get_format(csi2, cfg, which, pad);
__csi2_get_format(csi2, cfg, which, pad);
#else
__csi2_get_format(csi2, cfg, which, pad);
#endif
@ -107,11 +106,11 @@ int atomisp_csi2_set_ffmt(struct v4l2_subdev *sd,
actual_ffmt->code = atomisp_in_fmt_conv[0].code;
actual_ffmt->width = clamp_t(
u32, ffmt->width, ATOM_ISP_MIN_WIDTH,
ATOM_ISP_MAX_WIDTH);
u32, ffmt->width, ATOM_ISP_MIN_WIDTH,
ATOM_ISP_MAX_WIDTH);
actual_ffmt->height = clamp_t(
u32, ffmt->height, ATOM_ISP_MIN_HEIGHT,
ATOM_ISP_MAX_HEIGHT);
u32, ffmt->height, ATOM_ISP_MIN_HEIGHT,
ATOM_ISP_MAX_HEIGHT);
tmp_ffmt = *ffmt = *actual_ffmt;
@ -122,9 +121,9 @@ int atomisp_csi2_set_ffmt(struct v4l2_subdev *sd,
/* FIXME: DPCM decompression */
*actual_ffmt = *ffmt =
#ifndef ISP2401
*__csi2_get_format(csi2, cfg, which, CSI2_PAD_SINK);
*__csi2_get_format(csi2, cfg, which, CSI2_PAD_SINK);
#else
*__csi2_get_format(csi2, cfg, which, CSI2_PAD_SINK);
*__csi2_get_format(csi2, cfg, which, CSI2_PAD_SINK);
#endif
return 0;
@ -194,8 +193,8 @@ static const struct v4l2_subdev_ops csi2_ops = {
* return -EINVAL or zero on success
*/
static int csi2_link_setup(struct media_entity *entity,
const struct media_pad *local,
const struct media_pad *remote, u32 flags)
const struct media_pad *local,
const struct media_pad *remote, u32 flags)
{
struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
struct atomisp_mipi_csi2_device *csi2 = v4l2_get_subdevdata(sd);
@ -235,7 +234,7 @@ static const struct media_entity_operations csi2_media_ops = {
* return -ENOMEM or zero on success
*/
static int mipi_csi2_init_entities(struct atomisp_mipi_csi2_device *csi2,
int port)
int port)
{
struct v4l2_subdev *sd = &csi2->subdev;
struct media_pad *pads = csi2->pads;
@ -258,7 +257,7 @@ static int mipi_csi2_init_entities(struct atomisp_mipi_csi2_device *csi2,
return ret;
csi2->formats[CSI2_PAD_SINK].code =
csi2->formats[CSI2_PAD_SOURCE].code =
csi2->formats[CSI2_PAD_SOURCE].code =
atomisp_in_fmt_conv[0].code;
return 0;
@ -272,7 +271,7 @@ atomisp_mipi_csi2_unregister_entities(struct atomisp_mipi_csi2_device *csi2)
}
int atomisp_mipi_csi2_register_entities(struct atomisp_mipi_csi2_device *csi2,
struct v4l2_device *vdev)
struct v4l2_device *vdev)
{
int ret;
@ -379,7 +378,7 @@ static void atomisp_csi2_configure_isp2401(struct atomisp_sub_device *asd)
int n;
mipi_info = atomisp_to_sensor_mipi_info(
isp->inputs[asd->input_curr].camera);
isp->inputs[asd->input_curr].camera);
port = mipi_info->port;
ctrl.id = V4L2_CID_LINK_FREQ;
@ -388,13 +387,13 @@ static void atomisp_csi2_configure_isp2401(struct atomisp_sub_device *asd)
mipi_freq = ctrl.value;
clk_termen = atomisp_csi2_configure_calc(coeff_clk_termen,
mipi_freq, TERMEN_DEFAULT);
mipi_freq, TERMEN_DEFAULT);
clk_settle = atomisp_csi2_configure_calc(coeff_clk_settle,
mipi_freq, SETTLE_DEFAULT);
mipi_freq, SETTLE_DEFAULT);
dat_termen = atomisp_csi2_configure_calc(coeff_dat_termen,
mipi_freq, TERMEN_DEFAULT);
mipi_freq, TERMEN_DEFAULT);
dat_settle = atomisp_csi2_configure_calc(coeff_dat_settle,
mipi_freq, SETTLE_DEFAULT);
mipi_freq, SETTLE_DEFAULT);
for (n = 0; n < csi2_port_lanes[port] + 1; n++) {
hrt_address base = csi2_port_base[port] + csi2_lane_base[n];

7
drivers/staging/media/atomisp/pci/atomisp2/atomisp_csi2.h
View File

@ -42,15 +42,16 @@ struct atomisp_mipi_csi2_device {
u32 output; /* output direction */
};
int atomisp_csi2_set_ffmt(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
int atomisp_csi2_set_ffmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
unsigned int which, uint16_t pad,
struct v4l2_mbus_framefmt *ffmt);
int atomisp_mipi_csi2_init(struct atomisp_device *isp);
void atomisp_mipi_csi2_cleanup(struct atomisp_device *isp);
void atomisp_mipi_csi2_unregister_entities(
struct atomisp_mipi_csi2_device *csi2);
struct atomisp_mipi_csi2_device *csi2);
int atomisp_mipi_csi2_register_entities(struct atomisp_mipi_csi2_device *csi2,
struct v4l2_device *vdev);
struct v4l2_device *vdev);
void atomisp_csi2_configure(struct atomisp_sub_device *asd);

12
drivers/staging/media/atomisp/pci/atomisp2/atomisp_drvfs.c
View File

@ -54,7 +54,7 @@ static struct _iunit_debug iunit_debug = {
};
static inline int iunit_dump_dbgopt(struct atomisp_device *isp,
unsigned int opt)
unsigned int opt)
{
int ret = 0;
@ -99,11 +99,11 @@ static ssize_t iunit_dbglvl_show(struct device_driver *drv, char *buf)
}
static ssize_t iunit_dbglvl_store(struct device_driver *drv, const char *buf,
size_t size)
size_t size)
{
if (kstrtouint(buf, 10, &iunit_debug.dbglvl)
|| iunit_debug.dbglvl < 1
|| iunit_debug.dbglvl > 9) {
|| iunit_debug.dbglvl < 1
|| iunit_debug.dbglvl > 9) {
return -ERANGE;
}
atomisp_css_debug_set_dtrace_level(iunit_debug.dbglvl);
@ -118,7 +118,7 @@ static ssize_t iunit_dbgfun_show(struct device_driver *drv, char *buf)
}
static ssize_t iunit_dbgfun_store(struct device_driver *drv, const char *buf,
size_t size)
size_t size)
{
unsigned int opt;
int ret;
@ -142,7 +142,7 @@ static ssize_t iunit_dbgopt_show(struct device_driver *drv, char *buf)
}
static ssize_t iunit_dbgopt_store(struct device_driver *drv, const char *buf,
size_t size)
size_t size)
{
unsigned int opt;
int ret;

4
drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.c
View File

@ -34,7 +34,7 @@
static void file_work(struct work_struct *work)
{
struct atomisp_file_device *file_dev =
container_of(work, struct atomisp_file_device, work);
container_of(work, struct atomisp_file_device, work);
struct atomisp_device *isp = file_dev->isp;
/* only support file injection on subdev0 */
struct atomisp_sub_device *asd = &isp->asd[0];
@ -183,7 +183,7 @@ atomisp_file_input_unregister_entities(struct atomisp_file_device *file_dev)
}
int atomisp_file_input_register_entities(struct atomisp_file_device *file_dev,
struct v4l2_device *vdev)
struct v4l2_device *vdev)
{
/* Register the subdev and video nodes. */
return v4l2_device_register_subdev(vdev, &file_dev->sd);

4
drivers/staging/media/atomisp/pci/atomisp2/atomisp_file.h
View File

@ -37,7 +37,7 @@ struct atomisp_file_device {
void atomisp_file_input_cleanup(struct atomisp_device *isp);
int atomisp_file_input_init(struct atomisp_device *isp);
void atomisp_file_input_unregister_entities(
struct atomisp_file_device *file_dev);
struct atomisp_file_device *file_dev);
int atomisp_file_input_register_entities(struct atomisp_file_device *file_dev,
struct v4l2_device *vdev);
struct v4l2_device *vdev);
#endif /* __ATOMISP_FILE_H__ */

150
drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.c
View File

@ -87,16 +87,16 @@ static int atomisp_buf_prepare(struct videobuf_queue *vq,
}
static int atomisp_q_one_metadata_buffer(struct atomisp_sub_device *asd,
enum atomisp_input_stream_id stream_id,
enum atomisp_css_pipe_id css_pipe_id)
enum atomisp_input_stream_id stream_id,
enum atomisp_css_pipe_id css_pipe_id)
{
struct atomisp_metadata_buf *metadata_buf;
enum atomisp_metadata_type md_type =
atomisp_get_metadata_type(asd, css_pipe_id);
atomisp_get_metadata_type(asd, css_pipe_id);
struct list_head *metadata_list;
if (asd->metadata_bufs_in_css[stream_id][css_pipe_id] >=
ATOMISP_CSS_Q_DEPTH)
ATOMISP_CSS_Q_DEPTH)
return 0; /* we have reached CSS queue depth */
if (!list_empty(&asd->metadata[md_type])) {
@ -105,7 +105,7 @@ static int atomisp_q_one_metadata_buffer(struct atomisp_sub_device *asd,
metadata_list = &asd->metadata_ready[md_type];
} else {
dev_warn(asd->isp->dev, "%s: No metadata buffers available for type %d!\n",
__func__, md_type);
__func__, md_type);
return -EINVAL;
}
@ -114,12 +114,12 @@ static int atomisp_q_one_metadata_buffer(struct atomisp_sub_device *asd,
list_del_init(&metadata_buf->list);
if (atomisp_q_metadata_buffer_to_css(asd, metadata_buf,
stream_id, css_pipe_id)) {
stream_id, css_pipe_id)) {
list_add(&metadata_buf->list, metadata_list);
return -EINVAL;
} else {
list_add_tail(&metadata_buf->list,
&asd->metadata_in_css[md_type]);
&asd->metadata_in_css[md_type]);
}
asd->metadata_bufs_in_css[stream_id][css_pipe_id]++;
@ -143,7 +143,7 @@ static int atomisp_q_one_s3a_buffer(struct atomisp_sub_device *asd,
s3a_list = &asd->s3a_stats_ready;
} else {
dev_warn(asd->isp->dev, "%s: No s3a buffers available!\n",
__func__);
__func__);
return -EINVAL;
}
@ -161,7 +161,7 @@ static int atomisp_q_one_s3a_buffer(struct atomisp_sub_device *asd,
list_add_tail(&s3a_buf->list, &asd->s3a_stats_in_css);
if (s3a_list == &asd->s3a_stats_ready)
dev_warn(asd->isp->dev, "%s: drop one s3a stat which has exp_id %d!\n",
__func__, exp_id);
__func__, exp_id);
}
asd->s3a_bufs_in_css[css_pipe_id]++;
@ -182,12 +182,12 @@ static int atomisp_q_one_dis_buffer(struct atomisp_sub_device *asd,
if (list_empty(&asd->dis_stats)) {
spin_unlock_irqrestore(&asd->dis_stats_lock, irqflags);
dev_warn(asd->isp->dev, "%s: No dis buffers available!\n",
__func__);
__func__);
return -EINVAL;
}
dis_buf = list_entry(asd->dis_stats.prev,
struct atomisp_dis_buf, list);
struct atomisp_dis_buf, list);
list_del_init(&dis_buf->list);
spin_unlock_irqrestore(&asd->dis_stats_lock, irqflags);
@ -211,15 +211,15 @@ static int atomisp_q_one_dis_buffer(struct atomisp_sub_device *asd,
}
int atomisp_q_video_buffers_to_css(struct atomisp_sub_device *asd,
struct atomisp_video_pipe *pipe,
enum atomisp_input_stream_id stream_id,
enum atomisp_css_buffer_type css_buf_type,
enum atomisp_css_pipe_id css_pipe_id)
struct atomisp_video_pipe *pipe,
enum atomisp_input_stream_id stream_id,
enum atomisp_css_buffer_type css_buf_type,
enum atomisp_css_pipe_id css_pipe_id)
{
struct videobuf_vmalloc_memory *vm_mem;
struct atomisp_css_params_with_list *param;
struct atomisp_css_dvs_grid_info *dvs_grid =
atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info);
atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info);
unsigned long irqflags;
int err = 0;
@ -246,24 +246,24 @@ int atomisp_q_video_buffers_to_css(struct atomisp_sub_device *asd,
param = pipe->frame_params[vb->i];
if (param) {
atomisp_makeup_css_parameters(asd,
&asd->params.css_param.update_flag,
&param->params);
&asd->params.css_param.update_flag,
&param->params);
atomisp_apply_css_parameters(asd, &param->params);
if (param->params.update_flag.dz_config &&
asd->run_mode->val != ATOMISP_RUN_MODE_VIDEO) {
asd->run_mode->val != ATOMISP_RUN_MODE_VIDEO) {
err = atomisp_calculate_real_zoom_region(asd,
&param->params.dz_config, css_pipe_id);
if (!err)
atomisp_css_set_dz_config(asd,
&param->params.dz_config);
&param->params.dz_config);
}
atomisp_css_set_isp_config_applied_frame(asd,
vm_mem->vaddr);
vm_mem->vaddr);
atomisp_css_update_isp_params_on_pipe(asd,
asd->stream_env[stream_id].pipes[css_pipe_id]);
asd->stream_env[stream_id].pipes[css_pipe_id]);
asd->params.dvs_6axis = (struct atomisp_css_dvs_6axis *)
param->params.dvs_6axis;
param->params.dvs_6axis;
/*
* WORKAROUND:
@ -274,49 +274,49 @@ int atomisp_q_video_buffers_to_css(struct atomisp_sub_device *asd,
* zoom region,I will set it to global setting.
*/
if (param->params.update_flag.dz_config &&
asd->run_mode->val != ATOMISP_RUN_MODE_VIDEO
&& !err) {
asd->run_mode->val != ATOMISP_RUN_MODE_VIDEO
&& !err) {
memcpy(&asd->params.css_param.dz_config,
&param->params.dz_config,
sizeof(struct ia_css_dz_config));
&param->params.dz_config,
sizeof(struct ia_css_dz_config));
asd->params.css_param.update_flag.dz_config =
(struct atomisp_dz_config *)
&asd->params.css_param.dz_config;
(struct atomisp_dz_config *)
&asd->params.css_param.dz_config;
asd->params.css_update_params_needed = true;
}
}
/* Enqueue buffer */
err = atomisp_q_video_buffer_to_css(asd, vm_mem, stream_id,
css_buf_type, css_pipe_id);
css_buf_type, css_pipe_id);
if (err) {
spin_lock_irqsave(&pipe->irq_lock, irqflags);
list_add_tail(&vb->queue, &pipe->activeq);
vb->state = VIDEOBUF_QUEUED;
spin_unlock_irqrestore(&pipe->irq_lock, irqflags);
dev_err(asd->isp->dev, "%s, css q fails: %d\n",
__func__, err);
__func__, err);
return -EINVAL;
}
pipe->buffers_in_css++;
/* enqueue 3A/DIS/metadata buffers */
if (asd->params.curr_grid_info.s3a_grid.enable &&
css_pipe_id == asd->params.s3a_enabled_pipe &&
css_buf_type == CSS_BUFFER_TYPE_OUTPUT_FRAME)
css_pipe_id == asd->params.s3a_enabled_pipe &&
css_buf_type == CSS_BUFFER_TYPE_OUTPUT_FRAME)
atomisp_q_one_s3a_buffer(asd, stream_id,
css_pipe_id);
css_pipe_id);
if (asd->stream_env[ATOMISP_INPUT_STREAM_GENERAL].stream_info.
metadata_info.size &&
css_buf_type == CSS_BUFFER_TYPE_OUTPUT_FRAME)
metadata_info.size &&
css_buf_type == CSS_BUFFER_TYPE_OUTPUT_FRAME)
atomisp_q_one_metadata_buffer(asd, stream_id,
css_pipe_id);
css_pipe_id);
if (dvs_grid && dvs_grid->enable &&
css_pipe_id == CSS_PIPE_ID_VIDEO &&
css_buf_type == CSS_BUFFER_TYPE_OUTPUT_FRAME)
css_pipe_id == CSS_PIPE_ID_VIDEO &&
css_buf_type == CSS_BUFFER_TYPE_OUTPUT_FRAME)
atomisp_q_one_dis_buffer(asd, stream_id,
css_pipe_id);
css_pipe_id);
}
return 0;
@ -329,7 +329,7 @@ static int atomisp_get_css_buf_type(struct atomisp_sub_device *asd,
if (ATOMISP_USE_YUVPP(asd)) {
/* when run ZSL case */
if (asd->continuous_mode->val &&
asd->run_mode->val == ATOMISP_RUN_MODE_PREVIEW) {
asd->run_mode->val == ATOMISP_RUN_MODE_PREVIEW) {
if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE)
return CSS_BUFFER_TYPE_OUTPUT_FRAME;
else if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW)
@ -340,7 +340,7 @@ static int atomisp_get_css_buf_type(struct atomisp_sub_device *asd,
/*when run SDV case*/
if (asd->continuous_mode->val &&
asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) {
asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO) {
if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE)
return CSS_BUFFER_TYPE_OUTPUT_FRAME;
else if (source_pad == ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW)
@ -387,26 +387,26 @@ static int atomisp_qbuffers_to_css_for_all_pipes(struct atomisp_sub_device *asd)
video_pipe = &asd->video_out_video_capture;
buf_type = atomisp_get_css_buf_type(
asd, css_preview_pipe_id,
atomisp_subdev_source_pad(&preview_pipe->vdev));
asd, css_preview_pipe_id,
atomisp_subdev_source_pad(&preview_pipe->vdev));
input_stream_id = ATOMISP_INPUT_STREAM_PREVIEW;
atomisp_q_video_buffers_to_css(asd, preview_pipe,
input_stream_id,
buf_type, css_preview_pipe_id);
buf_type = atomisp_get_css_buf_type(asd, css_capture_pipe_id,
atomisp_subdev_source_pad(&capture_pipe->vdev));
atomisp_subdev_source_pad(&capture_pipe->vdev));
input_stream_id = ATOMISP_INPUT_STREAM_GENERAL;
atomisp_q_video_buffers_to_css(asd, capture_pipe,
input_stream_id,
buf_type, css_capture_pipe_id);
input_stream_id,
buf_type, css_capture_pipe_id);
buf_type = atomisp_get_css_buf_type(asd, css_video_pipe_id,
atomisp_subdev_source_pad(&video_pipe->vdev));
atomisp_subdev_source_pad(&video_pipe->vdev));
input_stream_id = ATOMISP_INPUT_STREAM_VIDEO;
atomisp_q_video_buffers_to_css(asd, video_pipe,
input_stream_id,
buf_type, css_video_pipe_id);
input_stream_id,
buf_type, css_video_pipe_id);
return 0;
}
@ -483,8 +483,8 @@ int atomisp_qbuffers_to_css(struct atomisp_sub_device *asd)
if (capture_pipe) {
buf_type = atomisp_get_css_buf_type(
asd, css_capture_pipe_id,
atomisp_subdev_source_pad(&capture_pipe->vdev));
asd, css_capture_pipe_id,
atomisp_subdev_source_pad(&capture_pipe->vdev));
input_stream_id = ATOMISP_INPUT_STREAM_GENERAL;
/*
@ -500,8 +500,8 @@ int atomisp_qbuffers_to_css(struct atomisp_sub_device *asd)
if (vf_pipe) {
buf_type = atomisp_get_css_buf_type(
asd, css_capture_pipe_id,
atomisp_subdev_source_pad(&vf_pipe->vdev));
asd, css_capture_pipe_id,
atomisp_subdev_source_pad(&vf_pipe->vdev));
if (asd->stream_env[ATOMISP_INPUT_STREAM_POSTVIEW].stream)
input_stream_id = ATOMISP_INPUT_STREAM_POSTVIEW;
else
@ -519,11 +519,11 @@ int atomisp_qbuffers_to_css(struct atomisp_sub_device *asd)
if (preview_pipe) {
buf_type = atomisp_get_css_buf_type(
asd, css_preview_pipe_id,
atomisp_subdev_source_pad(&preview_pipe->vdev));
asd, css_preview_pipe_id,
atomisp_subdev_source_pad(&preview_pipe->vdev));
if (ATOMISP_SOC_CAMERA(asd) && css_preview_pipe_id == CSS_PIPE_ID_YUVPP)
input_stream_id = ATOMISP_INPUT_STREAM_GENERAL;
/* else for ext isp use case */
/* else for ext isp use case */
else if (css_preview_pipe_id == CSS_PIPE_ID_YUVPP)
input_stream_id = ATOMISP_INPUT_STREAM_VIDEO;
else if (asd->stream_env[ATOMISP_INPUT_STREAM_PREVIEW].stream)
@ -544,8 +544,8 @@ int atomisp_qbuffers_to_css(struct atomisp_sub_device *asd)
if (video_pipe) {
buf_type = atomisp_get_css_buf_type(
asd, css_video_pipe_id,
atomisp_subdev_source_pad(&video_pipe->vdev));
asd, css_video_pipe_id,
atomisp_subdev_source_pad(&video_pipe->vdev));
if (asd->stream_env[ATOMISP_INPUT_STREAM_VIDEO].stream)
input_stream_id = ATOMISP_INPUT_STREAM_VIDEO;
else
@ -676,10 +676,10 @@ static int atomisp_init_pipe(struct atomisp_video_pipe *pipe)
INIT_LIST_HEAD(&pipe->buffers_waiting_for_param);
INIT_LIST_HEAD(&pipe->per_frame_params);
memset(pipe->frame_request_config_id, 0,
VIDEO_MAX_FRAME * sizeof(unsigned int));
VIDEO_MAX_FRAME * sizeof(unsigned int));
memset(pipe->frame_params, 0,
VIDEO_MAX_FRAME *
sizeof(struct atomisp_css_params_with_list *));
VIDEO_MAX_FRAME *
sizeof(struct atomisp_css_params_with_list *));
return 0;
}
@ -927,8 +927,8 @@ static int atomisp_release(struct file *file)
if (pipe->capq.streaming)
dev_warn(isp->dev,
"%s: ISP still streaming while closing!",
__func__);
"%s: ISP still streaming while closing!",
__func__);
if (pipe->capq.streaming &&
__atomisp_streamoff(file, NULL, V4L2_BUF_TYPE_VIDEO_CAPTURE)) {
@ -982,7 +982,7 @@ static int atomisp_release(struct file *file)
atomisp_css_free_stat_buffers(asd);
atomisp_free_internal_buffers(asd);
ret = v4l2_subdev_call(isp->inputs[asd->input_curr].camera,
core, s_power, 0);
core, s_power, 0);
if (ret)
dev_warn(isp->dev, "Failed to power-off sensor\n");
@ -1016,10 +1016,10 @@ static int atomisp_release(struct file *file)
done:
if (!acc_node) {
atomisp_subdev_set_selection(&asd->subdev, fh.pad,
V4L2_SUBDEV_FORMAT_ACTIVE,
atomisp_subdev_source_pad(vdev),
V4L2_SEL_TGT_COMPOSE, 0,
&clear_compose);
V4L2_SUBDEV_FORMAT_ACTIVE,
atomisp_subdev_source_pad(vdev),
V4L2_SEL_TGT_COMPOSE, 0,
&clear_compose);
}
rt_mutex_unlock(&isp->mutex);
mutex_unlock(&isp->streamoff_mutex);
@ -1053,7 +1053,7 @@ static int do_isp_mm_remap(struct atomisp_device *isp,
}
static int frame_mmap(struct atomisp_device *isp,
const struct atomisp_css_frame *frame, struct vm_area_struct *vma)
const struct atomisp_css_frame *frame, struct vm_area_struct *vma)
{
ia_css_ptr isp_virt;
u32 host_virt;
@ -1075,12 +1075,12 @@ static int frame_mmap(struct atomisp_device *isp,
}
int atomisp_videobuf_mmap_mapper(struct videobuf_queue *q,
struct vm_area_struct *vma)
struct vm_area_struct *vma)
{
u32 offset = vma->vm_pgoff << PAGE_SHIFT;
int ret = -EINVAL, i;
struct atomisp_device *isp =
((struct atomisp_video_pipe *)(q->priv_data))->isp;
((struct atomisp_video_pipe *)(q->priv_data))->isp;
struct videobuf_vmalloc_memory *vm_mem;
struct videobuf_mapping *map;
@ -1126,7 +1126,7 @@ int atomisp_videobuf_mmap_mapper(struct videobuf_queue *q,
* There is also padding on the right (padded_width - width).
*/
static int remove_pad_from_frame(struct atomisp_device *isp,
struct atomisp_css_frame *in_frame, __u32 width, __u32 height)
struct atomisp_css_frame *in_frame, __u32 width, __u32 height)
{
unsigned int i;
unsigned short *buffer;
@ -1205,7 +1205,7 @@ static int atomisp_mmap(struct file *file, struct vm_area_struct *vma)
}
ret = remove_pad_from_frame(isp, raw_virt_addr,
pipe->pix.width, pipe->pix.height);
pipe->pix.width, pipe->pix.height);
if (ret < 0) {
dev_err(isp->dev, "remove pad failed.\n");
goto error;
@ -1258,7 +1258,7 @@ static int atomisp_file_mmap(struct file *file, struct vm_area_struct *vma)
}
static __poll_t atomisp_poll(struct file *file,
struct poll_table_struct *pt)
struct poll_table_struct *pt)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_device *isp = video_get_drvdata(vdev);

10
drivers/staging/media/atomisp/pci/atomisp2/atomisp_fops.h
View File

@ -22,10 +22,10 @@
#include "atomisp_subdev.h"
int atomisp_q_video_buffers_to_css(struct atomisp_sub_device *asd,
struct atomisp_video_pipe *pipe,
enum atomisp_input_stream_id stream_id,
enum atomisp_css_buffer_type css_buf_type,
enum atomisp_css_pipe_id css_pipe_id);
struct atomisp_video_pipe *pipe,
enum atomisp_input_stream_id stream_id,
enum atomisp_css_buffer_type css_buf_type,
enum atomisp_css_pipe_id css_pipe_id);
unsigned int atomisp_dev_users(struct atomisp_device *isp);
unsigned int atomisp_sub_dev_users(struct atomisp_sub_device *asd);
@ -35,7 +35,7 @@ unsigned int atomisp_sub_dev_users(struct atomisp_sub_device *asd);
*/
int atomisp_videobuf_mmap_mapper(struct videobuf_queue *q,
struct vm_area_struct *vma);
struct vm_area_struct *vma);
int atomisp_qbuf_to_css(struct atomisp_device *isp,
struct atomisp_video_pipe *pipe,

2
drivers/staging/media/atomisp/pci/atomisp2/atomisp_internal.h
View File

@ -295,7 +295,7 @@ extern struct device *atomisp_dev;
#define atomisp_is_wdt_running(a) timer_pending(&(a)->wdt)
#ifdef ISP2401
void atomisp_wdt_refresh_pipe(struct atomisp_video_pipe *pipe,
unsigned int delay);
unsigned int delay);
#endif
void atomisp_wdt_refresh(struct atomisp_sub_device *asd, unsigned int delay);
#ifndef ISP2401

239
drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.c
View File

@ -282,7 +282,7 @@ static struct v4l2_queryctrl ci_v4l2_controls[] = {
.name = "3a lock",
.minimum = 0,
.maximum = V4L2_LOCK_EXPOSURE | V4L2_LOCK_WHITE_BALANCE
| V4L2_LOCK_FOCUS,
| V4L2_LOCK_FOCUS,
.step = 1,
.default_value = 0,
},
@ -504,7 +504,7 @@ const struct atomisp_format_bridge atomisp_output_fmts[] = {
},
#if 0
{
/* This is a custom format being used by M10MO to send the RAW data */
/* This is a custom format being used by M10MO to send the RAW data */
.pixelformat = V4L2_PIX_FMT_CUSTOM_M10MO_RAW,
.depth = 8,
.mbus_code = V4L2_MBUS_FMT_CUSTOM_M10MO_RAW,
@ -515,7 +515,7 @@ const struct atomisp_format_bridge atomisp_output_fmts[] = {
};
const struct atomisp_format_bridge *atomisp_get_format_bridge(
unsigned int pixelformat)
unsigned int pixelformat)
{
unsigned int i;
@ -528,7 +528,7 @@ const struct atomisp_format_bridge *atomisp_get_format_bridge(
}
const struct atomisp_format_bridge *atomisp_get_format_bridge_from_mbus(
u32 mbus_code)
u32 mbus_code)
{
unsigned int i;
@ -560,7 +560,7 @@ static int atomisp_querycap(struct file *file, void *fh,
strncpy(cap->bus_info, BUS_INFO, sizeof(cap->card) - 1);
cap->device_caps = V4L2_CAP_VIDEO_CAPTURE |
V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_OUTPUT;
V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_OUTPUT;
cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
return 0;
}
@ -569,7 +569,7 @@ static int atomisp_querycap(struct file *file, void *fh,
* enum input are used to check primary/secondary camera
*/
static int atomisp_enum_input(struct file *file, void *fh,
struct v4l2_input *input)
struct v4l2_input *input)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_device *isp = video_get_drvdata(vdev);
@ -621,13 +621,13 @@ static int atomisp_enum_input(struct file *file, void *fh,
}
static unsigned int atomisp_subdev_streaming_count(
struct atomisp_sub_device *asd)
struct atomisp_sub_device *asd)
{
return asd->video_out_preview.capq.streaming
+ asd->video_out_capture.capq.streaming
+ asd->video_out_video_capture.capq.streaming
+ asd->video_out_vf.capq.streaming
+ asd->video_in.capq.streaming;
+ asd->video_out_capture.capq.streaming
+ asd->video_out_video_capture.capq.streaming
+ asd->video_out_vf.capq.streaming
+ asd->video_in.capq.streaming;
}
unsigned int atomisp_streaming_count(struct atomisp_device *isp)
@ -636,7 +636,7 @@ unsigned int atomisp_streaming_count(struct atomisp_device *isp)
for (i = 0, sum = 0; i < isp->num_of_streams; i++)
sum += isp->asd[i].streaming ==
ATOMISP_DEVICE_STREAMING_ENABLED;
ATOMISP_DEVICE_STREAMING_ENABLED;
return sum;
}
@ -693,8 +693,8 @@ static int atomisp_s_input(struct file *file, void *fh, unsigned int input)
*/
if (isp->inputs[input].asd && isp->inputs[input].asd != asd) {
dev_err(isp->dev,
"%s, camera is already used by stream: %d\n", __func__,
isp->inputs[input].asd->index);
"%s, camera is already used by stream: %d\n", __func__,
isp->inputs[input].asd->index);
ret = -EBUSY;
goto error;
}
@ -708,7 +708,7 @@ static int atomisp_s_input(struct file *file, void *fh, unsigned int input)
if (atomisp_subdev_streaming_count(asd)) {
dev_err(isp->dev,
"ISP is still streaming, stop first\n");
"ISP is still streaming, stop first\n");
ret = -EINVAL;
goto error;
}
@ -720,7 +720,7 @@ static int atomisp_s_input(struct file *file, void *fh, unsigned int input)
core, s_power, 0);
if (ret)
dev_warn(isp->dev,
"Failed to power-off sensor\n");
"Failed to power-off sensor\n");
/* clear the asd field to show this camera is not used */
isp->inputs[asd->input_curr].asd = NULL;
}
@ -739,7 +739,7 @@ static int atomisp_s_input(struct file *file, void *fh, unsigned int input)
/* select operating sensor */
ret = v4l2_subdev_call(isp->inputs[input].camera, video, s_routing,
0, isp->inputs[input].sensor_index, 0);
0, isp->inputs[input].sensor_index, 0);
if (ret && (ret != -ENOIOCTLCMD)) {
dev_err(isp->dev, "Failed to select sensor\n");
goto error;
@ -771,7 +771,7 @@ static int atomisp_s_input(struct file *file, void *fh, unsigned int input)
}
static int atomisp_enum_fmt_cap(struct file *file, void *fh,
struct v4l2_fmtdesc *f)
struct v4l2_fmtdesc *f)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_device *isp = video_get_drvdata(vdev);
@ -784,9 +784,10 @@ static int atomisp_enum_fmt_cap(struct file *file, void *fh,
rval = v4l2_subdev_call(isp->inputs[asd->input_curr].camera, pad,
enum_mbus_code, NULL, &code);
if (rval == -ENOIOCTLCMD) {
dev_warn(isp->dev, "enum_mbus_code pad op not supported. Please fix your sensor driver!\n");
// rval = v4l2_subdev_call(isp->inputs[asd->input_curr].camera,
// video, enum_mbus_fmt, 0, &code.code);
dev_warn(isp->dev,
"enum_mbus_code pad op not supported. Please fix your sensor driver!\n");
// rval = v4l2_subdev_call(isp->inputs[asd->input_curr].camera,
// video, enum_mbus_fmt, 0, &code.code);
}
rt_mutex_unlock(&isp->mutex);
@ -795,7 +796,7 @@ static int atomisp_enum_fmt_cap(struct file *file, void *fh,
for (i = 0; i < ARRAY_SIZE(atomisp_output_fmts); i++) {
const struct atomisp_format_bridge *format =
&atomisp_output_fmts[i];
&atomisp_output_fmts[i];
/*
* Is the atomisp-supported format is valid for the
@ -821,7 +822,7 @@ static int atomisp_enum_fmt_cap(struct file *file, void *fh,
}
static int atomisp_g_fmt_cap(struct file *file, void *fh,
struct v4l2_format *f)
struct v4l2_format *f)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_device *isp = video_get_drvdata(vdev);
@ -835,7 +836,7 @@ static int atomisp_g_fmt_cap(struct file *file, void *fh,
}
static int atomisp_g_fmt_file(struct file *file, void *fh,
struct v4l2_format *f)
struct v4l2_format *f)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_device *isp = video_get_drvdata(vdev);
@ -850,7 +851,7 @@ static int atomisp_g_fmt_file(struct file *file, void *fh,
/* This function looks up the closest available resolution. */
static int atomisp_try_fmt_cap(struct file *file, void *fh,
struct v4l2_format *f)
struct v4l2_format *f)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_device *isp = video_get_drvdata(vdev);
@ -863,7 +864,7 @@ static int atomisp_try_fmt_cap(struct file *file, void *fh,
}
static int atomisp_s_fmt_cap(struct file *file, void *fh,
struct v4l2_format *f)
struct v4l2_format *f)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_device *isp = video_get_drvdata(vdev);
@ -881,7 +882,7 @@ static int atomisp_s_fmt_cap(struct file *file, void *fh,
}
static int atomisp_s_fmt_file(struct file *file, void *fh,
struct v4l2_format *f)
struct v4l2_format *f)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_device *isp = video_get_drvdata(vdev);
@ -925,7 +926,7 @@ static void atomisp_videobuf_free_queue(struct videobuf_queue *q)
}
int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd,
uint16_t stream_id)
uint16_t stream_id)
{
struct atomisp_device *isp = asd->isp;
struct atomisp_s3a_buf *s3a_buf = NULL, *_s3a_buf;
@ -933,11 +934,11 @@ int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd,
struct atomisp_metadata_buf *md_buf = NULL, *_md_buf;
int count;
struct atomisp_css_dvs_grid_info *dvs_grid_info =
atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info);
atomisp_css_get_dvs_grid_info(&asd->params.curr_grid_info);
unsigned int i;
if (list_empty(&asd->s3a_stats) &&
asd->params.curr_grid_info.s3a_grid.enable) {
asd->params.curr_grid_info.s3a_grid.enable) {
count = ATOMISP_CSS_Q_DEPTH +
ATOMISP_S3A_BUF_QUEUE_DEPTH_FOR_HAL;
dev_dbg(isp->dev, "allocating %d 3a buffers\n", count);
@ -947,7 +948,7 @@ int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd,
goto error;
if (atomisp_css_allocate_stat_buffers(
asd, stream_id, s3a_buf, NULL, NULL)) {
asd, stream_id, s3a_buf, NULL, NULL)) {
kfree(s3a_buf);
goto error;
}
@ -957,7 +958,7 @@ int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd,
}
if (list_empty(&asd->dis_stats) && dvs_grid_info &&
dvs_grid_info->enable) {
dvs_grid_info->enable) {
count = ATOMISP_CSS_Q_DEPTH + 1;
dev_dbg(isp->dev, "allocating %d dis buffers\n", count);
while (count--) {
@ -967,7 +968,7 @@ int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd,
goto error;
}
if (atomisp_css_allocate_stat_buffers(
asd, stream_id, NULL, dis_buf, NULL)) {
asd, stream_id, NULL, dis_buf, NULL)) {
kfree(dis_buf);
goto error;
}
@ -991,7 +992,7 @@ int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd,
goto error;
if (atomisp_css_allocate_stat_buffers(
asd, stream_id, NULL, NULL, md_buf)) {
asd, stream_id, NULL, NULL, md_buf)) {
kfree(md_buf);
goto error;
}
@ -1018,7 +1019,7 @@ int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd,
for (i = 0; i < ATOMISP_METADATA_TYPE_NUM; i++) {
list_for_each_entry_safe(md_buf, _md_buf, &asd->metadata[i],
list) {
list) {
atomisp_css_free_metadata_buffer(md_buf);
list_del(&md_buf->list);
kfree(md_buf);
@ -1031,7 +1032,7 @@ int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd,
* Initiate Memory Mapping or User Pointer I/O
*/
int __atomisp_reqbufs(struct file *file, void *fh,
struct v4l2_requestbuffers *req)
struct v4l2_requestbuffers *req)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev);
@ -1052,10 +1053,10 @@ int __atomisp_reqbufs(struct file *file, void *fh,
mutex_unlock(&pipe->capq.vb_lock);
/* clear request config id */
memset(pipe->frame_request_config_id, 0,
VIDEO_MAX_FRAME * sizeof(unsigned int));
VIDEO_MAX_FRAME * sizeof(unsigned int));
memset(pipe->frame_params, 0,
VIDEO_MAX_FRAME *
sizeof(struct atomisp_css_params_with_list *));
VIDEO_MAX_FRAME *
sizeof(struct atomisp_css_params_with_list *));
return 0;
}
@ -1102,7 +1103,7 @@ int __atomisp_reqbufs(struct file *file, void *fh,
}
int atomisp_reqbufs(struct file *file, void *fh,
struct v4l2_requestbuffers *req)
struct v4l2_requestbuffers *req)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_device *isp = video_get_drvdata(vdev);
@ -1116,7 +1117,7 @@ int atomisp_reqbufs(struct file *file, void *fh,
}
static int atomisp_reqbufs_file(struct file *file, void *fh,
struct v4l2_requestbuffers *req)
struct v4l2_requestbuffers *req)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev);
@ -1133,7 +1134,7 @@ static int atomisp_reqbufs_file(struct file *file, void *fh,
/* application query the status of a buffer */
static int atomisp_querybuf(struct file *file, void *fh,
struct v4l2_buffer *buf)
struct v4l2_buffer *buf)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev);
@ -1142,7 +1143,7 @@ static int atomisp_querybuf(struct file *file, void *fh,
}
static int atomisp_querybuf_file(struct file *file, void *fh,
struct v4l2_buffer *buf)
struct v4l2_buffer *buf)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev);
@ -1178,13 +1179,13 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf)
if (asd->streaming == ATOMISP_DEVICE_STREAMING_STOPPING) {
dev_err(isp->dev, "%s: reject, as ISP at stopping.\n",
__func__);
__func__);
ret = -EIO;
goto error;
}
if (!buf || buf->index >= VIDEO_MAX_FRAME ||
!pipe->capq.bufs[buf->index]) {
!pipe->capq.bufs[buf->index]) {
dev_err(isp->dev, "Invalid index for qbuf.\n");
ret = -EINVAL;
goto error;
@ -1211,7 +1212,7 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf)
goto done;
if (atomisp_get_css_frame_info(asd,
atomisp_subdev_source_pad(vdev), &frame_info)) {
atomisp_subdev_source_pad(vdev), &frame_info)) {
ret = -EIO;
goto error;
}
@ -1220,28 +1221,28 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf)
#ifdef CONFIG_ION
#ifndef ISP2401
attributes.type = buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_ION
? HRT_USR_ION : HRT_USR_PTR;
? HRT_USR_ION : HRT_USR_PTR;
#else
if (buf->reserved & ATOMISP_BUFFER_TYPE_IS_ION) {
attributes.type = HRT_USR_ION;
if (asd->ion_dev_fd->val != ION_FD_UNSET) {
dev_dbg(isp->dev, "ION buffer queued, share_fd=%lddev_fd=%d.\n",
buf->m.userptr, asd->ion_dev_fd->val);
buf->m.userptr, asd->ion_dev_fd->val);
/*
* Make sure the shared fd we just got
* from user space isn't larger than
* the space we have for it.
*/
if ((buf->m.userptr &
(ATOMISP_ION_DEVICE_FD_MASK)) != 0) {
(ATOMISP_ION_DEVICE_FD_MASK)) != 0) {
dev_err(isp->dev,
"Error: v4l2 buffer fd:0X%0lX > 0XFFFF.\n",
buf->m.userptr);
"Error: v4l2 buffer fd:0X%0lX > 0XFFFF.\n",
buf->m.userptr);
ret = -EINVAL;
goto error;
}
buf->m.userptr |= asd->ion_dev_fd->val <<
ATOMISP_ION_DEVICE_FD_OFFSET;
ATOMISP_ION_DEVICE_FD_OFFSET;
} else {
dev_err(isp->dev, "v4l2 buffer type is ION, \
but no dev fd set from userspace.\n");
@ -1256,8 +1257,8 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf)
attributes.type = HRT_USR_PTR;
#endif
ret = atomisp_css_frame_map(&handle, &frame_info,
(void __user *)buf->m.userptr,
0, &attributes);
(void __user *)buf->m.userptr,
0, &attributes);
if (ret) {
dev_err(isp->dev, "Failed to map user buffer\n");
goto error;
@ -1290,8 +1291,9 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf)
(buf->reserved2 & ATOMISP_BUFFER_HAS_PER_FRAME_SETTING)) {
/* this buffer will have a per-frame parameter */
pipe->frame_request_config_id[buf->index] = buf->reserved2 &
~ATOMISP_BUFFER_HAS_PER_FRAME_SETTING;
dev_dbg(isp->dev, "This buffer requires per_frame setting which has isp_config_id %d\n",
~ATOMISP_BUFFER_HAS_PER_FRAME_SETTING;
dev_dbg(isp->dev,
"This buffer requires per_frame setting which has isp_config_id %d\n",
pipe->frame_request_config_id[buf->index]);
} else {
pipe->frame_request_config_id[buf->index] = 0;
@ -1318,7 +1320,7 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf)
atomisp_wdt_start(asd);
#else
if (!atomisp_is_wdt_running(pipe) &&
atomisp_buffers_queued_pipe(pipe))
atomisp_buffers_queued_pipe(pipe))
atomisp_wdt_start(pipe);
#endif
}
@ -1341,7 +1343,7 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf)
asd->pending_capture_request++;
dev_dbg(isp->dev, "Add one pending capture request.\n");
#else
if (asd->re_trigger_capture) {
if (asd->re_trigger_capture) {
ret = atomisp_css_offline_capture_configure(asd,
asd->params.offline_parm.num_captures,
asd->params.offline_parm.skip_frames,
@ -1350,11 +1352,11 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf)
dev_dbg(isp->dev, "%s Trigger capture again ret=%d\n",
__func__, ret);
} else {
} else {
asd->pending_capture_request++;
asd->re_trigger_capture = false;
dev_dbg(isp->dev, "Add one pending capture request.\n");
}
}
#endif
}
rt_mutex_unlock(&isp->mutex);
@ -1370,7 +1372,7 @@ static int atomisp_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf)
}
static int atomisp_qbuf_file(struct file *file, void *fh,
struct v4l2_buffer *buf)
struct v4l2_buffer *buf)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_device *isp = video_get_drvdata(vdev);
@ -1384,7 +1386,7 @@ static int atomisp_qbuf_file(struct file *file, void *fh,
}
if (!buf || buf->index >= VIDEO_MAX_FRAME ||
!pipe->outq.bufs[buf->index]) {
!pipe->outq.bufs[buf->index]) {
dev_err(isp->dev, "Invalid index for qbuf.\n");
ret = -EINVAL;
goto error;
@ -1412,7 +1414,7 @@ static int atomisp_qbuf_file(struct file *file, void *fh,
}
static int __get_frame_exp_id(struct atomisp_video_pipe *pipe,
struct v4l2_buffer *buf)
struct v4l2_buffer *buf)
{
struct videobuf_vmalloc_memory *vm_mem;
struct atomisp_css_frame *handle;
@ -1449,7 +1451,7 @@ static int atomisp_dqbuf(struct file *file, void *fh, struct v4l2_buffer *buf)
if (asd->streaming == ATOMISP_DEVICE_STREAMING_STOPPING) {
rt_mutex_unlock(&isp->mutex);
dev_err(isp->dev, "%s: reject, as ISP at stopping.\n",
__func__);
__func__);
return -EIO;
}
@ -1476,7 +1478,8 @@ static int atomisp_dqbuf(struct file *file, void *fh, struct v4l2_buffer *buf)
buf->reserved2 = pipe->frame_config_id[buf->index];
rt_mutex_unlock(&isp->mutex);
dev_dbg(isp->dev, "dqbuf buffer %d (%s) for asd%d with exp_id %d, isp_config_id %d\n",
dev_dbg(isp->dev,
"dqbuf buffer %d (%s) for asd%d with exp_id %d, isp_config_id %d\n",
buf->index, vdev->name, asd->index, buf->reserved >> 16,
buf->reserved2);
return 0;
@ -1515,7 +1518,7 @@ enum atomisp_css_pipe_id atomisp_get_css_pipe_id(struct atomisp_sub_device *asd)
case ATOMISP_RUN_MODE_VIDEO:
return CSS_PIPE_ID_VIDEO;
case ATOMISP_RUN_MODE_STILL_CAPTURE:
/* fall through */
/* fall through */
default:
return CSS_PIPE_ID_CAPTURE;
}
@ -1540,8 +1543,8 @@ static unsigned int atomisp_sensor_start_stream(struct atomisp_sub_device *asd)
if (asd->run_mode->val == ATOMISP_RUN_MODE_VIDEO ||
(asd->run_mode->val == ATOMISP_RUN_MODE_STILL_CAPTURE &&
!atomisp_is_mbuscode_raw(
asd->fmt[
asd->capture_pad].fmt.code) &&
asd->fmt[
asd->capture_pad].fmt.code) &&
!asd->continuous_mode->val))
return 2;
else
@ -1562,7 +1565,7 @@ int atomisp_stream_on_master_slave_sensor(struct atomisp_device *isp,
int sensor_index = isp->asd[i].input_curr;
if (isp->inputs[sensor_index].camera_caps->
sensor[isp->asd[i].sensor_curr].is_slave)
sensor[isp->asd[i].sensor_curr].is_slave)
slave = sensor_index;
else
master = sensor_index;
@ -1612,11 +1615,11 @@ int atomisp_stream_on_master_slave_sensor(struct atomisp_device *isp,
/* FIXME! */
#ifndef ISP2401
static void __wdt_on_master_slave_sensor(struct atomisp_device *isp,
unsigned int wdt_duration)
unsigned int wdt_duration)
#else
static void __wdt_on_master_slave_sensor(struct atomisp_video_pipe *pipe,
unsigned int wdt_duration,
bool enable)
unsigned int wdt_duration,
bool enable)
#endif
{
#ifndef ISP2401
@ -1649,7 +1652,7 @@ static void atomisp_pause_buffer_event(struct atomisp_device *isp)
int sensor_index = isp->asd[i].input_curr;
if (isp->inputs[sensor_index].camera_caps->
sensor[isp->asd[i].sensor_curr].is_slave) {
sensor[isp->asd[i].sensor_curr].is_slave) {
v4l2_event_queue(isp->asd[i].subdev.devnode, &event);
break;
}
@ -1678,7 +1681,7 @@ static void atomisp_dma_burst_len_cfg(struct atomisp_sub_device *asd)
* This ioctl start the capture during streaming I/O.
*/
static int atomisp_streamon(struct file *file, void *fh,
enum v4l2_buf_type type)
enum v4l2_buf_type type)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev);
@ -1757,7 +1760,7 @@ static int atomisp_streamon(struct file *file, void *fh,
flush_work(&asd->delayed_init_work);
rt_mutex_unlock(&isp->mutex);
if (wait_for_completion_interruptible(
&asd->init_done) != 0)
&asd->init_done) != 0)
return -ERESTARTSYS;
rt_mutex_lock(&isp->mutex);
}
@ -1810,7 +1813,7 @@ static int atomisp_streamon(struct file *file, void *fh,
atomisp_apply_css_parameters(asd, &asd->params.css_param);
if (asd->params.css_param.update_flag.dz_config)
atomisp_css_set_dz_config(asd,
&asd->params.css_param.dz_config);
&asd->params.css_param.dz_config);
atomisp_css_update_isp_params(asd);
asd->params.css_update_params_needed = false;
memset(&asd->params.css_param.update_flag, 0,
@ -1852,7 +1855,7 @@ static int atomisp_streamon(struct file *file, void *fh,
if (!isp->sw_contex.file_input) {
atomisp_css_irq_enable(isp, CSS_IRQ_INFO_CSS_RECEIVER_SOF,
atomisp_css_valid_sof(isp));
atomisp_css_valid_sof(isp));
atomisp_csi2_configure(asd);
/*
* set freq to max when streaming count > 1 which indicate
@ -1860,11 +1863,11 @@ static int atomisp_streamon(struct file *file, void *fh,
*/
if (atomisp_streaming_count(isp) > 1) {
if (atomisp_freq_scaling(isp,
ATOMISP_DFS_MODE_MAX, false) < 0)
ATOMISP_DFS_MODE_MAX, false) < 0)
dev_dbg(isp->dev, "dfs failed!\n");
} else {
if (atomisp_freq_scaling(isp,
ATOMISP_DFS_MODE_AUTO, false) < 0)
ATOMISP_DFS_MODE_AUTO, false) < 0)
dev_dbg(isp->dev, "dfs failed!\n");
}
} else {
@ -1873,7 +1876,7 @@ static int atomisp_streamon(struct file *file, void *fh,
}
if (asd->depth_mode->val && atomisp_streaming_count(isp) ==
ATOMISP_DEPTH_SENSOR_STREAMON_COUNT) {
ATOMISP_DEPTH_SENSOR_STREAMON_COUNT) {
ret = atomisp_stream_on_master_slave_sensor(isp, false);
if (ret) {
dev_err(isp->dev, "master slave sensor stream on failed!\n");
@ -1886,7 +1889,7 @@ static int atomisp_streamon(struct file *file, void *fh,
#endif
goto start_delay_wq;
} else if (asd->depth_mode->val && (atomisp_streaming_count(isp) <
ATOMISP_DEPTH_SENSOR_STREAMON_COUNT)) {
ATOMISP_DEPTH_SENSOR_STREAMON_COUNT)) {
#ifdef ISP2401
__wdt_on_master_slave_sensor(pipe, wdt_duration, false);
#endif
@ -1895,7 +1898,7 @@ static int atomisp_streamon(struct file *file, void *fh,
/* Enable the CSI interface on ANN B0/K0 */
if (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<
ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)) {
ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)) {
pci_write_config_word(isp->pdev, MRFLD_PCI_CSI_CONTROL,
isp->saved_regs.csi_control |
MRFLD_PCI_CSI_CONTROL_CSI_READY);
@ -1923,14 +1926,14 @@ static int atomisp_streamon(struct file *file, void *fh,
struct v4l2_mbus_framefmt *sink;
sink = atomisp_subdev_get_ffmt(&asd->subdev, NULL,
V4L2_SUBDEV_FORMAT_ACTIVE,
ATOMISP_SUBDEV_PAD_SINK);
V4L2_SUBDEV_FORMAT_ACTIVE,
ATOMISP_SUBDEV_PAD_SINK);
reinit_completion(&asd->init_done);
asd->delayed_init = ATOMISP_DELAYED_INIT_QUEUED;
queue_work(asd->delayed_init_workq, &asd->delayed_init_work);
atomisp_css_set_cont_prev_start_time(isp,
ATOMISP_CALC_CSS_PREV_OVERLAP(sink->height));
ATOMISP_CALC_CSS_PREV_OVERLAP(sink->height));
} else {
asd->delayed_init = ATOMISP_DELAYED_INIT_NOT_QUEUED;
}
@ -1971,20 +1974,20 @@ int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type)
* case of continuous capture
*/
if ((asd->continuous_mode->val ||
isp->inputs[asd->input_curr].camera_caps->multi_stream_ctrl) &&
isp->inputs[asd->input_curr].camera_caps->multi_stream_ctrl) &&
atomisp_subdev_source_pad(vdev) !=
ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW &&
ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW &&
atomisp_subdev_source_pad(vdev) !=
ATOMISP_SUBDEV_PAD_SOURCE_VIDEO) {
ATOMISP_SUBDEV_PAD_SOURCE_VIDEO) {
if (isp->inputs[asd->input_curr].camera_caps->multi_stream_ctrl) {
v4l2_subdev_call(isp->inputs[asd->input_curr].camera,
video, s_stream, 0);
video, s_stream, 0);
} else if (atomisp_subdev_source_pad(vdev)
== ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE) {
== ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE) {
/* stop continuous still capture if needed */
if (asd->params.offline_parm.num_captures == -1)
atomisp_css_offline_capture_configure(asd,
0, 0, 0);
0, 0, 0);
atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_AUTO, false);
}
/*
@ -2035,7 +2038,7 @@ int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type)
*/
if (isp->sw_contex.file_input)
v4l2_subdev_call(isp->inputs[asd->input_curr].camera,
video, s_stream, 0);
video, s_stream, 0);
rt_mutex_lock(&isp->mutex);
atomisp_acc_unload_extensions(asd);
@ -2057,7 +2060,7 @@ int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type)
if (!isp->sw_contex.file_input)
atomisp_css_irq_enable(isp, CSS_IRQ_INFO_CSS_RECEIVER_SOF,
false);
false);
if (asd->delayed_init == ATOMISP_DELAYED_INIT_QUEUED) {
cancel_work_sync(&asd->delayed_init_work);
@ -2127,7 +2130,7 @@ int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type)
/* Disable the CSI interface on ANN B0/K0 */
if (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<
ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)) {
ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)) {
pci_write_config_word(isp->pdev, MRFLD_PCI_CSI_CONTROL,
isp->saved_regs.csi_control &
~MRFLD_PCI_CSI_CONTROL_CSI_READY);
@ -2157,14 +2160,14 @@ int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type)
for (i = 0; i < isp->num_of_streams; i++) {
if (isp->asd[i].stream_prepared) {
atomisp_destroy_pipes_stream_force(&isp->
asd[i]);
asd[i]);
recreate_streams[i] = true;
}
}
/* disable PUNIT/ISP acknowlede/handshake - SRSE=3 */
pci_write_config_dword(isp->pdev, PCI_I_CONTROL, isp->saved_regs.i_control |
MRFLD_PCI_I_CONTROL_SRSE_RESET_MASK);
MRFLD_PCI_I_CONTROL_SRSE_RESET_MASK);
dev_err(isp->dev, "atomisp_reset");
atomisp_reset(isp);
for (i = 0; i < isp->num_of_streams; i++) {
@ -2198,7 +2201,7 @@ static int atomisp_streamoff(struct file *file, void *fh,
* call this ioctl with a pointer to this structure
*/
static int atomisp_g_ctrl(struct file *file, void *fh,
struct v4l2_control *control)
struct v4l2_control *control)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd;
@ -2400,7 +2403,7 @@ static int atomisp_queryctl(struct file *file, void *fh,
}
static int atomisp_camera_g_ext_ctrls(struct file *file, void *fh,
struct v4l2_ext_controls *c)
struct v4l2_ext_controls *c)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd;
@ -2475,8 +2478,8 @@ static int atomisp_camera_g_ext_ctrls(struct file *file, void *fh,
break;
case V4L2_CID_G_SKIP_FRAMES:
ret = v4l2_subdev_call(
isp->inputs[asd->input_curr].camera,
sensor, g_skip_frames, (u32 *)&ctrl.value);
isp->inputs[asd->input_curr].camera,
sensor, g_skip_frames, (u32 *)&ctrl.value);
break;
default:
ret = -EINVAL;
@ -2493,7 +2496,7 @@ static int atomisp_camera_g_ext_ctrls(struct file *file, void *fh,
/* This ioctl allows the application to get multiple controls by class */
static int atomisp_g_ext_ctrls(struct file *file, void *fh,
struct v4l2_ext_controls *c)
struct v4l2_ext_controls *c)
{
struct v4l2_control ctrl;
int i, ret = 0;
@ -2518,7 +2521,7 @@ static int atomisp_g_ext_ctrls(struct file *file, void *fh,
}
static int atomisp_camera_s_ext_ctrls(struct file *file, void *fh,
struct v4l2_ext_controls *c)
struct v4l2_ext_controls *c)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd;
@ -2589,7 +2592,7 @@ static int atomisp_camera_s_ext_ctrls(struct file *file, void *fh,
* flash state */
if (ctrl.id == V4L2_CID_FLASH_MODE) {
asd->params.flash_state =
ATOMISP_FLASH_IDLE;
ATOMISP_FLASH_IDLE;
asd->params.num_flash_frames = 0;
}
}
@ -2619,7 +2622,7 @@ static int atomisp_camera_s_ext_ctrls(struct file *file, void *fh,
/* This ioctl allows the application to set multiple controls by class */
static int atomisp_s_ext_ctrls(struct file *file, void *fh,
struct v4l2_ext_controls *c)
struct v4l2_ext_controls *c)
{
struct v4l2_control ctrl;
int i, ret = 0;
@ -2647,7 +2650,7 @@ static int atomisp_s_ext_ctrls(struct file *file, void *fh,
* vidioc_g/s_param are used to switch isp running mode
*/
static int atomisp_g_parm(struct file *file, void *fh,
struct v4l2_streamparm *parm)
struct v4l2_streamparm *parm)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_sub_device *asd = atomisp_to_video_pipe(vdev)->asd;
@ -2666,7 +2669,7 @@ static int atomisp_g_parm(struct file *file, void *fh,
}
static int atomisp_s_parm(struct file *file, void *fh,
struct v4l2_streamparm *parm)
struct v4l2_streamparm *parm)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_device *isp = video_get_drvdata(vdev);
@ -2728,7 +2731,7 @@ static int atomisp_s_parm(struct file *file, void *fh,
}
static int atomisp_s_parm_file(struct file *file, void *fh,
struct v4l2_streamparm *parm)
struct v4l2_streamparm *parm)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_device *isp = video_get_drvdata(vdev);
@ -2746,7 +2749,7 @@ static int atomisp_s_parm_file(struct file *file, void *fh,
}
static long atomisp_vidioc_default(struct file *file, void *fh,
bool valid_prio, unsigned int cmd, void *arg)
bool valid_prio, unsigned int cmd, void *arg)
{
struct video_device *vdev = video_devdata(file);
struct atomisp_device *isp = video_get_drvdata(vdev);
@ -2837,14 +2840,14 @@ static long atomisp_vidioc_default(struct file *file, void *fh,
case ATOMISP_IOC_S_DIS_COEFS:
err = atomisp_css_cp_dvs2_coefs(asd, arg,
&asd->params.css_param, true);
&asd->params.css_param, true);
if (!err && arg)
asd->params.css_update_params_needed = true;
break;
case ATOMISP_IOC_S_DIS_VECTOR:
err = atomisp_cp_dvs_6axis_config(asd, arg,
&asd->params.css_param, true);
&asd->params.css_param, true);
if (!err && arg)
asd->params.css_update_params_needed = true;
break;
@ -2945,17 +2948,17 @@ static long atomisp_vidioc_default(struct file *file, void *fh,
#endif
#ifndef ISP2401
err = v4l2_subdev_call(
isp->inputs[asd->input_curr].motor,
core, ioctl, cmd, arg);
isp->inputs[asd->input_curr].motor,
core, ioctl, cmd, arg);
#else
err = v4l2_subdev_call(
isp->motor,
core, ioctl, cmd, arg);
isp->motor,
core, ioctl, cmd, arg);
#endif
else
err = v4l2_subdev_call(
isp->inputs[asd->input_curr].camera,
core, ioctl, cmd, arg);
isp->inputs[asd->input_curr].camera,
core, ioctl, cmd, arg);
break;
case ATOMISP_IOC_S_EXPOSURE:
@ -2969,7 +2972,7 @@ static long atomisp_vidioc_default(struct file *file, void *fh,
case ATOMISP_IOC_G_UPDATE_EXPOSURE:
#endif
err = v4l2_subdev_call(isp->inputs[asd->input_curr].camera,
core, ioctl, cmd, arg);
core, ioctl, cmd, arg);
break;
case ATOMISP_IOC_ACC_LOAD:
@ -3031,7 +3034,7 @@ static long atomisp_vidioc_default(struct file *file, void *fh,
break;
case ATOMISP_IOC_EXT_ISP_CTRL:
err = v4l2_subdev_call(isp->inputs[asd->input_curr].camera,
core, ioctl, cmd, arg);
core, ioctl, cmd, arg);
break;
case ATOMISP_IOC_EXP_ID_UNLOCK:
err = atomisp_exp_id_unlock(asd, arg);

17
drivers/staging/media/atomisp/pci/atomisp2/atomisp_ioctl.h
View File

@ -28,27 +28,27 @@ struct atomisp_video_pipe;
extern const struct atomisp_format_bridge atomisp_output_fmts[];
const struct atomisp_format_bridge *atomisp_get_format_bridge(
unsigned int pixelformat);
unsigned int pixelformat);
#ifndef ISP2401
const struct atomisp_format_bridge *atomisp_get_format_bridge_from_mbus(
u32 mbus_code);
u32 mbus_code);
#else
const struct atomisp_format_bridge *atomisp_get_format_bridge_from_mbus(u32
mbus_code);
mbus_code);
#endif
int atomisp_alloc_css_stat_bufs(struct atomisp_sub_device *asd,
uint16_t stream_id);
uint16_t stream_id);
int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type);
int __atomisp_reqbufs(struct file *file, void *fh,
struct v4l2_requestbuffers *req);
struct v4l2_requestbuffers *req);
int atomisp_reqbufs(struct file *file, void *fh,
struct v4l2_requestbuffers *req);
struct v4l2_requestbuffers *req);
enum atomisp_css_pipe_id atomisp_get_css_pipe_id(struct atomisp_sub_device
*asd);
*asd);
void atomisp_videobuf_free_buf(struct videobuf_buffer *vb);
@ -65,5 +65,6 @@ unsigned int atomisp_is_acc_enabled(struct atomisp_device *isp);
long atomisp_compat_ioctl32(struct file *file,
unsigned int cmd, unsigned long arg);
int atomisp_stream_on_master_slave_sensor(struct atomisp_device *isp, bool isp_timeout);
int atomisp_stream_on_master_slave_sensor(struct atomisp_device *isp,
bool isp_timeout);
#endif /* __ATOMISP_IOCTL_H__ */

176
drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.c
View File

@ -101,7 +101,7 @@ const struct atomisp_in_fmt_conv *atomisp_find_in_fmt_conv(u32 code)
}
const struct atomisp_in_fmt_conv *atomisp_find_in_fmt_conv_by_atomisp_in_fmt(
enum atomisp_input_format atomisp_in_fmt)
enum atomisp_input_format atomisp_in_fmt)
{
int i;
@ -124,7 +124,7 @@ bool atomisp_subdev_format_conversion(struct atomisp_sub_device *asd,
V4L2_SUBDEV_FORMAT_ACTIVE, source_pad);
return atomisp_is_mbuscode_raw(sink->code)
&& !atomisp_is_mbuscode_raw(src->code);
&& !atomisp_is_mbuscode_raw(src->code);
}
uint16_t atomisp_subdev_source_pad(struct video_device *vdev)
@ -154,7 +154,7 @@ uint16_t atomisp_subdev_source_pad(struct video_device *vdev)
* Return 0 on success or a negative error code otherwise.
*/
static long isp_subdev_ioctl(struct v4l2_subdev *sd,
unsigned int cmd, void *arg)
unsigned int cmd, void *arg)
{
return 0;
}
@ -189,7 +189,7 @@ static int isp_subdev_subscribe_event(struct v4l2_subdev *sd,
return -EINVAL;
if (sub->type == V4L2_EVENT_FRAME_SYNC &&
!atomisp_css_valid_sof(isp))
!atomisp_css_valid_sof(isp))
return -EINVAL;
return v4l2_event_subscribe(fh, sub, 16, NULL);
@ -243,9 +243,9 @@ static int isp_subdev_validate_rect(struct v4l2_subdev *sd, uint32_t pad,
}
struct v4l2_rect *atomisp_subdev_get_rect(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
u32 which, uint32_t pad,
uint32_t target)
struct v4l2_subdev_pad_config *cfg,
u32 which, uint32_t pad,
uint32_t target)
{
struct atomisp_sub_device *isp_sd = v4l2_get_subdevdata(sd);
@ -305,7 +305,7 @@ static void isp_subdev_propagate(struct v4l2_subdev *sd,
{
struct v4l2_mbus_framefmt *ffmt[ATOMISP_SUBDEV_PADS_NUM];
struct v4l2_rect *crop[ATOMISP_SUBDEV_PADS_NUM],
*comp[ATOMISP_SUBDEV_PADS_NUM];
*comp[ATOMISP_SUBDEV_PADS_NUM];
if (flags & V4L2_SEL_FLAG_KEEP_CONFIG)
return;
@ -338,7 +338,7 @@ static int isp_subdev_get_selection(struct v4l2_subdev *sd,
return rval;
rec = atomisp_subdev_get_rect(sd, cfg, sel->which, sel->pad,
sel->target);
sel->target);
if (!rec)
return -EINVAL;
@ -350,7 +350,8 @@ static char *atomisp_pad_str[] = { "ATOMISP_SUBDEV_PAD_SINK",
"ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE",
"ATOMISP_SUBDEV_PAD_SOURCE_VF",
"ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW",
"ATOMISP_SUBDEV_PAD_SOURCE_VIDEO"};
"ATOMISP_SUBDEV_PAD_SOURCE_VIDEO"
};
int atomisp_subdev_set_selection(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
@ -362,7 +363,7 @@ int atomisp_subdev_set_selection(struct v4l2_subdev *sd,
struct v4l2_mbus_framefmt *ffmt[ATOMISP_SUBDEV_PADS_NUM];
u16 vdev_pad = atomisp_subdev_source_pad(sd->devnode);
struct v4l2_rect *crop[ATOMISP_SUBDEV_PADS_NUM],
*comp[ATOMISP_SUBDEV_PADS_NUM];
*comp[ATOMISP_SUBDEV_PADS_NUM];
enum atomisp_input_stream_id stream_id;
unsigned int i;
unsigned int padding_w = pad_w;
@ -394,7 +395,7 @@ int atomisp_subdev_set_selection(struct v4l2_subdev *sd,
/* Workaround for BYT 1080p perfectshot since the maxinum resolution of
* front camera ov2722 is 1932x1092 and cannot use pad_w > 12*/
if (!strncmp(isp->inputs[isp_sd->input_curr].camera->name,
"ov2722", 6) && crop[pad]->height == 1092) {
"ov2722", 6) && crop[pad]->height == 1092) {
padding_w = 12;
padding_h = 12;
}
@ -436,8 +437,8 @@ int atomisp_subdev_set_selection(struct v4l2_subdev *sd,
struct v4l2_rect tmp = *crop[pad];
atomisp_subdev_set_selection(
sd, cfg, which, i, V4L2_SEL_TGT_COMPOSE,
flags, &tmp);
sd, cfg, which, i, V4L2_SEL_TGT_COMPOSE,
flags, &tmp);
}
}
@ -463,7 +464,7 @@ int atomisp_subdev_set_selection(struct v4l2_subdev *sd,
atomisp_css_video_set_dis_envelope(isp_sd, dvs_w, dvs_h);
atomisp_css_input_set_effective_resolution(isp_sd, stream_id,
crop[pad]->width, crop[pad]->height);
crop[pad]->width, crop[pad]->height);
break;
}
@ -487,8 +488,8 @@ int atomisp_subdev_set_selection(struct v4l2_subdev *sd,
comp[pad]->height = r->height;
if (r->width == 0 || r->height == 0 ||
crop[ATOMISP_SUBDEV_PAD_SINK]->width == 0 ||
crop[ATOMISP_SUBDEV_PAD_SINK]->height == 0)
crop[ATOMISP_SUBDEV_PAD_SINK]->width == 0 ||
crop[ATOMISP_SUBDEV_PAD_SINK]->height == 0)
break;
/*
* do cropping on sensor input if ratio of required resolution
@ -505,20 +506,20 @@ int atomisp_subdev_set_selection(struct v4l2_subdev *sd,
*
*/
if (r->width * crop[ATOMISP_SUBDEV_PAD_SINK]->height <
crop[ATOMISP_SUBDEV_PAD_SINK]->width * r->height)
crop[ATOMISP_SUBDEV_PAD_SINK]->width * r->height)
atomisp_css_input_set_effective_resolution(isp_sd,
stream_id,
rounddown(crop[ATOMISP_SUBDEV_PAD_SINK]->
height * r->width / r->height,
ATOM_ISP_STEP_WIDTH),
height * r->width / r->height,
ATOM_ISP_STEP_WIDTH),
crop[ATOMISP_SUBDEV_PAD_SINK]->height);
else
atomisp_css_input_set_effective_resolution(isp_sd,
stream_id,
crop[ATOMISP_SUBDEV_PAD_SINK]->width,
rounddown(crop[ATOMISP_SUBDEV_PAD_SINK]->
width * r->height / r->width,
ATOM_ISP_STEP_WIDTH));
width * r->height / r->width,
ATOM_ISP_STEP_WIDTH));
break;
}
@ -568,7 +569,7 @@ static int atomisp_get_sensor_bin_factor(struct atomisp_sub_device *asd)
int ret;
if (isp->inputs[asd->input_curr].type == FILE_INPUT ||
isp->inputs[asd->input_curr].type == TEST_PATTERN)
isp->inputs[asd->input_curr].type == TEST_PATTERN)
return 0;
ctrl.id = V4L2_CID_BIN_FACTOR_HORZ;
@ -601,7 +602,7 @@ void atomisp_subdev_set_ffmt(struct v4l2_subdev *sd,
struct atomisp_sub_device *isp_sd = v4l2_get_subdevdata(sd);
struct atomisp_device *isp = isp_sd->isp;
struct v4l2_mbus_framefmt *__ffmt =
atomisp_subdev_get_ffmt(sd, cfg, which, pad);
atomisp_subdev_get_ffmt(sd, cfg, which, pad);
u16 vdev_pad = atomisp_subdev_source_pad(sd->devnode);
enum atomisp_input_stream_id stream_id;
@ -615,7 +616,7 @@ void atomisp_subdev_set_ffmt(struct v4l2_subdev *sd,
switch (pad) {
case ATOMISP_SUBDEV_PAD_SINK: {
const struct atomisp_in_fmt_conv *fc =
atomisp_find_in_fmt_conv(ffmt->code);
atomisp_find_in_fmt_conv(ffmt->code);
if (!fc) {
fc = atomisp_in_fmt_conv;
@ -631,14 +632,14 @@ void atomisp_subdev_set_ffmt(struct v4l2_subdev *sd,
if (which == V4L2_SUBDEV_FORMAT_ACTIVE) {
atomisp_css_input_set_resolution(isp_sd,
stream_id, ffmt);
stream_id, ffmt);
atomisp_css_input_set_binning_factor(isp_sd,
stream_id,
atomisp_get_sensor_bin_factor(isp_sd));
stream_id,
atomisp_get_sensor_bin_factor(isp_sd));
atomisp_css_input_set_bayer_order(isp_sd, stream_id,
fc->bayer_order);
atomisp_css_input_set_format(isp_sd, stream_id,
fc->css_stream_fmt);
fc->css_stream_fmt);
atomisp_css_set_default_isys_config(isp_sd, stream_id,
ffmt);
}
@ -694,9 +695,9 @@ static int isp_subdev_set_format(struct v4l2_subdev *sd,
/* V4L2 subdev core operations */
static const struct v4l2_subdev_core_ops isp_subdev_v4l2_core_ops = {
.ioctl = isp_subdev_ioctl, .s_power = isp_subdev_set_power,
.subscribe_event = isp_subdev_subscribe_event,
.unsubscribe_event = isp_subdev_unsubscribe_event,
.ioctl = isp_subdev_ioctl, .s_power = isp_subdev_set_power,
.subscribe_event = isp_subdev_subscribe_event,
.unsubscribe_event = isp_subdev_unsubscribe_event,
};
/* V4L2 subdev pad operations */
@ -743,8 +744,8 @@ static void isp_subdev_init_params(struct atomisp_sub_device *asd)
* return -EINVAL or zero on success
*/
static int isp_subdev_link_setup(struct media_entity *entity,
const struct media_pad *local,
const struct media_pad *remote, u32 flags)
const struct media_pad *local,
const struct media_pad *remote, u32 flags)
{
struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
struct atomisp_sub_device *isp_sd = v4l2_get_subdevdata(sd);
@ -776,8 +777,8 @@ static int isp_subdev_link_setup(struct media_entity *entity,
/* read from memory */
if (flags & MEDIA_LNK_FL_ENABLED) {
if (isp_sd->input >= ATOMISP_SUBDEV_INPUT_CSI2_PORT1 &&
isp_sd->input < (ATOMISP_SUBDEV_INPUT_CSI2_PORT1
+ ATOMISP_CAMERA_NR_PORTS))
isp_sd->input < (ATOMISP_SUBDEV_INPUT_CSI2_PORT1
+ ATOMISP_CAMERA_NR_PORTS))
return -EBUSY;
isp_sd->input = ATOMISP_SUBDEV_INPUT_MEMORY;
} else {
@ -811,9 +812,9 @@ static int isp_subdev_link_setup(struct media_entity *entity,
/* media operations */
static const struct media_entity_operations isp_subdev_media_ops = {
.link_setup = isp_subdev_link_setup,
.link_validate = v4l2_subdev_link_validate,
/* .set_power = v4l2_subdev_set_power, */
.link_setup = isp_subdev_link_setup,
.link_validate = v4l2_subdev_link_validate,
/* .set_power = v4l2_subdev_set_power, */
};
static int __atomisp_update_run_mode(struct atomisp_sub_device *asd)
@ -853,14 +854,15 @@ int atomisp_update_run_mode(struct atomisp_sub_device *asd)
static int s_ctrl(struct v4l2_ctrl *ctrl)
{
struct atomisp_sub_device *asd = container_of(
ctrl->handler, struct atomisp_sub_device, ctrl_handler);
ctrl->handler, struct atomisp_sub_device, ctrl_handler);
switch (ctrl->id) {
case V4L2_CID_RUN_MODE:
return __atomisp_update_run_mode(asd);
case V4L2_CID_DEPTH_MODE:
if (asd->streaming != ATOMISP_DEVICE_STREAMING_DISABLED) {
dev_err(asd->isp->dev, "ISP is streaming, it is not supported to change the depth mode\n");
dev_err(asd->isp->dev,
"ISP is streaming, it is not supported to change the depth mode\n");
return -EINVAL;
}
break;
@ -884,7 +886,7 @@ static const struct v4l2_ctrl_config ctrl_fmt_auto = {
.def = 1,
};
static const char * const ctrl_run_mode_menu[] = {
static const char *const ctrl_run_mode_menu[] = {
NULL,
"Video",
"Still capture",
@ -903,7 +905,7 @@ static const struct v4l2_ctrl_config ctrl_run_mode = {
.qmenu = ctrl_run_mode_menu,
};
static const char * const ctrl_vfpp_mode_menu[] = {
static const char *const ctrl_vfpp_mode_menu[] = {
"Enable", /* vfpp always enabled */
"Disable to scaler mode", /* CSS into video mode and disable */
"Disable to low latency mode", /* CSS into still mode and disable */
@ -1064,20 +1066,20 @@ static const struct v4l2_ctrl_config ctrl_select_isp_version = {
* this fd will be used to map shared fd to buffer.
*/
static const struct v4l2_ctrl_config ctrl_ion_dev_fd = {
.ops = &ctrl_ops,
.id = V4L2_CID_ATOMISP_ION_DEVICE_FD,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Ion Device Fd",
.min = -1,
.max = 1024,
.step = 1,
.def = ION_FD_UNSET
.ops = &ctrl_ops,
.id = V4L2_CID_ATOMISP_ION_DEVICE_FD,
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Ion Device Fd",
.min = -1,
.max = 1024,
.step = 1,
.def = ION_FD_UNSET
};
#endif
#endif
static void atomisp_init_subdev_pipe(struct atomisp_sub_device *asd,
struct atomisp_video_pipe *pipe, enum v4l2_buf_type buf_type)
struct atomisp_video_pipe *pipe, enum v4l2_buf_type buf_type)
{
pipe->type = buf_type;
pipe->asd = asd;
@ -1091,11 +1093,11 @@ static void atomisp_init_subdev_pipe(struct atomisp_sub_device *asd,
0, VIDEO_MAX_FRAME * sizeof(unsigned int));
memset(pipe->frame_params,
0, VIDEO_MAX_FRAME *
sizeof(struct atomisp_css_params_with_list *));
sizeof(struct atomisp_css_params_with_list *));
}
static void atomisp_init_acc_pipe(struct atomisp_sub_device *asd,
struct atomisp_acc_pipe *pipe)
struct atomisp_acc_pipe *pipe)
{
pipe->asd = asd;
pipe->isp = asd->isp;
@ -1131,15 +1133,15 @@ static int isp_subdev_init_entities(struct atomisp_sub_device *asd)
pads[ATOMISP_SUBDEV_PAD_SOURCE_VIDEO].flags = MEDIA_PAD_FL_SOURCE;
asd->fmt[ATOMISP_SUBDEV_PAD_SINK].fmt.code =
MEDIA_BUS_FMT_SBGGR10_1X10;
MEDIA_BUS_FMT_SBGGR10_1X10;
asd->fmt[ATOMISP_SUBDEV_PAD_SOURCE_PREVIEW].fmt.code =
MEDIA_BUS_FMT_SBGGR10_1X10;
MEDIA_BUS_FMT_SBGGR10_1X10;
asd->fmt[ATOMISP_SUBDEV_PAD_SOURCE_VF].fmt.code =
MEDIA_BUS_FMT_SBGGR10_1X10;
MEDIA_BUS_FMT_SBGGR10_1X10;
asd->fmt[ATOMISP_SUBDEV_PAD_SOURCE_CAPTURE].fmt.code =
MEDIA_BUS_FMT_SBGGR10_1X10;
MEDIA_BUS_FMT_SBGGR10_1X10;
asd->fmt[ATOMISP_SUBDEV_PAD_SOURCE_VIDEO].fmt.code =
MEDIA_BUS_FMT_SBGGR10_1X10;
MEDIA_BUS_FMT_SBGGR10_1X10;
me->ops = &isp_subdev_media_ops;
me->function = MEDIA_ENT_F_V4L2_SUBDEV_UNKNOWN;
@ -1191,44 +1193,44 @@ static int isp_subdev_init_entities(struct atomisp_sub_device *asd)
return ret;
asd->fmt_auto = v4l2_ctrl_new_custom(&asd->ctrl_handler,
&ctrl_fmt_auto, NULL);
&ctrl_fmt_auto, NULL);
asd->run_mode = v4l2_ctrl_new_custom(&asd->ctrl_handler,
&ctrl_run_mode, NULL);
&ctrl_run_mode, NULL);
asd->vfpp = v4l2_ctrl_new_custom(&asd->ctrl_handler,
&ctrl_vfpp, NULL);
&ctrl_vfpp, NULL);
asd->continuous_mode = v4l2_ctrl_new_custom(&asd->ctrl_handler,
&ctrl_continuous_mode, NULL);
&ctrl_continuous_mode, NULL);
asd->continuous_viewfinder = v4l2_ctrl_new_custom(&asd->ctrl_handler,
&ctrl_continuous_viewfinder,
NULL);
&ctrl_continuous_viewfinder,
NULL);
asd->continuous_raw_buffer_size =
v4l2_ctrl_new_custom(&asd->ctrl_handler,
&ctrl_continuous_raw_buffer_size,
NULL);
v4l2_ctrl_new_custom(&asd->ctrl_handler,
&ctrl_continuous_raw_buffer_size,
NULL);
asd->enable_raw_buffer_lock =
v4l2_ctrl_new_custom(&asd->ctrl_handler,
&ctrl_enable_raw_buffer_lock,
NULL);
v4l2_ctrl_new_custom(&asd->ctrl_handler,
&ctrl_enable_raw_buffer_lock,
NULL);
asd->depth_mode =
v4l2_ctrl_new_custom(&asd->ctrl_handler,
&ctrl_depth_mode,
NULL);
v4l2_ctrl_new_custom(&asd->ctrl_handler,
&ctrl_depth_mode,
NULL);
asd->disable_dz =
v4l2_ctrl_new_custom(&asd->ctrl_handler,
&ctrl_disable_dz,
NULL);
v4l2_ctrl_new_custom(&asd->ctrl_handler,
&ctrl_disable_dz,
NULL);
#ifdef ISP2401
asd->select_isp_version =
v4l2_ctrl_new_custom(&asd->ctrl_handler,
&ctrl_select_isp_version,
NULL);
v4l2_ctrl_new_custom(&asd->ctrl_handler,
&ctrl_select_isp_version,
NULL);
#ifdef CONFIG_ION
asd->ion_dev_fd =
v4l2_ctrl_new_custom(&asd->ctrl_handler,
&ctrl_ion_dev_fd,
NULL);
v4l2_ctrl_new_custom(&asd->ctrl_handler,
&ctrl_ion_dev_fd,
NULL);
#endif
#endif
@ -1258,7 +1260,7 @@ int atomisp_create_pads_links(struct atomisp_device *isp)
for (i = 0; i < isp->input_cnt - 2; i++) {
ret = media_create_pad_link(&isp->inputs[i].camera->entity, 0,
&isp->csi2_port[isp->inputs[i].
port].subdev.entity,
port].subdev.entity,
CSI2_PAD_SINK,
MEDIA_LNK_FL_ENABLED |
MEDIA_LNK_FL_IMMUTABLE);
@ -1320,7 +1322,7 @@ void atomisp_subdev_cleanup_pending_events(struct atomisp_sub_device *asd)
unsigned int i, pending_event;
list_for_each_entry_safe(fh, fh_tmp,
&asd->subdev.devnode->fh_list, list) {
&asd->subdev.devnode->fh_list, list) {
pending_event = v4l2_event_pending(fh);
for (i = 0; i < pending_event; i++)
v4l2_event_dequeue(fh, &event, 1);
@ -1340,7 +1342,7 @@ void atomisp_subdev_unregister_entities(struct atomisp_sub_device *asd)
}
int atomisp_subdev_register_entities(struct atomisp_sub_device *asd,
struct v4l2_device *vdev)
struct v4l2_device *vdev)
{
int ret;
@ -1405,7 +1407,7 @@ int atomisp_subdev_init(struct atomisp_device *isp)
*/
isp->num_of_streams = 2;
isp->asd = devm_kzalloc(isp->dev, sizeof(struct atomisp_sub_device) *
isp->num_of_streams, GFP_KERNEL);
isp->num_of_streams, GFP_KERNEL);
if (!isp->asd)
return -ENOMEM;
for (i = 0; i < isp->num_of_streams; i++) {

19
drivers/staging/media/atomisp/pci/atomisp2/atomisp_subdev.h
View File

@ -341,7 +341,7 @@ struct atomisp_sub_device {
unsigned int dis_bufs_in_css;
unsigned int metadata_bufs_in_css
[ATOMISP_INPUT_STREAM_NUM][CSS_PIPE_ID_NUM];
[ATOMISP_INPUT_STREAM_NUM][CSS_PIPE_ID_NUM];
/* The list of free and available metadata buffers for CSS */
struct list_head metadata[ATOMISP_METADATA_TYPE_NUM];
/* The list of metadata buffers which have been en-queued to CSS */
@ -395,7 +395,8 @@ struct atomisp_sub_device {
bool copy_mode; /* CSI2+ use copy mode */
bool yuvpp_mode; /* CSI2+ yuvpp pipe */
int raw_buffer_bitmap[ATOMISP_MAX_EXP_ID / 32 + 1]; /* Record each Raw Buffer lock status */
int raw_buffer_bitmap[ATOMISP_MAX_EXP_ID / 32 +
1]; /* Record each Raw Buffer lock status */
int raw_buffer_locked_count;
spinlock_t raw_buffer_bitmap_lock;
@ -424,11 +425,11 @@ bool atomisp_subdev_is_compressed(u32 code);
const struct atomisp_in_fmt_conv *atomisp_find_in_fmt_conv(u32 code);
#ifndef ISP2401
const struct atomisp_in_fmt_conv *atomisp_find_in_fmt_conv_by_atomisp_in_fmt(
enum atomisp_input_format atomisp_in_fmt);
enum atomisp_input_format atomisp_in_fmt);
#else
const struct atomisp_in_fmt_conv
*atomisp_find_in_fmt_conv_by_atomisp_in_fmt(enum atomisp_input_format
atomisp_in_fmt);
*atomisp_find_in_fmt_conv_by_atomisp_in_fmt(enum atomisp_input_format
atomisp_in_fmt);
#endif
const struct atomisp_in_fmt_conv *atomisp_find_in_fmt_conv_compressed(u32 code);
bool atomisp_subdev_format_conversion(struct atomisp_sub_device *asd,
@ -441,9 +442,9 @@ struct v4l2_mbus_framefmt
struct v4l2_subdev_pad_config *cfg, uint32_t which,
uint32_t pad);
struct v4l2_rect *atomisp_subdev_get_rect(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
u32 which, uint32_t pad,
uint32_t target);
struct v4l2_subdev_pad_config *cfg,
u32 which, uint32_t pad,
uint32_t target);
int atomisp_subdev_set_selection(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
u32 which, uint32_t pad, uint32_t target,
@ -459,7 +460,7 @@ void atomisp_subdev_cleanup_pending_events(struct atomisp_sub_device *asd);
void atomisp_subdev_unregister_entities(struct atomisp_sub_device *asd);
int atomisp_subdev_register_entities(struct atomisp_sub_device *asd,
struct v4l2_device *vdev);
struct v4l2_device *vdev);
int atomisp_subdev_init(struct atomisp_device *isp);
void atomisp_subdev_cleanup(struct atomisp_device *isp);
int atomisp_create_pads_links(struct atomisp_device *isp);

226
drivers/staging/media/atomisp/pci/atomisp2/atomisp_tables.h
View File

@ -42,146 +42,146 @@ static struct atomisp_css_cc_config mono_cc_config = {
/*Skin whiten image effect table*/
static struct atomisp_css_macc_table skin_low_macc_table = {
.data = {
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
7168, 0, 2048, 8192,
5120, -1024, 2048, 8192,
8192, 2048, -1024, 5120,
8192, 2048, 0, 7168,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
7168, 0, 2048, 8192,
5120, -1024, 2048, 8192,
8192, 2048, -1024, 5120,
8192, 2048, 0, 7168,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192
}
};
static struct atomisp_css_macc_table skin_medium_macc_table = {
.data = {
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
5120, 0, 6144, 8192,
3072, -1024, 2048, 6144,
6144, 2048, -1024, 3072,
8192, 6144, 0, 5120,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
5120, 0, 6144, 8192,
3072, -1024, 2048, 6144,
6144, 2048, -1024, 3072,
8192, 6144, 0, 5120,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192
}
};
static struct atomisp_css_macc_table skin_high_macc_table = {
.data = {
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
4096, 0, 8192, 8192,
0, -2048, 4096, 6144,
6144, 4096, -2048, 0,
8192, 8192, 0, 4096,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
4096, 0, 8192, 8192,
0, -2048, 4096, 6144,
6144, 4096, -2048, 0,
8192, 8192, 0, 4096,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192
}
};
/*Blue enhencement image effect table*/
static struct atomisp_css_macc_table blue_macc_table = {
.data = {
9728, -3072, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
9728, 0, -3072, 8192,
12800, 1536, -3072, 8192,
11264, 0, 0, 11264,
9728, -3072, 0, 11264
9728, -3072, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
9728, 0, -3072, 8192,
12800, 1536, -3072, 8192,
11264, 0, 0, 11264,
9728, -3072, 0, 11264
}
};
/*Green enhencement image effect table*/
static struct atomisp_css_macc_table green_macc_table = {
.data = {
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
10240, 4096, 0, 8192,
10240, 4096, 0, 12288,
12288, 0, 0, 12288,
14336, -2048, 4096, 8192,
10240, 0, 4096, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
10240, 4096, 0, 8192,
10240, 4096, 0, 12288,
12288, 0, 0, 12288,
14336, -2048, 4096, 8192,
10240, 0, 4096, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192,
8192, 0, 0, 8192
}
};
static struct atomisp_css_ctc_table vivid_ctc_table = {
.data.vamem_2 = {
0, 384, 837, 957, 1011, 1062, 1083, 1080,
1078, 1077, 1053, 1039, 1012, 992, 969, 951,
929, 906, 886, 866, 845, 823, 809, 790,
772, 758, 741, 726, 711, 701, 688, 675,
666, 656, 648, 639, 633, 626, 618, 612,
603, 594, 582, 572, 557, 545, 529, 516,
504, 491, 480, 467, 459, 447, 438, 429,
419, 412, 404, 397, 389, 382, 376, 368,
363, 357, 351, 345, 340, 336, 330, 326,
321, 318, 312, 308, 304, 300, 297, 294,
291, 286, 284, 281, 278, 275, 271, 268,
261, 257, 251, 245, 240, 235, 232, 225,
223, 218, 213, 209, 206, 204, 199, 197,
193, 189, 186, 185, 183, 179, 177, 175,
172, 170, 169, 167, 164, 164, 162, 160,
158, 157, 156, 154, 154, 152, 151, 150,
149, 148, 146, 147, 146, 144, 143, 143,
142, 141, 140, 141, 139, 138, 138, 138,
137, 136, 136, 135, 134, 134, 134, 133,
132, 132, 131, 130, 131, 130, 129, 128,
129, 127, 127, 127, 127, 125, 125, 125,
123, 123, 122, 120, 118, 115, 114, 111,
110, 108, 106, 105, 103, 102, 100, 99,
97, 97, 96, 95, 94, 93, 93, 91,
91, 91, 90, 90, 89, 89, 88, 88,
89, 88, 88, 87, 87, 87, 87, 86,
87, 87, 86, 87, 86, 86, 84, 84,
82, 80, 78, 76, 74, 72, 70, 68,
67, 65, 62, 60, 58, 56, 55, 54,
53, 51, 49, 49, 47, 45, 45, 45,
41, 40, 39, 39, 34, 33, 34, 32,
25, 23, 24, 20, 13, 9, 12, 0,
0
0, 384, 837, 957, 1011, 1062, 1083, 1080,
1078, 1077, 1053, 1039, 1012, 992, 969, 951,
929, 906, 886, 866, 845, 823, 809, 790,
772, 758, 741, 726, 711, 701, 688, 675,
666, 656, 648, 639, 633, 626, 618, 612,
603, 594, 582, 572, 557, 545, 529, 516,
504, 491, 480, 467, 459, 447, 438, 429,
419, 412, 404, 397, 389, 382, 376, 368,
363, 357, 351, 345, 340, 336, 330, 326,
321, 318, 312, 308, 304, 300, 297, 294,
291, 286, 284, 281, 278, 275, 271, 268,
261, 257, 251, 245, 240, 235, 232, 225,
223, 218, 213, 209, 206, 204, 199, 197,
193, 189, 186, 185, 183, 179, 177, 175,
172, 170, 169, 167, 164, 164, 162, 160,
158, 157, 156, 154, 154, 152, 151, 150,
149, 148, 146, 147, 146, 144, 143, 143,
142, 141, 140, 141, 139, 138, 138, 138,
137, 136, 136, 135, 134, 134, 134, 133,
132, 132, 131, 130, 131, 130, 129, 128,
129, 127, 127, 127, 127, 125, 125, 125,
123, 123, 122, 120, 118, 115, 114, 111,
110, 108, 106, 105, 103, 102, 100, 99,
97, 97, 96, 95, 94, 93, 93, 91,
91, 91, 90, 90, 89, 89, 88, 88,
89, 88, 88, 87, 87, 87, 87, 86,
87, 87, 86, 87, 86, 86, 84, 84,
82, 80, 78, 76, 74, 72, 70, 68,
67, 65, 62, 60, 58, 56, 55, 54,
53, 51, 49, 49, 47, 45, 45, 45,
41, 40, 39, 39, 34, 33, 34, 32,
25, 23, 24, 20, 13, 9, 12, 0,
0
}
};
#endif

2
drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.c
View File

@ -117,7 +117,7 @@ void atomisp_tpg_unregister_entities(struct atomisp_tpg_device *tpg)
}
int atomisp_tpg_register_entities(struct atomisp_tpg_device *tpg,
struct v4l2_device *vdev)
struct v4l2_device *vdev)
{
int ret;
/* Register the subdev and video nodes. */

2
drivers/staging/media/atomisp/pci/atomisp2/atomisp_tpg.h
View File

@ -33,6 +33,6 @@ void atomisp_tpg_cleanup(struct atomisp_device *isp);
int atomisp_tpg_init(struct atomisp_device *isp);
void atomisp_tpg_unregister_entities(struct atomisp_tpg_device *tpg);
int atomisp_tpg_register_entities(struct atomisp_tpg_device *tpg,
struct v4l2_device *vdev);
struct v4l2_device *vdev);
#endif /* __ATOMISP_TPG_H__ */

84
drivers/staging/media/atomisp/pci/atomisp2/atomisp_trace_event.h
View File

@ -24,14 +24,14 @@
#include <linux/string.h>
TRACE_EVENT(camera_meminfo,
TP_PROTO(const char *name, int uptr_size, int counter, int sys_size,
int sys_res_size, int cam_sys_use, int cam_dyc_use,
int cam_res_use),
TP_PROTO(const char *name, int uptr_size, int counter, int sys_size,
int sys_res_size, int cam_sys_use, int cam_dyc_use,
int cam_res_use),
TP_ARGS(name, uptr_size, counter, sys_size, sys_res_size, cam_sys_use,
cam_dyc_use, cam_res_use),
TP_ARGS(name, uptr_size, counter, sys_size, sys_res_size, cam_sys_use,
cam_dyc_use, cam_res_use),
TP_STRUCT__entry(
TP_STRUCT__entry(
__array(char, name, 24)
__field(int, uptr_size)
__field(int, counter)
@ -40,9 +40,9 @@ TRACE_EVENT(camera_meminfo,
__field(int, cam_res_use)
__field(int, cam_dyc_use)
__field(int, cam_sys_use)
),
),
TP_fast_assign(
TP_fast_assign(
strlcpy(__entry->name, name, 24);
__entry->uptr_size = uptr_size;
__entry->counter = counter;
@ -51,72 +51,72 @@ TRACE_EVENT(camera_meminfo,
__entry->cam_res_use = cam_res_use;
__entry->cam_dyc_use = cam_dyc_use;
__entry->cam_sys_use = cam_sys_use;
),
),
TP_printk(
TP_printk(
"<%s> User ptr memory:%d pages,\tISP private memory used:%d pages:\tsysFP system size:%d,\treserved size:%d\tcamFP sysUse:%d,\tdycUse:%d,\tresUse:%d.\n",
__entry->name, __entry->uptr_size, __entry->counter,
__entry->sys_size, __entry->sys_res_size, __entry->cam_sys_use,
__entry->cam_dyc_use, __entry->cam_res_use)
);
);
TRACE_EVENT(camera_debug,
TP_PROTO(const char *name, char *info, const int line),
TP_PROTO(const char *name, char *info, const int line),
TP_ARGS(name, info, line),
TP_ARGS(name, info, line),
TP_STRUCT__entry(
TP_STRUCT__entry(
__array(char, name, 24)
__array(char, info, 24)
__field(int, line)
),
),
TP_fast_assign(
TP_fast_assign(
strlcpy(__entry->name, name, 24);
strlcpy(__entry->info, info, 24);
__entry->line = line;
),
),
TP_printk("<%s>-<%d> %s\n", __entry->name, __entry->line,
__entry->info)
);
TP_printk("<%s>-<%d> %s\n", __entry->name, __entry->line,
__entry->info)
);
TRACE_EVENT(ipu_cstate,
TP_PROTO(int cstate),
TP_PROTO(int cstate),
TP_ARGS(cstate),
TP_ARGS(cstate),
TP_STRUCT__entry(
__field(int, cstate)
),
TP_STRUCT__entry(
__field(int, cstate)
),
TP_fast_assign(
__entry->cstate = cstate;
),
TP_fast_assign(
__entry->cstate = cstate;
),
TP_printk("cstate=%d", __entry->cstate)
);
TP_printk("cstate=%d", __entry->cstate)
);
TRACE_EVENT(ipu_pstate,
TP_PROTO(int freq, int util),
TP_PROTO(int freq, int util),
TP_ARGS(freq, util),
TP_ARGS(freq, util),
TP_STRUCT__entry(
__field(int, freq)
__field(int, util)
),
TP_STRUCT__entry(
__field(int, freq)
__field(int, util)
),
TP_fast_assign(
__entry->freq = freq;
__entry->util = util;
),
TP_fast_assign(
__entry->freq = freq;
__entry->util = util;
),
TP_printk("freq=%d util=%d", __entry->freq, __entry->util)
);
TP_printk("freq=%d util=%d", __entry->freq, __entry->util)
);
#endif
#undef TRACE_INCLUDE_PATH

190
drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.c
View File

@ -56,24 +56,24 @@ MODULE_PARM_DESC(skip_fwload, "Skip atomisp firmware load");
static unsigned int repool_pgnr;
module_param(repool_pgnr, uint, 0644);
MODULE_PARM_DESC(repool_pgnr,
"Set the reserved memory pool size in page (default:0)");
"Set the reserved memory pool size in page (default:0)");
/* set dynamic memory pool size in page */
unsigned int dypool_pgnr = UINT_MAX;
module_param(dypool_pgnr, uint, 0644);
MODULE_PARM_DESC(dypool_pgnr,
"Set the dynamic memory pool size in page (default:0)");
"Set the dynamic memory pool size in page (default:0)");
bool dypool_enable;
module_param(dypool_enable, bool, 0644);
MODULE_PARM_DESC(dypool_enable,
"dynamic memory pool enable/disable (default:disable)");
"dynamic memory pool enable/disable (default:disable)");
/* memory optimization: deferred firmware loading */
bool defer_fw_load;
module_param(defer_fw_load, bool, 0644);
MODULE_PARM_DESC(defer_fw_load,
"Defer FW loading until device is opened (default:disable)");
"Defer FW loading until device is opened (default:disable)");
/* cross componnet debug message flag */
int dbg_level;
@ -84,7 +84,7 @@ MODULE_PARM_DESC(dbg_level, "debug message on/off (default:off)");
int dbg_func = 2;
module_param(dbg_func, int, 0644);
MODULE_PARM_DESC(dbg_func,
"log function switch non/trace_printk/printk (default:printk)");
"log function switch non/trace_printk/printk (default:printk)");
int mipicsi_flag;
module_param(mipicsi_flag, int, 0644);
@ -157,7 +157,7 @@ void atomisp_acc_init(struct atomisp_acc_pipe *video, const char *name)
}
int atomisp_video_register(struct atomisp_video_pipe *video,
struct v4l2_device *vdev)
struct v4l2_device *vdev)
{
int ret;
@ -172,7 +172,7 @@ int atomisp_video_register(struct atomisp_video_pipe *video,
}
int atomisp_acc_register(struct atomisp_acc_pipe *video,
struct v4l2_device *vdev)
struct v4l2_device *vdev)
{
int ret;
@ -219,10 +219,10 @@ static int atomisp_save_iunit_reg(struct atomisp_device *isp)
&isp->saved_regs.pmcs);
/* Ensure read/write combining is enabled. */
pci_read_config_dword(dev, PCI_I_CONTROL,
&isp->saved_regs.i_control);
&isp->saved_regs.i_control);
isp->saved_regs.i_control |=
MRFLD_PCI_I_CONTROL_ENABLE_READ_COMBINING |
MRFLD_PCI_I_CONTROL_ENABLE_WRITE_COMBINING;
MRFLD_PCI_I_CONTROL_ENABLE_READ_COMBINING |
MRFLD_PCI_I_CONTROL_ENABLE_WRITE_COMBINING;
pci_read_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
&isp->saved_regs.csi_access_viol);
pci_read_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL,
@ -236,7 +236,7 @@ static int atomisp_save_iunit_reg(struct atomisp_device *isp)
* For both issues, setting this bit is a workaround.
*/
isp->saved_regs.csi_rcomp_config |=
MRFLD_PCI_CSI_HS_OVR_CLK_GATE_ON_UPDATE;
MRFLD_PCI_CSI_HS_OVR_CLK_GATE_ON_UPDATE;
pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
&isp->saved_regs.csi_afe_dly);
pci_read_config_dword(dev, MRFLD_PCI_CSI_CONTROL,
@ -244,14 +244,14 @@ static int atomisp_save_iunit_reg(struct atomisp_device *isp)
if (isp->media_dev.hw_revision >=
(ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT))
isp->saved_regs.csi_control |=
MRFLD_PCI_CSI_CONTROL_PARPATHEN;
MRFLD_PCI_CSI_CONTROL_PARPATHEN;
/*
* On CHT CSI_READY bit should be enabled before stream on
*/
if (IS_CHT && (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<
ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)))
ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)))
isp->saved_regs.csi_control |=
MRFLD_PCI_CSI_CONTROL_CSI_READY;
MRFLD_PCI_CSI_CONTROL_CSI_READY;
pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
&isp->saved_regs.csi_afe_rcomp_config);
pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
@ -277,24 +277,24 @@ static int __maybe_unused atomisp_restore_iunit_reg(struct atomisp_device *isp)
pci_write_config_dword(dev, PCI_INTERRUPT_CTRL,
isp->saved_regs.interrupt_control);
pci_write_config_dword(dev, PCI_I_CONTROL,
isp->saved_regs.i_control);
isp->saved_regs.i_control);
pci_write_config_dword(dev, MRFLD_PCI_PMCS,
isp->saved_regs.pmcs);
isp->saved_regs.pmcs);
pci_write_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
isp->saved_regs.csi_access_viol);
isp->saved_regs.csi_access_viol);
pci_write_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL,
isp->saved_regs.csi_rcomp_config);
isp->saved_regs.csi_rcomp_config);
pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
isp->saved_regs.csi_afe_dly);
isp->saved_regs.csi_afe_dly);
pci_write_config_dword(dev, MRFLD_PCI_CSI_CONTROL,
isp->saved_regs.csi_control);
isp->saved_regs.csi_control);
pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
isp->saved_regs.csi_afe_rcomp_config);
isp->saved_regs.csi_afe_rcomp_config);
pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
isp->saved_regs.csi_afe_hs_control);
isp->saved_regs.csi_afe_hs_control);
pci_write_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
isp->saved_regs.csi_deadline_control);
isp->saved_regs.csi_deadline_control);
/*
* for MRFLD, Software/firmware needs to write a 1 to bit0
@ -337,8 +337,8 @@ static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp)
atomisp_load_uint32(MRFLD_INTR_STATUS_REG, &irq);
if (irq != 0) {
dev_err(isp->dev,
"%s: fail to clear isp interrupt status reg=0x%x\n",
__func__, irq);
"%s: fail to clear isp interrupt status reg=0x%x\n",
__func__, irq);
spin_unlock_irqrestore(&isp->lock, flags);
return -EAGAIN;
} else {
@ -352,8 +352,8 @@ static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp)
goto done;
}
dev_err(isp->dev,
"%s: error in iunit interrupt. status reg=0x%x\n",
__func__, irq);
"%s: error in iunit interrupt. status reg=0x%x\n",
__func__, irq);
spin_unlock_irqrestore(&isp->lock, flags);
return -EAGAIN;
}
@ -376,10 +376,10 @@ static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp)
return 0;
}
/*
* WA for DDR DVFS enable/disable
* By default, ISP will force DDR DVFS 1600MHz before disable DVFS
*/
/*
* WA for DDR DVFS enable/disable
* By default, ISP will force DDR DVFS 1600MHz before disable DVFS
*/
static void punit_ddr_dvfs_enable(bool enable)
{
int door_bell = 1 << 8;
@ -430,10 +430,10 @@ int atomisp_mrfld_power_down(struct atomisp_device *isp)
while (1) {
iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, &reg_value);
dev_dbg(isp->dev, "power-off in progress, ISPSSPM0: 0x%x\n",
reg_value);
reg_value);
/* wait until ISPSSPM0 bit[25:24] shows 0x3 */
if ((reg_value >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) ==
MRFLD_ISPSSPM0_IUNIT_POWER_OFF) {
MRFLD_ISPSSPM0_IUNIT_POWER_OFF) {
trace_ipu_cstate(0);
return 0;
}
@ -475,10 +475,10 @@ int atomisp_mrfld_power_up(struct atomisp_device *isp)
while (1) {
iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, &reg_value);
dev_dbg(isp->dev, "power-on in progress, ISPSSPM0: 0x%x\n",
reg_value);
reg_value);
/* wait until ISPSSPM0 bit[25:24] shows 0x0 */
if ((reg_value >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) ==
MRFLD_ISPSSPM0_IUNIT_POWER_ON) {
MRFLD_ISPSSPM0_IUNIT_POWER_ON) {
trace_ipu_cstate(1);
return 0;
}
@ -495,7 +495,7 @@ int atomisp_mrfld_power_up(struct atomisp_device *isp)
int atomisp_runtime_suspend(struct device *dev)
{
struct atomisp_device *isp = (struct atomisp_device *)
dev_get_drvdata(dev);
dev_get_drvdata(dev);
int ret;
ret = atomisp_mrfld_pre_power_down(isp);
@ -513,12 +513,12 @@ int atomisp_runtime_suspend(struct device *dev)
int atomisp_runtime_resume(struct device *dev)
{
struct atomisp_device *isp = (struct atomisp_device *)
dev_get_drvdata(dev);
dev_get_drvdata(dev);
int ret;
ret = atomisp_mrfld_power_up(isp);
if (ret)
return ret;
return ret;
cpu_latency_qos_update_request(&isp->pm_qos, isp->max_isr_latency);
if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) {
@ -541,7 +541,7 @@ int atomisp_runtime_resume(struct device *dev)
static int __maybe_unused atomisp_suspend(struct device *dev)
{
struct atomisp_device *isp = (struct atomisp_device *)
dev_get_drvdata(dev);
dev_get_drvdata(dev);
/* FIXME: only has one isp_subdev at present */
struct atomisp_sub_device *asd = &isp->asd[0];
unsigned long flags;
@ -579,7 +579,7 @@ static int __maybe_unused atomisp_suspend(struct device *dev)
static int __maybe_unused atomisp_resume(struct device *dev)
{
struct atomisp_device *isp = (struct atomisp_device *)
dev_get_drvdata(dev);
dev_get_drvdata(dev);
int ret;
ret = atomisp_mrfld_power_up(isp);
@ -638,8 +638,8 @@ int atomisp_csi_lane_config(struct atomisp_device *isp)
int port3_lanes_shift;
if (isp->media_dev.hw_revision <
ATOMISP_HW_REVISION_ISP2401_LEGACY <<
ATOMISP_HW_REVISION_SHIFT) {
ATOMISP_HW_REVISION_ISP2401_LEGACY <<
ATOMISP_HW_REVISION_SHIFT) {
/* Merrifield */
port_config_mask = MRFLD_PORT_CONFIG_MASK;
port3_lanes_shift = MRFLD_PORT3_LANES_SHIFT;
@ -650,8 +650,8 @@ int atomisp_csi_lane_config(struct atomisp_device *isp)
}
if (isp->media_dev.hw_revision <
ATOMISP_HW_REVISION_ISP2401 <<
ATOMISP_HW_REVISION_SHIFT) {
ATOMISP_HW_REVISION_ISP2401 <<
ATOMISP_HW_REVISION_SHIFT) {
/* Merrifield / Moorefield legacy input system */
nportconfigs = MRFLD_PORT_CONFIG_NUM;
} else {
@ -709,12 +709,12 @@ int atomisp_csi_lane_config(struct atomisp_device *isp)
pci_read_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, &csi_control);
csi_control &= ~port_config_mask;
csi_control |= (portconfigs[i].code << MRFLD_PORT_CONFIGCODE_SHIFT)
| (portconfigs[i].lanes[0] ? 0 : (1 << MRFLD_PORT1_ENABLE_SHIFT))
| (portconfigs[i].lanes[1] ? 0 : (1 << MRFLD_PORT2_ENABLE_SHIFT))
| (portconfigs[i].lanes[2] ? 0 : (1 << MRFLD_PORT3_ENABLE_SHIFT))
| (((1 << portconfigs[i].lanes[0]) - 1) << MRFLD_PORT1_LANES_SHIFT)
| (((1 << portconfigs[i].lanes[1]) - 1) << MRFLD_PORT2_LANES_SHIFT)
| (((1 << portconfigs[i].lanes[2]) - 1) << port3_lanes_shift);
| (portconfigs[i].lanes[0] ? 0 : (1 << MRFLD_PORT1_ENABLE_SHIFT))
| (portconfigs[i].lanes[1] ? 0 : (1 << MRFLD_PORT2_ENABLE_SHIFT))
| (portconfigs[i].lanes[2] ? 0 : (1 << MRFLD_PORT3_ENABLE_SHIFT))
| (((1 << portconfigs[i].lanes[0]) - 1) << MRFLD_PORT1_LANES_SHIFT)
| (((1 << portconfigs[i].lanes[1]) - 1) << MRFLD_PORT2_LANES_SHIFT)
| (((1 << portconfigs[i].lanes[2]) - 1) << port3_lanes_shift);
pci_write_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, csi_control);
@ -741,9 +741,9 @@ static int atomisp_subdev_probe(struct atomisp_device *isp)
for (subdevs = pdata->subdevs; subdevs->type; ++subdevs) {
struct v4l2_subdev *subdev;
struct i2c_board_info *board_info =
&subdevs->v4l2_subdev.board_info;
&subdevs->v4l2_subdev.board_info;
struct i2c_adapter *adapter =
i2c_get_adapter(subdevs->v4l2_subdev.i2c_adapter_id);
i2c_get_adapter(subdevs->v4l2_subdev.i2c_adapter_id);
int sensor_num, i;
if (!adapter) {
@ -796,18 +796,18 @@ static int atomisp_subdev_probe(struct atomisp_device *isp)
*/
isp->inputs[isp->input_cnt].frame_size.pixel_format = 0;
isp->inputs[isp->input_cnt].camera_caps =
atomisp_get_default_camera_caps();
atomisp_get_default_camera_caps();
sensor_num = isp->inputs[isp->input_cnt]
.camera_caps->sensor_num;
.camera_caps->sensor_num;
isp->input_cnt++;
for (i = 1; i < sensor_num; i++) {
if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) {
dev_warn(isp->dev,
"atomisp inputs out of range\n");
"atomisp inputs out of range\n");
break;
}
isp->inputs[isp->input_cnt] =
isp->inputs[isp->input_cnt - 1];
isp->inputs[isp->input_cnt - 1];
isp->inputs[isp->input_cnt].sensor_index = i;
isp->input_cnt++;
}
@ -853,7 +853,7 @@ static void atomisp_unregister_entities(struct atomisp_device *isp)
atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]);
list_for_each_entry_safe(sd, next, &isp->v4l2_dev.subdevs, list)
v4l2_device_unregister_subdev(sd);
v4l2_device_unregister_subdev(sd);
v4l2_device_unregister(&isp->v4l2_dev);
media_device_unregister(&isp->media_dev);
@ -885,7 +885,7 @@ static int atomisp_register_entities(struct atomisp_device *isp)
/* Register internal entities */
for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++) {
ret = atomisp_mipi_csi2_register_entities(&isp->csi2_port[i],
&isp->v4l2_dev);
&isp->v4l2_dev);
if (ret == 0)
continue;
@ -894,13 +894,13 @@ static int atomisp_register_entities(struct atomisp_device *isp)
/* deregister all registered CSI ports */
while (i--)
atomisp_mipi_csi2_unregister_entities(
&isp->csi2_port[i]);
&isp->csi2_port[i]);
goto csi_and_subdev_probe_failed;
}
ret =
atomisp_file_input_register_entities(&isp->file_dev, &isp->v4l2_dev);
atomisp_file_input_register_entities(&isp->file_dev, &isp->v4l2_dev);
if (ret < 0) {
dev_err(isp->dev, "atomisp_file_input_register_entities\n");
goto file_input_register_failed;
@ -921,7 +921,7 @@ static int atomisp_register_entities(struct atomisp_device *isp)
"atomisp_subdev_register_entities fail\n");
for (; i > 0; i--)
atomisp_subdev_unregister_entities(
&isp->asd[i - 1]);
&isp->asd[i - 1]);
goto subdev_register_failed;
}
}
@ -932,16 +932,16 @@ static int atomisp_register_entities(struct atomisp_device *isp)
init_completion(&asd->init_done);
asd->delayed_init_workq =
alloc_workqueue(isp->v4l2_dev.name, WQ_CPU_INTENSIVE,
1);
alloc_workqueue(isp->v4l2_dev.name, WQ_CPU_INTENSIVE,
1);
if (!asd->delayed_init_workq) {
dev_err(isp->dev,
"Failed to initialize delayed init workq\n");
"Failed to initialize delayed init workq\n");
ret = -ENOMEM;
for (; i > 0; i--)
destroy_workqueue(isp->asd[i - 1].
delayed_init_workq);
delayed_init_workq);
goto wq_alloc_failed;
}
INIT_WORK(&asd->delayed_init_work, atomisp_delayed_init_work);
@ -950,7 +950,7 @@ static int atomisp_register_entities(struct atomisp_device *isp)
for (i = 0; i < isp->input_cnt; i++) {
if (isp->inputs[i].port >= ATOMISP_CAMERA_NR_PORTS) {
dev_err(isp->dev, "isp->inputs port %d not supported\n",
isp->inputs[i].port);
isp->inputs[i].port);
ret = -EINVAL;
goto link_failed;
}
@ -961,7 +961,7 @@ static int atomisp_register_entities(struct atomisp_device *isp)
isp->inputs[isp->input_cnt].type = FILE_INPUT;
isp->inputs[isp->input_cnt].port = -1;
isp->inputs[isp->input_cnt].camera_caps =
atomisp_get_default_camera_caps();
atomisp_get_default_camera_caps();
isp->inputs[isp->input_cnt++].camera = &isp->file_dev.sd;
if (isp->input_cnt < ATOM_ISP_MAX_INPUTS) {
@ -985,11 +985,11 @@ static int atomisp_register_entities(struct atomisp_device *isp)
link_failed:
for (i = 0; i < isp->num_of_streams; i++)
destroy_workqueue(isp->asd[i].
delayed_init_workq);
delayed_init_workq);
wq_alloc_failed:
for (i = 0; i < isp->num_of_streams; i++)
atomisp_subdev_unregister_entities(
&isp->asd[i]);
&isp->asd[i]);
subdev_register_failed:
atomisp_tpg_unregister_entities(&isp->tpg);
tpg_register_failed:
@ -1150,7 +1150,7 @@ static int init_atomisp_wdts(struct atomisp_device *isp)
#define ATOM_ISP_PCI_BAR 0
static int atomisp_pci_probe(struct pci_dev *dev,
const struct pci_device_id *id)
const struct pci_device_id *id)
{
const struct atomisp_platform_data *pdata;
struct atomisp_device *isp;
@ -1217,9 +1217,9 @@ static int atomisp_pci_probe(struct pci_dev *dev,
switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {
case ATOMISP_PCI_DEVICE_SOC_MRFLD:
isp->media_dev.hw_revision =
(ATOMISP_HW_REVISION_ISP2400
<< ATOMISP_HW_REVISION_SHIFT) |
ATOMISP_HW_STEPPING_B0;
(ATOMISP_HW_REVISION_ISP2400
<< ATOMISP_HW_REVISION_SHIFT) |
ATOMISP_HW_STEPPING_B0;
switch (id->device) {
case ATOMISP_PCI_DEVICE_SOC_MRFLD_1179:
@ -1236,12 +1236,12 @@ static int atomisp_pci_probe(struct pci_dev *dev,
break;
case ATOMISP_PCI_DEVICE_SOC_BYT:
isp->media_dev.hw_revision =
(ATOMISP_HW_REVISION_ISP2400
<< ATOMISP_HW_REVISION_SHIFT) |
ATOMISP_HW_STEPPING_B0;
(ATOMISP_HW_REVISION_ISP2400
<< ATOMISP_HW_REVISION_SHIFT) |
ATOMISP_HW_STEPPING_B0;
#ifdef FIXME
if (INTEL_MID_BOARD(3, TABLET, BYT, BLK, PRO, CRV2) ||
INTEL_MID_BOARD(3, TABLET, BYT, BLK, ENG, CRV2)) {
INTEL_MID_BOARD(3, TABLET, BYT, BLK, ENG, CRV2)) {
isp->dfs = &dfs_config_byt_cr;
isp->hpll_freq = HPLL_FREQ_2000MHZ;
} else
@ -1254,7 +1254,7 @@ static int atomisp_pci_probe(struct pci_dev *dev,
* have specs yet for exactly how it varies. Default to
* BYT-CR but let provisioning set it via EFI variable */
isp->hpll_freq = gmin_get_var_int(&dev->dev, "HpllFreq",
HPLL_FREQ_2000MHZ);
HPLL_FREQ_2000MHZ);
/*
* for BYT/CHT we are put isp into D3cold to avoid pci registers access
@ -1266,26 +1266,26 @@ static int atomisp_pci_probe(struct pci_dev *dev,
case ATOMISP_PCI_DEVICE_SOC_ANN:
isp->media_dev.hw_revision = (
#ifdef ISP2401_NEW_INPUT_SYSTEM
ATOMISP_HW_REVISION_ISP2401
ATOMISP_HW_REVISION_ISP2401
#else
ATOMISP_HW_REVISION_ISP2401_LEGACY
ATOMISP_HW_REVISION_ISP2401_LEGACY
#endif
<< ATOMISP_HW_REVISION_SHIFT);
<< ATOMISP_HW_REVISION_SHIFT);
isp->media_dev.hw_revision |= isp->pdev->revision < 2 ?
ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
isp->dfs = &dfs_config_merr;
isp->hpll_freq = HPLL_FREQ_1600MHZ;
break;
case ATOMISP_PCI_DEVICE_SOC_CHT:
isp->media_dev.hw_revision = (
#ifdef ISP2401_NEW_INPUT_SYSTEM
ATOMISP_HW_REVISION_ISP2401
ATOMISP_HW_REVISION_ISP2401
#else
ATOMISP_HW_REVISION_ISP2401_LEGACY
ATOMISP_HW_REVISION_ISP2401_LEGACY
#endif
<< ATOMISP_HW_REVISION_SHIFT);
<< ATOMISP_HW_REVISION_SHIFT);
isp->media_dev.hw_revision |= isp->pdev->revision < 2 ?
ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
isp->dfs = &dfs_config_cht;
isp->pdev->d3cold_delay = 0;
@ -1355,7 +1355,7 @@ static int atomisp_pci_probe(struct pci_dev *dev,
atomisp_store_uint32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1);
if ((id->device & ATOMISP_PCI_DEVICE_SOC_MASK) ==
ATOMISP_PCI_DEVICE_SOC_MRFLD) {
ATOMISP_PCI_DEVICE_SOC_MRFLD) {
u32 csi_afe_trim;
/*
@ -1365,19 +1365,19 @@ static int atomisp_pci_probe(struct pci_dev *dev,
pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
&csi_afe_trim);
csi_afe_trim &= ~((MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
(MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
(MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT));
MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT));
csi_afe_trim |= (MRFLD_PCI_CSI1_HSRXCLKTRIM <<
MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
(MRFLD_PCI_CSI2_HSRXCLKTRIM <<
MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
(MRFLD_PCI_CSI3_HSRXCLKTRIM <<
MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT);
MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT);
pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
csi_afe_trim);
csi_afe_trim);
}
err = atomisp_initialize_modules(isp);
@ -1489,7 +1489,7 @@ static int atomisp_pci_probe(struct pci_dev *dev,
static void atomisp_pci_remove(struct pci_dev *dev)
{
struct atomisp_device *isp = (struct atomisp_device *)
pci_get_drvdata(dev);
pci_get_drvdata(dev);
atomisp_drvfs_exit();

4
drivers/staging/media/atomisp/pci/atomisp2/atomisp_v4l2.h
View File

@ -30,10 +30,10 @@ int atomisp_video_init(struct atomisp_video_pipe *video, const char *name);
void atomisp_acc_init(struct atomisp_acc_pipe *video, const char *name);
void atomisp_video_unregister(struct atomisp_video_pipe *video);
int atomisp_video_register(struct atomisp_video_pipe *video,
struct v4l2_device *vdev);
struct v4l2_device *vdev);
void atomisp_acc_unregister(struct atomisp_acc_pipe *video);
int atomisp_acc_register(struct atomisp_acc_pipe *video,
struct v4l2_device *vdev);
struct v4l2_device *vdev);
const struct firmware *atomisp_load_firmware(struct atomisp_device *isp);
int atomisp_csi_lane_config(struct atomisp_device *isp);

66
drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf.h
View File

@ -45,9 +45,9 @@ struct ia_css_circbuf_s {
* @param desc The descriptor set to the size using ia_css_circbuf_desc_init().
*/
void ia_css_circbuf_create(
ia_css_circbuf_t *cb,
ia_css_circbuf_elem_t *elems,
ia_css_circbuf_desc_t *desc);
ia_css_circbuf_t *cb,
ia_css_circbuf_elem_t *elems,
ia_css_circbuf_desc_t *desc);
/**
* @brief Destroy the circular buffer.
@ -55,7 +55,7 @@ void ia_css_circbuf_create(
* @param cb The pointer to the circular buffer.
*/
void ia_css_circbuf_destroy(
ia_css_circbuf_t *cb);
ia_css_circbuf_t *cb);
/**
* @brief Pop a value out of the circular buffer.
@ -68,7 +68,7 @@ void ia_css_circbuf_destroy(
* @return the pop-out value.
*/
uint32_t ia_css_circbuf_pop(
ia_css_circbuf_t *cb);
ia_css_circbuf_t *cb);
/**
* @brief Extract a value out of the circular buffer.
@ -82,8 +82,8 @@ uint32_t ia_css_circbuf_pop(
* @return the extracted value.
*/
uint32_t ia_css_circbuf_extract(
ia_css_circbuf_t *cb,
int offset);
ia_css_circbuf_t *cb,
int offset);
/****************************************************************
*
@ -97,8 +97,8 @@ uint32_t ia_css_circbuf_extract(
* @param val The value to be set.
*/
static inline void ia_css_circbuf_elem_set_val(
ia_css_circbuf_elem_t *elem,
uint32_t val)
ia_css_circbuf_elem_t *elem,
uint32_t val)
{
OP___assert(elem);
@ -111,7 +111,7 @@ static inline void ia_css_circbuf_elem_set_val(
* @param elem The pointer to the element.
*/
static inline void ia_css_circbuf_elem_init(
ia_css_circbuf_elem_t *elem)
ia_css_circbuf_elem_t *elem)
{
OP___assert(elem);
ia_css_circbuf_elem_set_val(elem, 0);
@ -124,8 +124,8 @@ static inline void ia_css_circbuf_elem_init(
* @param dest The element as the copy destination.
*/
static inline void ia_css_circbuf_elem_cpy(
ia_css_circbuf_elem_t *src,
ia_css_circbuf_elem_t *dest)
ia_css_circbuf_elem_t *src,
ia_css_circbuf_elem_t *dest)
{
OP___assert(src);
OP___assert(dest);
@ -143,9 +143,9 @@ static inline void ia_css_circbuf_elem_cpy(
* @return the position at offset.
*/
static inline uint8_t ia_css_circbuf_get_pos_at_offset(
ia_css_circbuf_t *cb,
u32 base,
int offset)
ia_css_circbuf_t *cb,
u32 base,
int offset)
{
u8 dest;
@ -176,9 +176,9 @@ static inline uint8_t ia_css_circbuf_get_pos_at_offset(
* @return the offset.
*/
static inline int ia_css_circbuf_get_offset(
ia_css_circbuf_t *cb,
u32 src_pos,
uint32_t dest_pos)
ia_css_circbuf_t *cb,
u32 src_pos,
uint32_t dest_pos)
{
int offset;
@ -201,7 +201,7 @@ static inline int ia_css_circbuf_get_offset(
* TODO: Test this API.
*/
static inline uint32_t ia_css_circbuf_get_size(
ia_css_circbuf_t *cb)
ia_css_circbuf_t *cb)
{
OP___assert(cb);
OP___assert(cb->desc);
@ -217,7 +217,7 @@ static inline uint32_t ia_css_circbuf_get_size(
* @return the number of available elements.
*/
static inline uint32_t ia_css_circbuf_get_num_elems(
ia_css_circbuf_t *cb)
ia_css_circbuf_t *cb)
{
int num;
@ -239,7 +239,7 @@ static inline uint32_t ia_css_circbuf_get_num_elems(
* - false when it is not empty.
*/
static inline bool ia_css_circbuf_is_empty(
ia_css_circbuf_t *cb)
ia_css_circbuf_t *cb)
{
OP___assert(cb);
OP___assert(cb->desc);
@ -274,8 +274,8 @@ static inline bool ia_css_circbuf_is_full(ia_css_circbuf_t *cb)
* @param elem The new element.
*/
static inline void ia_css_circbuf_write(
ia_css_circbuf_t *cb,
ia_css_circbuf_elem_t elem)
ia_css_circbuf_t *cb,
ia_css_circbuf_elem_t elem)
{
OP___assert(cb);
OP___assert(cb->desc);
@ -298,8 +298,8 @@ static inline void ia_css_circbuf_write(
* @param val The value to be pushed in.
*/
static inline void ia_css_circbuf_push(
ia_css_circbuf_t *cb,
uint32_t val)
ia_css_circbuf_t *cb,
uint32_t val)
{
ia_css_circbuf_elem_t elem;
@ -321,7 +321,7 @@ static inline void ia_css_circbuf_push(
* @return: The number of free elements.
*/
static inline uint32_t ia_css_circbuf_get_free_elems(
ia_css_circbuf_t *cb)
ia_css_circbuf_t *cb)
{
OP___assert(cb);
OP___assert(cb->desc);
@ -338,8 +338,8 @@ static inline uint32_t ia_css_circbuf_get_free_elems(
* @return the elements value.
*/
uint32_t ia_css_circbuf_peek(
ia_css_circbuf_t *cb,
int offset);
ia_css_circbuf_t *cb,
int offset);
/**
* @brief Get an element in Circular Buffer.
@ -350,8 +350,8 @@ uint32_t ia_css_circbuf_peek(
* @return the elements value.
*/
uint32_t ia_css_circbuf_peek_from_start(
ia_css_circbuf_t *cb,
int offset);
ia_css_circbuf_t *cb,
int offset);
/**
* @brief Increase Size of a Circular Buffer.
@ -369,8 +369,8 @@ uint32_t ia_css_circbuf_peek_from_start(
* false on failure
*/
bool ia_css_circbuf_increase_size(
ia_css_circbuf_t *cb,
unsigned int sz_delta,
ia_css_circbuf_elem_t *elems);
ia_css_circbuf_t *cb,
unsigned int sz_delta,
ia_css_circbuf_elem_t *elems);
#endif /*_IA_CSS_CIRCBUF_H */

32
drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/interface/ia_css_circbuf_desc.h
View File

@ -35,7 +35,7 @@
* - false when it is not empty.
*/
static inline bool ia_css_circbuf_desc_is_empty(
ia_css_circbuf_desc_t *cb_desc)
ia_css_circbuf_desc_t *cb_desc)
{
OP___assert(cb_desc);
return (cb_desc->end == cb_desc->start);
@ -52,7 +52,7 @@ static inline bool ia_css_circbuf_desc_is_empty(
* - false when it is not full.
*/
static inline bool ia_css_circbuf_desc_is_full(
ia_css_circbuf_desc_t *cb_desc)
ia_css_circbuf_desc_t *cb_desc)
{
OP___assert(cb_desc);
return (OP_std_modadd(cb_desc->end, 1, cb_desc->size) == cb_desc->start);
@ -65,8 +65,8 @@ static inline bool ia_css_circbuf_desc_is_full(
* @param size The size of the circular buffer
*/
static inline void ia_css_circbuf_desc_init(
ia_css_circbuf_desc_t *cb_desc,
int8_t size)
ia_css_circbuf_desc_t *cb_desc,
int8_t size)
{
OP___assert(cb_desc);
cb_desc->size = size;
@ -82,9 +82,9 @@ static inline void ia_css_circbuf_desc_init(
* @return the position in the circular buffer descriptor.
*/
static inline uint8_t ia_css_circbuf_desc_get_pos_at_offset(
ia_css_circbuf_desc_t *cb_desc,
u32 base,
int offset)
ia_css_circbuf_desc_t *cb_desc,
u32 base,
int offset)
{
u8 dest;
@ -115,9 +115,9 @@ static inline uint8_t ia_css_circbuf_desc_get_pos_at_offset(
* @return the offset.
*/
static inline int ia_css_circbuf_desc_get_offset(
ia_css_circbuf_desc_t *cb_desc,
u32 src_pos,
uint32_t dest_pos)
ia_css_circbuf_desc_t *cb_desc,
u32 src_pos,
uint32_t dest_pos)
{
int offset;
@ -137,15 +137,15 @@ static inline int ia_css_circbuf_desc_get_offset(
* @return The number of available elements.
*/
static inline uint32_t ia_css_circbuf_desc_get_num_elems(
ia_css_circbuf_desc_t *cb_desc)
ia_css_circbuf_desc_t *cb_desc)
{
int num;
OP___assert(cb_desc);
num = ia_css_circbuf_desc_get_offset(cb_desc,
cb_desc->start,
cb_desc->end);
cb_desc->start,
cb_desc->end);
return (uint32_t)num;
}
@ -158,15 +158,15 @@ static inline uint32_t ia_css_circbuf_desc_get_num_elems(
* @return: The number of free elements.
*/
static inline uint32_t ia_css_circbuf_desc_get_free_elems(
ia_css_circbuf_desc_t *cb_desc)
ia_css_circbuf_desc_t *cb_desc)
{
u32 num;
OP___assert(cb_desc);
num = ia_css_circbuf_desc_get_offset(cb_desc,
cb_desc->start,
cb_desc->end);
cb_desc->start,
cb_desc->end);
return (cb_desc->size - num);
}

30
drivers/staging/media/atomisp/pci/atomisp2/css2400/base/circbuf/src/circbuf.c
View File

@ -45,8 +45,8 @@ ia_css_circbuf_read(ia_css_circbuf_t *cb);
* @param chunk_dest The position to which the first element in the chunk would be shift.
*/
static inline void ia_css_circbuf_shift_chunk(ia_css_circbuf_t *cb,
u32 chunk_src,
uint32_t chunk_dest);
u32 chunk_src,
uint32_t chunk_dest);
/*
* @brief Get the "val" field in the element.
@ -69,8 +69,8 @@ ia_css_circbuf_elem_get_val(ia_css_circbuf_elem_t *elem);
*/
void
ia_css_circbuf_create(ia_css_circbuf_t *cb,
ia_css_circbuf_elem_t *elems,
ia_css_circbuf_desc_t *desc)
ia_css_circbuf_elem_t *elems,
ia_css_circbuf_desc_t *desc)
{
u32 i;
@ -200,9 +200,9 @@ uint32_t ia_css_circbuf_peek_from_start(ia_css_circbuf_t *cb, int offset)
* Please refer to "ia_css_circbuf.h" for details.
*/
bool ia_css_circbuf_increase_size(
ia_css_circbuf_t *cb,
unsigned int sz_delta,
ia_css_circbuf_elem_t *elems)
ia_css_circbuf_t *cb,
unsigned int sz_delta,
ia_css_circbuf_elem_t *elems)
{
u8 curr_size;
u8 curr_end;
@ -216,7 +216,8 @@ bool ia_css_circbuf_increase_size(
/* We assume cb was pre defined as global to allow
* increase in size */
/* FM: are we sure this cannot cause size to become too big? */
if (((uint8_t)(cb->desc->size + (uint8_t)sz_delta) > cb->desc->size) && ((uint8_t)sz_delta == sz_delta))
if (((uint8_t)(cb->desc->size + (uint8_t)sz_delta) > cb->desc->size) &&
((uint8_t)sz_delta == sz_delta))
cb->desc->size += (uint8_t)sz_delta;
else
return false; /* overflow in size */
@ -239,8 +240,8 @@ bool ia_css_circbuf_increase_size(
} else {
/* Move elements and fix Start*/
ia_css_circbuf_shift_chunk(cb,
curr_size - 1,
curr_size + sz_delta - 1);
curr_size - 1,
curr_size + sz_delta - 1);
}
}
@ -288,7 +289,7 @@ ia_css_circbuf_read(ia_css_circbuf_t *cb)
*/
static inline void
ia_css_circbuf_shift_chunk(ia_css_circbuf_t *cb,
u32 chunk_src, uint32_t chunk_dest)
u32 chunk_src, uint32_t chunk_dest)
{
int chunk_offset;
int chunk_sz;
@ -296,14 +297,14 @@ ia_css_circbuf_shift_chunk(ia_css_circbuf_t *cb,
/* get the chunk offset and size */
chunk_offset = ia_css_circbuf_get_offset(cb,
chunk_src, chunk_dest);
chunk_src, chunk_dest);
chunk_sz = ia_css_circbuf_get_offset(cb, cb->desc->start, chunk_src) + 1;
/* shift each element to its terminal position */
for (i = 0; i < chunk_sz; i++) {
/* copy the element from the source to the destination */
ia_css_circbuf_elem_cpy(&cb->elems[chunk_src],
&cb->elems[chunk_dest]);
&cb->elems[chunk_dest]);
/* clear the source position */
ia_css_circbuf_elem_init(&cb->elems[chunk_src]);
@ -314,5 +315,6 @@ ia_css_circbuf_shift_chunk(ia_css_circbuf_t *cb,
}
/* adjust the index "start" */
cb->desc->start = ia_css_circbuf_get_pos_at_offset(cb, cb->desc->start, chunk_offset);
cb->desc->start = ia_css_circbuf_get_pos_at_offset(cb, cb->desc->start,
chunk_offset);
}

2
drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/interface/ia_css_refcount.h
View File

@ -69,7 +69,7 @@ bool ia_css_refcount_is_single(hrt_vaddress ptr);
* return None
*/
void ia_css_refcount_clear(s32 id,
clear_func clear_func_ptr);
clear_func clear_func_ptr);
/*! \brief Function to verify if object is valid
*

6
drivers/staging/media/atomisp/pci/atomisp2/css2400/base/refcount/src/refcount.c
View File

@ -38,7 +38,7 @@ struct ia_css_refcount_list {
static struct ia_css_refcount_list myrefcount;
static struct ia_css_refcount_entry *refcount_find_entry(hrt_vaddress ptr,
bool firstfree)
bool firstfree)
{
u32 i;
@ -143,7 +143,7 @@ hrt_vaddress ia_css_refcount_increment(s32 id, hrt_vaddress ptr)
if (entry->id != id) {
ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR,
"ia_css_refcount_increment(): Ref count IDS do not match!\n");
"ia_css_refcount_increment(): Ref count IDS do not match!\n");
return mmgr_NULL;
}
@ -193,7 +193,7 @@ bool ia_css_refcount_decrement(s32 id, hrt_vaddress ptr)
valid anymore */
if (entry)
IA_CSS_ERROR("id %x, ptr 0x%x entry %p entry->id %x entry->count %d\n",
id, ptr, entry, entry->id, entry->count);
id, ptr, entry, entry->id, entry->count);
else
IA_CSS_ERROR("entry NULL\n");
#ifdef ISP2401

158
drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_binarydesc.h
View File

@ -30,11 +30,11 @@
*
*/
void ia_css_pipe_get_copy_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *copy_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info);
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *copy_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info);
/* @brief Get a binary descriptor for vfpp.
*
@ -46,10 +46,10 @@ void ia_css_pipe_get_copy_binarydesc(
*
*/
void ia_css_pipe_get_vfpp_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *vf_pp_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info);
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *vf_pp_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info);
/* @brief Get numerator and denominator of bayer downscaling factor.
*
@ -63,9 +63,9 @@ void ia_css_pipe_get_vfpp_binarydesc(
*
*/
enum ia_css_err sh_css_bds_factor_get_numerator_denominator(
unsigned int bds_factor,
unsigned int *bds_factor_numerator,
unsigned int *bds_factor_denominator);
unsigned int bds_factor,
unsigned int *bds_factor_numerator,
unsigned int *bds_factor_denominator);
/* @brief Get a binary descriptor for preview stage.
*
@ -79,12 +79,12 @@ enum ia_css_err sh_css_bds_factor_get_numerator_denominator(
*
*/
enum ia_css_err ia_css_pipe_get_preview_binarydesc(
struct ia_css_pipe * const pipe,
struct ia_css_binary_descr *preview_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *bds_out_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info);
struct ia_css_pipe *const pipe,
struct ia_css_binary_descr *preview_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *bds_out_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info);
/* @brief Get a binary descriptor for video stage.
*
@ -97,13 +97,13 @@ enum ia_css_err ia_css_pipe_get_preview_binarydesc(
*
*/
enum ia_css_err ia_css_pipe_get_video_binarydesc(
struct ia_css_pipe * const pipe,
struct ia_css_binary_descr *video_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *bds_out_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info,
int stream_config_left_padding);
struct ia_css_pipe *const pipe,
struct ia_css_binary_descr *video_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *bds_out_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info,
int stream_config_left_padding);
/* @brief Get a binary descriptor for yuv scaler stage.
*
@ -117,12 +117,12 @@ enum ia_css_err ia_css_pipe_get_video_binarydesc(
*
*/
void ia_css_pipe_get_yuvscaler_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *yuv_scaler_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *internal_out_info,
struct ia_css_frame_info *vf_info);
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *yuv_scaler_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *internal_out_info,
struct ia_css_frame_info *vf_info);
/* @brief Get a binary descriptor for capture pp stage.
*
@ -134,11 +134,11 @@ void ia_css_pipe_get_yuvscaler_binarydesc(
*
*/
void ia_css_pipe_get_capturepp_binarydesc(
struct ia_css_pipe * const pipe,
struct ia_css_binary_descr *capture_pp_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info);
struct ia_css_pipe *const pipe,
struct ia_css_binary_descr *capture_pp_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info);
/* @brief Get a binary descriptor for primary capture.
*
@ -151,12 +151,12 @@ void ia_css_pipe_get_capturepp_binarydesc(
*
*/
void ia_css_pipe_get_primary_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *prim_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info,
unsigned int stage_idx);
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *prim_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info,
unsigned int stage_idx);
/* @brief Get a binary descriptor for pre gdc stage.
*
@ -168,10 +168,10 @@ void ia_css_pipe_get_primary_binarydesc(
*
*/
void ia_css_pipe_get_pre_gdc_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *gdc_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info);
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *gdc_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info);
/* @brief Get a binary descriptor for gdc stage.
*
@ -183,10 +183,10 @@ void ia_css_pipe_get_pre_gdc_binarydesc(
*
*/
void ia_css_pipe_get_gdc_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *gdc_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info);
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *gdc_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info);
/* @brief Get a binary descriptor for post gdc.
*
@ -199,11 +199,11 @@ void ia_css_pipe_get_gdc_binarydesc(
*
*/
void ia_css_pipe_get_post_gdc_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *post_gdc_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info);
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *post_gdc_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info);
/* @brief Get a binary descriptor for de.
*
@ -215,10 +215,10 @@ void ia_css_pipe_get_post_gdc_binarydesc(
*
*/
void ia_css_pipe_get_pre_de_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *pre_de_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info);
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *pre_de_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info);
/* @brief Get a binary descriptor for pre anr stage.
*
@ -230,10 +230,10 @@ void ia_css_pipe_get_pre_de_binarydesc(
*
*/
void ia_css_pipe_get_pre_anr_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *pre_anr_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info);
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *pre_anr_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info);
/* @brief Get a binary descriptor for ANR stage.
*
@ -245,10 +245,10 @@ void ia_css_pipe_get_pre_anr_binarydesc(
*
*/
void ia_css_pipe_get_anr_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *anr_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info);
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *anr_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info);
/* @brief Get a binary descriptor for post anr stage.
*
@ -261,11 +261,11 @@ void ia_css_pipe_get_anr_binarydesc(
*
*/
void ia_css_pipe_get_post_anr_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *post_anr_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info);
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *post_anr_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info);
/* @brief Get a binary descriptor for ldc stage.
*
@ -277,10 +277,10 @@ void ia_css_pipe_get_post_anr_binarydesc(
*
*/
void ia_css_pipe_get_ldc_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *ldc_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info);
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *ldc_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info);
/* @brief Calculates the required BDS factor
*
@ -290,8 +290,8 @@ void ia_css_pipe_get_ldc_binarydesc(
* @return IA_CSS_SUCCESS or error code upon error.
*/
enum ia_css_err binarydesc_calculate_bds_factor(
struct ia_css_resolution input_res,
struct ia_css_resolution output_res,
unsigned int *bds_factor);
struct ia_css_resolution input_res,
struct ia_css_resolution output_res,
unsigned int *bds_factor);
#endif /* __IA_CSS_PIPE_BINARYDESC_H__ */

38
drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_stagedesc.h
View File

@ -22,30 +22,30 @@
#include "ia_css_pipeline_common.h"
void ia_css_pipe_get_generic_stage_desc(
struct ia_css_pipeline_stage_desc *stage_desc,
struct ia_css_binary *binary,
struct ia_css_frame *out_frame[],
struct ia_css_frame *in_frame,
struct ia_css_frame *vf_frame);
struct ia_css_pipeline_stage_desc *stage_desc,
struct ia_css_binary *binary,
struct ia_css_frame *out_frame[],
struct ia_css_frame *in_frame,
struct ia_css_frame *vf_frame);
void ia_css_pipe_get_firmwares_stage_desc(
struct ia_css_pipeline_stage_desc *stage_desc,
struct ia_css_binary *binary,
struct ia_css_frame *out_frame[],
struct ia_css_frame *in_frame,
struct ia_css_frame *vf_frame,
const struct ia_css_fw_info *fw,
unsigned int mode);
struct ia_css_pipeline_stage_desc *stage_desc,
struct ia_css_binary *binary,
struct ia_css_frame *out_frame[],
struct ia_css_frame *in_frame,
struct ia_css_frame *vf_frame,
const struct ia_css_fw_info *fw,
unsigned int mode);
void ia_css_pipe_get_acc_stage_desc(
struct ia_css_pipeline_stage_desc *stage_desc,
struct ia_css_binary *binary,
struct ia_css_fw_info *fw);
struct ia_css_pipeline_stage_desc *stage_desc,
struct ia_css_binary *binary,
struct ia_css_fw_info *fw);
void ia_css_pipe_get_sp_func_stage_desc(
struct ia_css_pipeline_stage_desc *stage_desc,
struct ia_css_frame *out_frame,
enum ia_css_pipeline_stage_sp_func sp_func,
unsigned int max_input_width);
struct ia_css_pipeline_stage_desc *stage_desc,
struct ia_css_frame *out_frame,
enum ia_css_pipeline_stage_sp_func sp_func,
unsigned int max_input_width);
#endif /*__IA_CSS_PIPE_STAGEDESC__H__ */

10
drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/interface/ia_css_pipe_util.h
View File

@ -26,14 +26,14 @@
*
*/
unsigned int ia_css_pipe_util_pipe_input_format_bpp(
const struct ia_css_pipe * const pipe);
const struct ia_css_pipe *const pipe);
void ia_css_pipe_util_create_output_frames(
struct ia_css_frame *frames[]);
struct ia_css_frame *frames[]);
void ia_css_pipe_util_set_output_frames(
struct ia_css_frame *frames[],
unsigned int idx,
struct ia_css_frame *frame);
struct ia_css_frame *frames[],
unsigned int idx,
struct ia_css_frame *frame);
#endif /* __IA_CSS_PIPE_UTIL_H__ */

249
drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_binarydesc.c
View File

@ -31,12 +31,12 @@
/* Generic descriptor for offline binaries. Internal function. */
static void pipe_binarydesc_get_offline(
struct ia_css_pipe const * const pipe,
const int mode,
struct ia_css_binary_descr *descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info[],
struct ia_css_frame_info *vf_info)
struct ia_css_pipe const *const pipe,
const int mode,
struct ia_css_binary_descr *descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info[],
struct ia_css_frame_info *vf_info)
{
unsigned int i;
/* in_info, out_info, vf_info can be NULL */
@ -77,11 +77,11 @@ static void pipe_binarydesc_get_offline(
}
void ia_css_pipe_get_copy_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *copy_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info)
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *copy_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info)
{
struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS];
unsigned int i;
@ -105,10 +105,10 @@ void ia_css_pipe_get_copy_binarydesc(
}
void ia_css_pipe_get_vfpp_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *vf_pp_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info)
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *vf_pp_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info)
{
struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS];
unsigned int i;
@ -123,7 +123,7 @@ void ia_css_pipe_get_vfpp_binarydesc(
out_infos[i] = NULL;
pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_VF_PP,
vf_pp_descr, in_info, out_infos, NULL);
vf_pp_descr, in_info, out_infos, NULL);
vf_pp_descr->enable_fractional_ds = true;
IA_CSS_LEAVE_PRIVATE("");
}
@ -144,9 +144,9 @@ static struct sh_css_bds_factor bds_factors_list[] = {
};
enum ia_css_err sh_css_bds_factor_get_numerator_denominator(
unsigned int bds_factor,
unsigned int *bds_factor_numerator,
unsigned int *bds_factor_denominator)
unsigned int bds_factor,
unsigned int *bds_factor_numerator,
unsigned int *bds_factor_denominator)
{
unsigned int i;
@ -165,14 +165,14 @@ enum ia_css_err sh_css_bds_factor_get_numerator_denominator(
}
enum ia_css_err binarydesc_calculate_bds_factor(
struct ia_css_resolution input_res,
struct ia_css_resolution output_res,
unsigned int *bds_factor)
struct ia_css_resolution input_res,
struct ia_css_resolution output_res,
unsigned int *bds_factor)
{
unsigned int i;
unsigned int in_w = input_res.width,
in_h = input_res.height,
out_w = output_res.width, out_h = output_res.height;
in_h = input_res.height,
out_w = output_res.width, out_h = output_res.height;
unsigned int max_bds_factor = 8;
unsigned int max_rounding_margin = 2;
@ -191,9 +191,9 @@ enum ia_css_err binarydesc_calculate_bds_factor(
/* See width-wise and height-wise if this bds_factor
* satisfies the condition */
bool cond = (out_w * num / den + delta > in_w) &&
(out_w * num / den <= in_w) &&
(out_h * num / den + delta > in_h) &&
(out_h * num / den <= in_h);
(out_w * num / den <= in_w) &&
(out_h * num / den + delta > in_h) &&
(out_h * num / den <= in_h);
if (cond) {
*bds_factor = bds_factors_list[i].bds_factor;
@ -206,12 +206,12 @@ enum ia_css_err binarydesc_calculate_bds_factor(
}
enum ia_css_err ia_css_pipe_get_preview_binarydesc(
struct ia_css_pipe * const pipe,
struct ia_css_binary_descr *preview_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *bds_out_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info)
struct ia_css_pipe *const pipe,
struct ia_css_binary_descr *preview_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *bds_out_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info)
{
enum ia_css_err err;
struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS];
@ -242,7 +242,7 @@ enum ia_css_err ia_css_pipe_get_preview_binarydesc(
out_infos[i] = NULL;
pipe_binarydesc_get_offline(pipe, mode,
preview_descr, in_info, out_infos, vf_info);
preview_descr, in_info, out_infos, vf_info);
if (pipe->stream->config.online) {
preview_descr->online = pipe->stream->config.online;
preview_descr->two_ppc =
@ -264,8 +264,8 @@ enum ia_css_err ia_css_pipe_get_preview_binarydesc(
pipe->config.bayer_ds_out_res.width;
err =
binarydesc_calculate_bds_factor(in_info->res,
bds_out_info->res,
&preview_descr->required_bds_factor);
bds_out_info->res,
&preview_descr->required_bds_factor);
if (err != IA_CSS_SUCCESS)
return err;
} else {
@ -325,13 +325,13 @@ enum ia_css_err ia_css_pipe_get_preview_binarydesc(
}
enum ia_css_err ia_css_pipe_get_video_binarydesc(
struct ia_css_pipe * const pipe,
struct ia_css_binary_descr *video_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *bds_out_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info,
int stream_config_left_padding)
struct ia_css_pipe *const pipe,
struct ia_css_binary_descr *video_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *bds_out_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info,
int stream_config_left_padding)
{
int mode = IA_CSS_BINARY_MODE_VIDEO;
unsigned int i;
@ -361,7 +361,7 @@ enum ia_css_err ia_css_pipe_get_video_binarydesc(
out_infos[i] = NULL;
pipe_binarydesc_get_offline(pipe, mode,
video_descr, in_info, out_infos, vf_info);
video_descr, in_info, out_infos, vf_info);
if (pipe->stream->config.online) {
video_descr->online = pipe->stream->config.online;
@ -377,7 +377,7 @@ enum ia_css_err ia_css_pipe_get_video_binarydesc(
HRT_GDC_N));
video_descr->enable_dz = pipe->config.enable_dz
|| stream_dz_config;
|| stream_dz_config;
video_descr->dvs_env = pipe->config.dvs_envelope;
video_descr->enable_yuv_ds = pipe->extra_config.enable_yuv_ds;
video_descr->enable_high_speed =
@ -390,12 +390,12 @@ enum ia_css_err ia_css_pipe_get_video_binarydesc(
video_descr->enable_fractional_ds =
pipe->extra_config.enable_fractional_ds;
video_descr->enable_dpc =
pipe->config.enable_dpc;
pipe->config.enable_dpc;
#ifdef ISP2401
video_descr->enable_luma_only =
pipe->config.enable_luma_only;
pipe->config.enable_luma_only;
video_descr->enable_tnr =
pipe->config.enable_tnr;
pipe->config.enable_tnr;
#endif
if (pipe->extra_config.enable_raw_binning) {
@ -408,7 +408,7 @@ enum ia_css_err ia_css_pipe_get_video_binarydesc(
bds_out_info->padded_width =
pipe->config.bayer_ds_out_res.width;
err =
binarydesc_calculate_bds_factor(
binarydesc_calculate_bds_factor(
in_info->res, bds_out_info->res,
&video_descr->required_bds_factor);
if (err != IA_CSS_SUCCESS)
@ -450,12 +450,12 @@ enum ia_css_err ia_css_pipe_get_video_binarydesc(
}
void ia_css_pipe_get_yuvscaler_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *yuv_scaler_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *internal_out_info,
struct ia_css_frame_info *vf_info)
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *yuv_scaler_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *internal_out_info,
struct ia_css_frame_info *vf_info)
{
struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS];
struct ia_css_frame_info *this_vf_info = NULL;
@ -481,24 +481,24 @@ void ia_css_pipe_get_yuvscaler_binarydesc(
if (vf_info) {
this_vf_info = (vf_info->res.width == 0 &&
vf_info->res.height == 0) ? NULL : vf_info;
vf_info->res.height == 0) ? NULL : vf_info;
}
pipe_binarydesc_get_offline(pipe,
IA_CSS_BINARY_MODE_CAPTURE_PP,
yuv_scaler_descr,
in_info, out_infos, this_vf_info);
IA_CSS_BINARY_MODE_CAPTURE_PP,
yuv_scaler_descr,
in_info, out_infos, this_vf_info);
yuv_scaler_descr->enable_fractional_ds = true;
IA_CSS_LEAVE_PRIVATE("");
}
void ia_css_pipe_get_capturepp_binarydesc(
struct ia_css_pipe * const pipe,
struct ia_css_binary_descr *capture_pp_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info)
struct ia_css_pipe *const pipe,
struct ia_css_binary_descr *capture_pp_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info)
{
unsigned int i;
struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS];
@ -523,15 +523,15 @@ void ia_css_pipe_get_capturepp_binarydesc(
out_infos[i] = NULL;
pipe_binarydesc_get_offline(pipe,
IA_CSS_BINARY_MODE_CAPTURE_PP,
capture_pp_descr,
in_info, out_infos, vf_info);
IA_CSS_BINARY_MODE_CAPTURE_PP,
capture_pp_descr,
in_info, out_infos, vf_info);
capture_pp_descr->enable_capture_pp_bli =
pipe->config.default_capture_config.enable_capture_pp_bli;
pipe->config.default_capture_config.enable_capture_pp_bli;
capture_pp_descr->enable_fractional_ds = true;
capture_pp_descr->enable_xnr =
pipe->config.default_capture_config.enable_xnr != 0;
pipe->config.default_capture_config.enable_xnr != 0;
IA_CSS_LEAVE_PRIVATE("");
}
@ -546,12 +546,12 @@ static unsigned int primary_hq_binary_modes[NUM_PRIMARY_HQ_STAGES] = {
};
void ia_css_pipe_get_primary_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *prim_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info,
unsigned int stage_idx)
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *prim_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info,
unsigned int stage_idx)
{
enum ia_css_pipe_version pipe_version = pipe->config.isp_pipe_version;
int mode;
@ -590,7 +590,7 @@ void ia_css_pipe_get_primary_binarydesc(
out_infos[i] = NULL;
pipe_binarydesc_get_offline(pipe, mode,
prim_descr, in_info, out_infos, vf_info);
prim_descr, in_info, out_infos, vf_info);
if (pipe->stream->config.online &&
pipe->stream->config.mode != IA_CSS_INPUT_MODE_MEMORY) {
@ -605,7 +605,7 @@ void ia_css_pipe_get_primary_binarydesc(
pipe->extra_config.enable_fractional_ds;
#ifdef ISP2401
prim_descr->enable_luma_only =
pipe->config.enable_luma_only;
pipe->config.enable_luma_only;
#endif
/* We have both striped and non-striped primary binaries,
* if continuous viewfinder is required, then we must select
@ -615,23 +615,24 @@ void ia_css_pipe_get_primary_binarydesc(
prim_descr->striped = false;
else
#ifndef ISP2401
prim_descr->striped = prim_descr->continuous && (!pipe->stream->stop_copy_preview || !pipe->stream->disable_cont_vf);
prim_descr->striped = prim_descr->continuous &&
(!pipe->stream->stop_copy_preview || !pipe->stream->disable_cont_vf);
#else
prim_descr->striped = prim_descr->continuous && !pipe->stream->disable_cont_vf;
if ((pipe->config.default_capture_config.enable_xnr != 0) &&
(pipe->extra_config.enable_dvs_6axis == true))
prim_descr->enable_xnr = true;
(pipe->extra_config.enable_dvs_6axis == true))
prim_descr->enable_xnr = true;
#endif
}
IA_CSS_LEAVE_PRIVATE("");
}
void ia_css_pipe_get_pre_gdc_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *pre_gdc_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info)
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *pre_gdc_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info)
{
unsigned int i;
struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS];
@ -649,16 +650,16 @@ void ia_css_pipe_get_pre_gdc_binarydesc(
out_infos[i] = NULL;
pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_PRE_ISP,
pre_gdc_descr, in_info, out_infos, NULL);
pre_gdc_descr, in_info, out_infos, NULL);
pre_gdc_descr->isp_pipe_version = pipe->config.isp_pipe_version;
IA_CSS_LEAVE_PRIVATE("");
}
void ia_css_pipe_get_gdc_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *gdc_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info)
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *gdc_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info)
{
unsigned int i;
struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS];
@ -675,16 +676,16 @@ void ia_css_pipe_get_gdc_binarydesc(
out_infos[i] = NULL;
pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_GDC,
gdc_descr, in_info, out_infos, NULL);
gdc_descr, in_info, out_infos, NULL);
IA_CSS_LEAVE_PRIVATE("");
}
void ia_css_pipe_get_post_gdc_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *post_gdc_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info)
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *post_gdc_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info)
{
unsigned int i;
struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS];
@ -703,17 +704,17 @@ void ia_css_pipe_get_post_gdc_binarydesc(
out_infos[i] = NULL;
pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_POST_ISP,
post_gdc_descr, in_info, out_infos, vf_info);
post_gdc_descr, in_info, out_infos, vf_info);
post_gdc_descr->isp_pipe_version = pipe->config.isp_pipe_version;
IA_CSS_LEAVE_PRIVATE("");
}
void ia_css_pipe_get_pre_de_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *pre_de_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info)
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *pre_de_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info)
{
unsigned int i;
struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS];
@ -732,10 +733,10 @@ void ia_css_pipe_get_pre_de_binarydesc(
if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_1)
pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_PRE_ISP,
pre_de_descr, in_info, out_infos, NULL);
pre_de_descr, in_info, out_infos, NULL);
else if (pipe->config.isp_pipe_version == IA_CSS_PIPE_VERSION_2_2) {
pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_PRE_DE,
pre_de_descr, in_info, out_infos, NULL);
pre_de_descr, in_info, out_infos, NULL);
}
if (pipe->stream->config.online) {
@ -749,10 +750,10 @@ void ia_css_pipe_get_pre_de_binarydesc(
}
void ia_css_pipe_get_pre_anr_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *pre_anr_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info)
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *pre_anr_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info)
{
unsigned int i;
struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS];
@ -770,7 +771,7 @@ void ia_css_pipe_get_pre_anr_binarydesc(
out_infos[i] = NULL;
pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_PRE_ISP,
pre_anr_descr, in_info, out_infos, NULL);
pre_anr_descr, in_info, out_infos, NULL);
if (pipe->stream->config.online) {
pre_anr_descr->online = true;
@ -783,10 +784,10 @@ void ia_css_pipe_get_pre_anr_binarydesc(
}
void ia_css_pipe_get_anr_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *anr_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info)
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *anr_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info)
{
unsigned int i;
struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS];
@ -804,18 +805,18 @@ void ia_css_pipe_get_anr_binarydesc(
out_infos[i] = NULL;
pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_ANR,
anr_descr, in_info, out_infos, NULL);
anr_descr, in_info, out_infos, NULL);
anr_descr->isp_pipe_version = pipe->config.isp_pipe_version;
IA_CSS_LEAVE_PRIVATE("");
}
void ia_css_pipe_get_post_anr_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *post_anr_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info)
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *post_anr_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info,
struct ia_css_frame_info *vf_info)
{
unsigned int i;
struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS];
@ -834,17 +835,17 @@ void ia_css_pipe_get_post_anr_binarydesc(
out_infos[i] = NULL;
pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_POST_ISP,
post_anr_descr, in_info, out_infos, vf_info);
post_anr_descr, in_info, out_infos, vf_info);
post_anr_descr->isp_pipe_version = pipe->config.isp_pipe_version;
IA_CSS_LEAVE_PRIVATE("");
}
void ia_css_pipe_get_ldc_binarydesc(
struct ia_css_pipe const * const pipe,
struct ia_css_binary_descr *ldc_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info)
struct ia_css_pipe const *const pipe,
struct ia_css_binary_descr *ldc_descr,
struct ia_css_frame_info *in_info,
struct ia_css_frame_info *out_info)
{
unsigned int i;
struct ia_css_frame_info *out_infos[IA_CSS_BINARY_MAX_OUTPUT_PORTS];
@ -871,8 +872,8 @@ void ia_css_pipe_get_ldc_binarydesc(
out_infos[i] = NULL;
pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_CAPTURE_PP,
ldc_descr, in_info, out_infos, NULL);
ldc_descr, in_info, out_infos, NULL);
ldc_descr->enable_dvs_6axis =
pipe->extra_config.enable_dvs_6axis;
pipe->extra_config.enable_dvs_6axis;
IA_CSS_LEAVE_PRIVATE("");
}

47
drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_stagedesc.c
View File

@ -17,11 +17,11 @@
#include "ia_css_debug.h"
void ia_css_pipe_get_generic_stage_desc(
struct ia_css_pipeline_stage_desc *stage_desc,
struct ia_css_binary *binary,
struct ia_css_frame *out_frame[],
struct ia_css_frame *in_frame,
struct ia_css_frame *vf_frame)
struct ia_css_pipeline_stage_desc *stage_desc,
struct ia_css_binary *binary,
struct ia_css_frame *out_frame[],
struct ia_css_frame *in_frame,
struct ia_css_frame *vf_frame)
{
unsigned int i;
@ -49,17 +49,18 @@ void ia_css_pipe_get_generic_stage_desc(
}
void ia_css_pipe_get_firmwares_stage_desc(
struct ia_css_pipeline_stage_desc *stage_desc,
struct ia_css_binary *binary,
struct ia_css_frame *out_frame[],
struct ia_css_frame *in_frame,
struct ia_css_frame *vf_frame,
const struct ia_css_fw_info *fw,
unsigned int mode)
struct ia_css_pipeline_stage_desc *stage_desc,
struct ia_css_binary *binary,
struct ia_css_frame *out_frame[],
struct ia_css_frame *in_frame,
struct ia_css_frame *vf_frame,
const struct ia_css_fw_info *fw,
unsigned int mode)
{
unsigned int i;
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_get_firmwares_stage_desc() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_pipe_get_firmwares_stage_desc() enter:\n");
stage_desc->binary = binary;
stage_desc->firmware = fw;
stage_desc->sp_func = IA_CSS_PIPELINE_NO_FUNC;
@ -73,13 +74,14 @@ void ia_css_pipe_get_firmwares_stage_desc(
}
void ia_css_pipe_get_acc_stage_desc(
struct ia_css_pipeline_stage_desc *stage_desc,
struct ia_css_binary *binary,
struct ia_css_fw_info *fw)
struct ia_css_pipeline_stage_desc *stage_desc,
struct ia_css_binary *binary,
struct ia_css_fw_info *fw)
{
unsigned int i;
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_get_acc_stage_desc() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_pipe_get_acc_stage_desc() enter:\n");
stage_desc->binary = binary;
stage_desc->firmware = fw;
stage_desc->sp_func = IA_CSS_PIPELINE_NO_FUNC;
@ -93,14 +95,15 @@ void ia_css_pipe_get_acc_stage_desc(
}
void ia_css_pipe_get_sp_func_stage_desc(
struct ia_css_pipeline_stage_desc *stage_desc,
struct ia_css_frame *out_frame,
enum ia_css_pipeline_stage_sp_func sp_func,
unsigned int max_input_width)
struct ia_css_pipeline_stage_desc *stage_desc,
struct ia_css_frame *out_frame,
enum ia_css_pipeline_stage_sp_func sp_func,
unsigned int max_input_width)
{
unsigned int i;
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_pipe_get_sp_func_stage_desc() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_pipe_get_sp_func_stage_desc() enter:\n");
stage_desc->binary = NULL;
stage_desc->firmware = NULL;
stage_desc->sp_func = sp_func;

12
drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/pipe/src/pipe_util.c
View File

@ -19,17 +19,17 @@
#include "assert_support.h"
unsigned int ia_css_pipe_util_pipe_input_format_bpp(
const struct ia_css_pipe * const pipe)
const struct ia_css_pipe *const pipe)
{
assert(pipe);
assert(pipe->stream);
return ia_css_util_input_format_bpp(pipe->stream->config.input_config.format,
pipe->stream->config.pixels_per_clock == 2);
pipe->stream->config.pixels_per_clock == 2);
}
void ia_css_pipe_util_create_output_frames(
struct ia_css_frame *frames[])
struct ia_css_frame *frames[])
{
unsigned int i;
@ -40,9 +40,9 @@ void ia_css_pipe_util_create_output_frames(
}
void ia_css_pipe_util_set_output_frames(
struct ia_css_frame *frames[],
unsigned int idx,
struct ia_css_frame *frame)
struct ia_css_frame *frames[],
unsigned int idx,
struct ia_css_frame *frame)
{
assert(idx < IA_CSS_BINARY_MAX_OUTPUT_PORTS);

34
drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/interface/ia_css_util.h
View File

@ -29,7 +29,7 @@
*
*/
enum ia_css_err ia_css_convert_errno(
int in_err);
int in_err);
/* @brief check vf frame info.
*
@ -38,7 +38,7 @@ enum ia_css_err ia_css_convert_errno(
*
*/
enum ia_css_err ia_css_util_check_vf_info(
const struct ia_css_frame_info * const info);
const struct ia_css_frame_info *const info);
/* @brief check input configuration.
*
@ -48,9 +48,9 @@ enum ia_css_err ia_css_util_check_vf_info(
*
*/
enum ia_css_err ia_css_util_check_input(
const struct ia_css_stream_config * const stream_config,
bool must_be_raw,
bool must_be_yuv);
const struct ia_css_stream_config *const stream_config,
bool must_be_raw,
bool must_be_yuv);
/* @brief check vf and out frame info.
*
@ -60,8 +60,8 @@ enum ia_css_err ia_css_util_check_input(
*
*/
enum ia_css_err ia_css_util_check_vf_out_info(
const struct ia_css_frame_info * const out_info,
const struct ia_css_frame_info * const vf_info);
const struct ia_css_frame_info *const out_info,
const struct ia_css_frame_info *const vf_info);
/* @brief check width and height
*
@ -71,8 +71,8 @@ enum ia_css_err ia_css_util_check_vf_out_info(
*
*/
enum ia_css_err ia_css_util_check_res(
unsigned int width,
unsigned int height);
unsigned int width,
unsigned int height);
#ifdef ISP2401
/* @brief compare resolutions (less or equal)
@ -84,8 +84,8 @@ enum ia_css_err ia_css_util_check_res(
*
*/
bool ia_css_util_res_leq(
struct ia_css_resolution a,
struct ia_css_resolution b);
struct ia_css_resolution a,
struct ia_css_resolution b);
/**
* @brief Check if resolution is zero
@ -95,7 +95,7 @@ bool ia_css_util_res_leq(
* @returns true if resolution is zero
*/
bool ia_css_util_resolution_is_zero(
const struct ia_css_resolution resolution);
const struct ia_css_resolution resolution);
/**
* @brief Check if resolution is even
@ -105,7 +105,7 @@ bool ia_css_util_resolution_is_zero(
* @returns true if resolution is even
*/
bool ia_css_util_resolution_is_even(
const struct ia_css_resolution resolution);
const struct ia_css_resolution resolution);
#endif
/* @brief check width and height
@ -116,8 +116,8 @@ bool ia_css_util_resolution_is_even(
*
*/
unsigned int ia_css_util_input_format_bpp(
enum atomisp_input_format stream_format,
bool two_ppc);
enum atomisp_input_format stream_format,
bool two_ppc);
/* @brief check if input format it raw
*
@ -126,7 +126,7 @@ unsigned int ia_css_util_input_format_bpp(
*
*/
bool ia_css_util_is_input_format_raw(
enum atomisp_input_format stream_format);
enum atomisp_input_format stream_format);
/* @brief check if input format it yuv
*
@ -135,6 +135,6 @@ bool ia_css_util_is_input_format_raw(
*
*/
bool ia_css_util_is_input_format_yuv(
enum atomisp_input_format stream_format);
enum atomisp_input_format stream_format);
#endif /* __IA_CSS_UTIL_H__ */

68
drivers/staging/media/atomisp/pci/atomisp2/css2400/camera/util/src/util.c
View File

@ -21,38 +21,38 @@
#include "ia_css_binary.h"
enum ia_css_err ia_css_convert_errno(
int in_err)
int in_err)
{
enum ia_css_err out_err;
switch (in_err) {
case 0:
out_err = IA_CSS_SUCCESS;
break;
case EINVAL:
out_err = IA_CSS_ERR_INVALID_ARGUMENTS;
break;
case ENODATA:
out_err = IA_CSS_ERR_QUEUE_IS_EMPTY;
break;
case ENOSYS:
case ENOTSUP:
out_err = IA_CSS_ERR_INTERNAL_ERROR;
break;
case ENOBUFS:
out_err = IA_CSS_ERR_QUEUE_IS_FULL;
break;
default:
out_err = IA_CSS_ERR_INTERNAL_ERROR;
break;
case 0:
out_err = IA_CSS_SUCCESS;
break;
case EINVAL:
out_err = IA_CSS_ERR_INVALID_ARGUMENTS;
break;
case ENODATA:
out_err = IA_CSS_ERR_QUEUE_IS_EMPTY;
break;
case ENOSYS:
case ENOTSUP:
out_err = IA_CSS_ERR_INTERNAL_ERROR;
break;
case ENOBUFS:
out_err = IA_CSS_ERR_QUEUE_IS_FULL;
break;
default:
out_err = IA_CSS_ERR_INTERNAL_ERROR;
break;
}
return out_err;
}
/* MW: Table look-up ??? */
unsigned int ia_css_util_input_format_bpp(
enum atomisp_input_format format,
bool two_ppc)
enum atomisp_input_format format,
bool two_ppc)
{
unsigned int rval = 0;
@ -114,7 +114,7 @@ unsigned int ia_css_util_input_format_bpp(
}
enum ia_css_err ia_css_util_check_vf_info(
const struct ia_css_frame_info * const info)
const struct ia_css_frame_info *const info)
{
enum ia_css_err err;
unsigned int max_vf_width;
@ -130,8 +130,8 @@ enum ia_css_err ia_css_util_check_vf_info(
}
enum ia_css_err ia_css_util_check_vf_out_info(
const struct ia_css_frame_info * const out_info,
const struct ia_css_frame_info * const vf_info)
const struct ia_css_frame_info *const out_info,
const struct ia_css_frame_info *const vf_info)
{
enum ia_css_err err;
@ -191,18 +191,18 @@ bool ia_css_util_is_input_format_raw(enum atomisp_input_format format)
bool ia_css_util_is_input_format_yuv(enum atomisp_input_format format)
{
return format == ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY ||
format == ATOMISP_INPUT_FORMAT_YUV420_8 ||
format == ATOMISP_INPUT_FORMAT_YUV420_10 ||
format == ATOMISP_INPUT_FORMAT_YUV420_16 ||
format == ATOMISP_INPUT_FORMAT_YUV422_8 ||
format == ATOMISP_INPUT_FORMAT_YUV422_10 ||
format == ATOMISP_INPUT_FORMAT_YUV422_16;
format == ATOMISP_INPUT_FORMAT_YUV420_8 ||
format == ATOMISP_INPUT_FORMAT_YUV420_10 ||
format == ATOMISP_INPUT_FORMAT_YUV420_16 ||
format == ATOMISP_INPUT_FORMAT_YUV422_8 ||
format == ATOMISP_INPUT_FORMAT_YUV422_10 ||
format == ATOMISP_INPUT_FORMAT_YUV422_16;
}
enum ia_css_err ia_css_util_check_input(
const struct ia_css_stream_config * const stream_config,
bool must_be_raw,
bool must_be_yuv)
const struct ia_css_stream_config *const stream_config,
bool must_be_raw,
bool must_be_yuv)
{
assert(stream_config);

210
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.c
View File

@ -24,10 +24,11 @@
void
ia_css_configure_iterator(
const struct ia_css_binary *binary,
const struct ia_css_iterator_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_iterator_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_iterator() enter:\n");
{
unsigned int offset = 0;
@ -39,20 +40,23 @@ ia_css_configure_iterator(
}
if (size) {
ia_css_iterator_config((struct sh_css_isp_iterator_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_iterator() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_copy_output(
const struct ia_css_binary *binary,
const struct ia_css_copy_output_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_copy_output_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_copy_output() enter:\n");
{
unsigned int offset = 0;
@ -64,20 +68,23 @@ ia_css_configure_copy_output(
}
if (size) {
ia_css_copy_output_config((struct sh_css_isp_copy_output_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_copy_output() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_crop(
const struct ia_css_binary *binary,
const struct ia_css_crop_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_crop_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_crop() enter:\n");
{
unsigned int offset = 0;
@ -89,20 +96,23 @@ ia_css_configure_crop(
}
if (size) {
ia_css_crop_config((struct sh_css_isp_crop_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_crop() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_fpn(
const struct ia_css_binary *binary,
const struct ia_css_fpn_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_fpn_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_fpn() enter:\n");
{
unsigned int offset = 0;
@ -114,20 +124,23 @@ ia_css_configure_fpn(
}
if (size) {
ia_css_fpn_config((struct sh_css_isp_fpn_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_fpn() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_dvs(
const struct ia_css_binary *binary,
const struct ia_css_dvs_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_dvs_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_dvs() enter:\n");
{
unsigned int offset = 0;
@ -139,20 +152,23 @@ ia_css_configure_dvs(
}
if (size) {
ia_css_dvs_config((struct sh_css_isp_dvs_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_dvs() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_qplane(
const struct ia_css_binary *binary,
const struct ia_css_qplane_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_qplane_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_qplane() enter:\n");
{
unsigned int offset = 0;
@ -164,20 +180,23 @@ ia_css_configure_qplane(
}
if (size) {
ia_css_qplane_config((struct sh_css_isp_qplane_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_qplane() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_output0(
const struct ia_css_binary *binary,
const struct ia_css_output0_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_output0_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_output0() enter:\n");
{
unsigned int offset = 0;
@ -189,20 +208,23 @@ ia_css_configure_output0(
}
if (size) {
ia_css_output0_config((struct sh_css_isp_output_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_output0() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_output1(
const struct ia_css_binary *binary,
const struct ia_css_output1_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_output1_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_output1() enter:\n");
{
unsigned int offset = 0;
@ -214,20 +236,23 @@ ia_css_configure_output1(
}
if (size) {
ia_css_output1_config((struct sh_css_isp_output_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_output1() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_output(
const struct ia_css_binary *binary,
const struct ia_css_output_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_output_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_output() enter:\n");
{
unsigned int offset = 0;
@ -239,10 +264,12 @@ ia_css_configure_output(
}
if (size) {
ia_css_output_config((struct sh_css_isp_output_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_output() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
@ -250,10 +277,11 @@ ia_css_configure_output(
void
ia_css_configure_sc(
const struct ia_css_binary *binary,
const struct ia_css_sc_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_sc_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_sc() enter:\n");
{
unsigned int offset = 0;
@ -265,10 +293,12 @@ ia_css_configure_sc(
}
if (size) {
ia_css_sc_config((struct sh_css_isp_sc_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_sc() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
@ -276,10 +306,11 @@ ia_css_configure_sc(
void
ia_css_configure_raw(
const struct ia_css_binary *binary,
const struct ia_css_raw_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_raw_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_raw() enter:\n");
{
unsigned int offset = 0;
@ -291,20 +322,23 @@ ia_css_configure_raw(
}
if (size) {
ia_css_raw_config((struct sh_css_isp_raw_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_raw() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_tnr(
const struct ia_css_binary *binary,
const struct ia_css_tnr_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_tnr_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_tnr() enter:\n");
{
unsigned int offset = 0;
@ -316,20 +350,23 @@ ia_css_configure_tnr(
}
if (size) {
ia_css_tnr_config((struct sh_css_isp_tnr_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_tnr() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_ref(
const struct ia_css_binary *binary,
const struct ia_css_ref_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_ref_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_ref() enter:\n");
{
unsigned int offset = 0;
@ -341,20 +378,23 @@ ia_css_configure_ref(
}
if (size) {
ia_css_ref_config((struct sh_css_isp_ref_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_ref() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_vf(
const struct ia_css_binary *binary,
const struct ia_css_vf_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_vf_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_vf() enter:\n");
{
unsigned int offset = 0;
@ -366,8 +406,10 @@ ia_css_configure_vf(
}
if (size) {
ia_css_vf_config((struct sh_css_isp_vf_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_vf() leave:\n");
}

56
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_configs.h
View File

@ -88,101 +88,101 @@ struct ia_css_config_memory_offsets {
void
ia_css_configure_iterator(
const struct ia_css_binary *binary,
const struct ia_css_iterator_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_iterator_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_copy_output(
const struct ia_css_binary *binary,
const struct ia_css_copy_output_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_copy_output_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_crop(
const struct ia_css_binary *binary,
const struct ia_css_crop_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_crop_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_fpn(
const struct ia_css_binary *binary,
const struct ia_css_fpn_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_fpn_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_dvs(
const struct ia_css_binary *binary,
const struct ia_css_dvs_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_dvs_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_qplane(
const struct ia_css_binary *binary,
const struct ia_css_qplane_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_qplane_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_output0(
const struct ia_css_binary *binary,
const struct ia_css_output0_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_output0_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_output1(
const struct ia_css_binary *binary,
const struct ia_css_output1_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_output1_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_output(
const struct ia_css_binary *binary,
const struct ia_css_output_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_output_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
#ifdef ISP2401
void
ia_css_configure_sc(
const struct ia_css_binary *binary,
const struct ia_css_sc_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_sc_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
#endif
void
ia_css_configure_raw(
const struct ia_css_binary *binary,
const struct ia_css_raw_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_raw_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_tnr(
const struct ia_css_binary *binary,
const struct ia_css_tnr_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_tnr_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_ref(
const struct ia_css_binary *binary,
const struct ia_css_ref_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_ref_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_vf(
const struct ia_css_binary *binary,
const struct ia_css_vf_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_vf_configuration *config_dmem);
#endif /* IA_CSS_INCLUDE_CONFIGURATION */

1871
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.c
View File

File diff suppressed because it is too large Load Diff

84
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_params.h
View File

@ -150,237 +150,237 @@ struct ia_css_memory_offsets {
struct ia_css_pipeline_stage; /* forward declaration */
extern void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])(
unsigned int pipe_id,
const struct ia_css_pipeline_stage *stage,
struct ia_css_isp_parameters *params);
unsigned int pipe_id,
const struct ia_css_pipeline_stage *stage,
struct ia_css_isp_parameters *params);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_dp_config(struct ia_css_isp_parameters *params,
const struct ia_css_dp_config *config);
const struct ia_css_dp_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_wb_config(struct ia_css_isp_parameters *params,
const struct ia_css_wb_config *config);
const struct ia_css_wb_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_tnr_config(struct ia_css_isp_parameters *params,
const struct ia_css_tnr_config *config);
const struct ia_css_tnr_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_ob_config(struct ia_css_isp_parameters *params,
const struct ia_css_ob_config *config);
const struct ia_css_ob_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_de_config(struct ia_css_isp_parameters *params,
const struct ia_css_de_config *config);
const struct ia_css_de_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_anr_config(struct ia_css_isp_parameters *params,
const struct ia_css_anr_config *config);
const struct ia_css_anr_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_anr2_config(struct ia_css_isp_parameters *params,
const struct ia_css_anr_thres *config);
const struct ia_css_anr_thres *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_ce_config(struct ia_css_isp_parameters *params,
const struct ia_css_ce_config *config);
const struct ia_css_ce_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_ecd_config(struct ia_css_isp_parameters *params,
const struct ia_css_ecd_config *config);
const struct ia_css_ecd_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_ynr_config(struct ia_css_isp_parameters *params,
const struct ia_css_ynr_config *config);
const struct ia_css_ynr_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_fc_config(struct ia_css_isp_parameters *params,
const struct ia_css_fc_config *config);
const struct ia_css_fc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_cnr_config(struct ia_css_isp_parameters *params,
const struct ia_css_cnr_config *config);
const struct ia_css_cnr_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_macc_config(struct ia_css_isp_parameters *params,
const struct ia_css_macc_config *config);
const struct ia_css_macc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_ctc_config(struct ia_css_isp_parameters *params,
const struct ia_css_ctc_config *config);
const struct ia_css_ctc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_aa_config(struct ia_css_isp_parameters *params,
const struct ia_css_aa_config *config);
const struct ia_css_aa_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params,
const struct ia_css_cc_config *config);
const struct ia_css_cc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params,
const struct ia_css_cc_config *config);
const struct ia_css_cc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_csc_config(struct ia_css_isp_parameters *params,
const struct ia_css_cc_config *config);
const struct ia_css_cc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_nr_config(struct ia_css_isp_parameters *params,
const struct ia_css_nr_config *config);
const struct ia_css_nr_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_gc_config(struct ia_css_isp_parameters *params,
const struct ia_css_gc_config *config);
const struct ia_css_gc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs_coefficients *config);
const struct ia_css_dvs_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs_coefficients *config);
const struct ia_css_dvs_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs_coefficients *config);
const struct ia_css_dvs_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs_coefficients *config);
const struct ia_css_dvs_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs2_coefficients *config);
const struct ia_css_dvs2_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs2_coefficients *config);
const struct ia_css_dvs2_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs2_coefficients *config);
const struct ia_css_dvs2_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs2_coefficients *config);
const struct ia_css_dvs2_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params,
const struct ia_css_rgb_gamma_table *config);
const struct ia_css_rgb_gamma_table *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params,
const struct ia_css_rgb_gamma_table *config);
const struct ia_css_rgb_gamma_table *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params,
const struct ia_css_rgb_gamma_table *config);
const struct ia_css_rgb_gamma_table *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params,
const struct ia_css_xnr_table *config);
const struct ia_css_xnr_table *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_formats_config(struct ia_css_isp_parameters *params,
const struct ia_css_formats_config *config);
const struct ia_css_formats_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_xnr_config(struct ia_css_isp_parameters *params,
const struct ia_css_xnr_config *config);
const struct ia_css_xnr_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_xnr3_config(struct ia_css_isp_parameters *params,
const struct ia_css_xnr3_config *config);
const struct ia_css_xnr3_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_s3a_config(struct ia_css_isp_parameters *params,
const struct ia_css_3a_config *config);
const struct ia_css_3a_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_output_config(struct ia_css_isp_parameters *params,
const struct ia_css_output_config *config);
const struct ia_css_output_config *config);
/* Code generated by genparam/gencode.c:gen_global_access_function() */
void
ia_css_get_configs(struct ia_css_isp_parameters *params,
const struct ia_css_isp_config *config)
const struct ia_css_isp_config *config)
;
#ifdef ISP2401
@ -389,7 +389,7 @@ ia_css_get_configs(struct ia_css_isp_parameters *params,
void
ia_css_set_configs(struct ia_css_isp_parameters *params,
const struct ia_css_isp_config *config)
const struct ia_css_isp_config *config)
;
#ifdef ISP2401

98
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.c
View File

@ -22,9 +22,10 @@
static void
ia_css_initialize_aa_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_aa_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->vmem.aa.size;
@ -32,18 +33,21 @@ ia_css_initialize_aa_state(
unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.aa.offset;
if (size)
memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], 0, size);
memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
0, size);
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_aa_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_cnr_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_cnr_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr.size;
@ -52,20 +56,22 @@ ia_css_initialize_cnr_state(
if (size) {
ia_css_init_cnr_state(
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_cnr_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_cnr2_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_cnr2_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr2.size;
@ -74,20 +80,22 @@ ia_css_initialize_cnr2_state(
if (size) {
ia_css_init_cnr2_state(
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_cnr2_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_dp_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_dp_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->vmem.dp.size;
@ -96,20 +104,22 @@ ia_css_initialize_dp_state(
if (size) {
ia_css_init_dp_state(
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_dp_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_de_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_de_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->vmem.de.size;
@ -118,20 +128,22 @@ ia_css_initialize_de_state(
if (size) {
ia_css_init_de_state(
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_de_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_tnr_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_tnr_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->dmem.tnr.size;
@ -140,20 +152,22 @@ ia_css_initialize_tnr_state(
if (size) {
ia_css_init_tnr_state((struct sh_css_isp_tnr_dmem_state *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_tnr_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_ref_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_ref_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->dmem.ref.size;
@ -162,20 +176,22 @@ ia_css_initialize_ref_state(
if (size) {
ia_css_init_ref_state((struct sh_css_isp_ref_dmem_state *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_ref_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_ynr_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_ynr_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->vmem.ynr.size;
@ -184,16 +200,18 @@ ia_css_initialize_ynr_state(
if (size) {
ia_css_init_ynr_state(
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_ynr_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_state_init_table() */
void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_binary *binary) = {
void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(
const struct ia_css_binary *binary) = {
ia_css_initialize_aa_state,
ia_css_initialize_cnr_state,
ia_css_initialize_cnr2_state,

3
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hive_isp_css_2400_system_generated/ia_css_isp_states.h
View File

@ -65,7 +65,8 @@ struct ia_css_state_memory_offsets {
#include "ia_css_binary.h" /* struct ia_css_binary */
/* Code generated by genparam/genstate.c:gen_state_init_table() */
extern void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_binary *binary);
extern void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(
const struct ia_css_binary *binary);
#endif /* IA_CSS_INCLUDE_STATE */

2
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/dma_v2_defs.h
View File

@ -122,7 +122,7 @@
#define _DMA_V2_ZERO_EXTEND 0
#define _DMA_V2_SIGN_EXTEND 1
/* SLAVE address map */
/* SLAVE address map */
#define _DMA_V2_SEL_FSM_CMD 0
#define _DMA_V2_SEL_CH_REG 1
#define _DMA_V2_SEL_CONN_GROUP 2

50
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gdc_v2_defs.h
View File

@ -25,43 +25,43 @@
#define HRT_GDC_BCI_COEF_BITS 14 /* 14 bits per coefficient */
#define HRT_GDC_BCI_COEF_ONE (1 << (HRT_GDC_BCI_COEF_BITS - 2)) /* We represent signed 10 bit coefficients. */
/* The supported range is [-256, .., +256] */
/* in 14-bit signed notation, */
/* We need all ten bits (MSB must be zero). */
/* -s is inserted to solve this issue, and */
/* therefore "1" is equal to +256. */
/* The supported range is [-256, .., +256] */
/* in 14-bit signed notation, */
/* We need all ten bits (MSB must be zero). */
/* -s is inserted to solve this issue, and */
/* therefore "1" is equal to +256. */
#define HRT_GDC_BCI_COEF_MASK ((1 << HRT_GDC_BCI_COEF_BITS) - 1)
#define HRT_GDC_LUT_BYTES (HRT_GDC_N * 4 * 2) /* 1024 addresses, 4 coefficients per address, */
/* 2 bytes per coefficient */
/* 2 bytes per coefficient */
#define _HRT_GDC_REG_ALIGN 4
// 31 30 29 25 24 0
// |-----|---|--------|------------------------|
// | CMD | C | Reg_ID | Value |
// 31 30 29 25 24 0
// |-----|---|--------|------------------------|
// | CMD | C | Reg_ID | Value |
// There are just two commands possible for the GDC block:
// 1 - Configure reg
// 0 - Data token
// There are just two commands possible for the GDC block:
// 1 - Configure reg
// 0 - Data token
// C - Reserved bit
// Used in protocol to indicate whether it is C-run or other type of runs
// In case of C-run, this bit has a value of 1, for all the other runs, it is 0.
// C - Reserved bit
// Used in protocol to indicate whether it is C-run or other type of runs
// In case of C-run, this bit has a value of 1, for all the other runs, it is 0.
// Reg_ID - Address of the register to be configured
// Reg_ID - Address of the register to be configured
// Value - Value to store to the addressed register, maximum of 24 bits
// Value - Value to store to the addressed register, maximum of 24 bits
// Configure reg command is not followed by any other token.
// The address of the register and the data to be filled in is contained in the same token
// Configure reg command is not followed by any other token.
// The address of the register and the data to be filled in is contained in the same token
// When the first data token is received, it must be:
// 1. FRX and FRY (device configured in one of the scaling modes) ***DEFAULT MODE***, or,
// 2. P0'X (device configured in one of the tetragon modes)
// After the first data token is received, pre-defined number of tokens with the following meaning follow:
// 1. two tokens: SRC address ; DST address
// 2. nine tokens: P0'Y, .., P3'Y ; SRC address ; DST address
// When the first data token is received, it must be:
// 1. FRX and FRY (device configured in one of the scaling modes) ***DEFAULT MODE***, or,
// 2. P0'X (device configured in one of the tetragon modes)
// After the first data token is received, pre-defined number of tokens with the following meaning follow:
// 1. two tokens: SRC address ; DST address
// 2. nine tokens: P0'Y, .., P3'Y ; SRC address ; DST address
#define HRT_GDC_CONFIG_CMD 1
#define HRT_GDC_DATA_CMD 0

8
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/gpio_block_defs.h
View File

@ -18,10 +18,10 @@
#define _HRT_GPIO_BLOCK_REG_ALIGN 4
/* R/W registers */
#define _gpio_block_reg_do_e 0
#define _gpio_block_reg_do_e 0
#define _gpio_block_reg_do_select 1
#define _gpio_block_reg_do_0 2
#define _gpio_block_reg_do_1 3
#define _gpio_block_reg_do_0 2
#define _gpio_block_reg_do_1 3
#define _gpio_block_reg_do_pwm_cnt_0 4
#define _gpio_block_reg_do_pwm_cnt_1 5
#define _gpio_block_reg_do_pwm_cnt_2 6
@ -36,6 +36,6 @@
#define _gpio_block_reg_di_active_level 15
/* read-only registers */
#define _gpio_block_reg_di 16
#define _gpio_block_reg_di 16
#endif /* _gpio_block_defs_h_ */

76
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/hive_isp_css_irq_types_hrt.h
View File

@ -23,50 +23,50 @@
* The definitions are taken from <system>_defs.h
*/
typedef enum hrt_isp_css_irq {
hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID,
hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID,
hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID,
hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID,
hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID,
hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID,
hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID,
hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID,
hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID,
hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID,
hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID,
hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID,
hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID,
hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID,
hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID,
hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID,
hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID,
hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID,
hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID,
hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID,
hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID,
hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID,
hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID,
hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID,
hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID,
hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID,
hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID,
hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID,
hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID,
hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID,
hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID,
hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID,
hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID,
hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID,
hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID,
hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID,
hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID,
hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID,
hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID,
hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID,
#ifdef _HIVE_ISP_CSS_2401_SYSTEM
hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID,
hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID,
#else
hrt_isp_css_irq_isp_pmem_error = HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID,
hrt_isp_css_irq_isp_pmem_error = HIVE_GP_DEV_IRQ_ISP_PMEM_ERROR_BIT_ID,
#endif
hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID,
hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID,
hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID,
hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID,
hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID,
hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID,
hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID,
hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID,
hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID,
hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID,
hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID,
/* this must (obviously) be the last on in the enum */
hrt_isp_css_irq_num_irqs
hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID,
hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID,
hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID,
hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID,
hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID,
hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID,
hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID,
hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID,
hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID,
hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID,
hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID,
/* this must (obviously) be the last on in the enum */
hrt_isp_css_irq_num_irqs
} hrt_isp_css_irq_t;
typedef enum hrt_isp_css_irq_status {
hrt_isp_css_irq_status_error,
hrt_isp_css_irq_status_more_irqs,
hrt_isp_css_irq_status_success
hrt_isp_css_irq_status_error,
hrt_isp_css_irq_status_more_irqs,
hrt_isp_css_irq_status_success
} hrt_isp_css_irq_status_t;
#endif /* _HIVE_ISP_CSS_IRQ_TYPES_HRT_H_ */

46
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_mamoiada_params.h
View File

@ -45,26 +45,26 @@
#define ISP_VMEM_ELEM_PRECISION 14
#define ISP_VMEM_IS_BAMEM 1
#if ISP_VMEM_IS_BAMEM
#define ISP_VMEM_BAMEM_MAX_BOI_HEIGHT 8
#define ISP_VMEM_BAMEM_LATENCY 5
#define ISP_VMEM_BAMEM_BANK_NARROWING_FACTOR 2
#define ISP_VMEM_BAMEM_NR_DATA_PLANES 8
#define ISP_VMEM_BAMEM_NR_CFG_REGISTERS 16
#define ISP_VMEM_BAMEM_LININT 0
#define ISP_VMEM_BAMEM_DAP_BITS 3
#define ISP_VMEM_BAMEM_LININT_FRAC_BITS 0
#define ISP_VMEM_BAMEM_PID_BITS 3
#define ISP_VMEM_BAMEM_OFFSET_BITS 19
#define ISP_VMEM_BAMEM_ADDRESS_BITS 25
#define ISP_VMEM_BAMEM_RID_BITS 4
#define ISP_VMEM_BAMEM_TRANSPOSITION 1
#define ISP_VMEM_BAMEM_VEC_PLUS_SLICE 1
#define ISP_VMEM_BAMEM_ARB_SERVICE_CYCLE_BITS 1
#define ISP_VMEM_BAMEM_LUT_ELEMS 16
#define ISP_VMEM_BAMEM_LUT_ADDR_WIDTH 14
#define ISP_VMEM_BAMEM_HALF_BLOCK_WRITE 1
#define ISP_VMEM_BAMEM_SMART_FETCH 1
#define ISP_VMEM_BAMEM_BIG_ENDIANNESS 0
#define ISP_VMEM_BAMEM_MAX_BOI_HEIGHT 8
#define ISP_VMEM_BAMEM_LATENCY 5
#define ISP_VMEM_BAMEM_BANK_NARROWING_FACTOR 2
#define ISP_VMEM_BAMEM_NR_DATA_PLANES 8
#define ISP_VMEM_BAMEM_NR_CFG_REGISTERS 16
#define ISP_VMEM_BAMEM_LININT 0
#define ISP_VMEM_BAMEM_DAP_BITS 3
#define ISP_VMEM_BAMEM_LININT_FRAC_BITS 0
#define ISP_VMEM_BAMEM_PID_BITS 3
#define ISP_VMEM_BAMEM_OFFSET_BITS 19
#define ISP_VMEM_BAMEM_ADDRESS_BITS 25
#define ISP_VMEM_BAMEM_RID_BITS 4
#define ISP_VMEM_BAMEM_TRANSPOSITION 1
#define ISP_VMEM_BAMEM_VEC_PLUS_SLICE 1
#define ISP_VMEM_BAMEM_ARB_SERVICE_CYCLE_BITS 1
#define ISP_VMEM_BAMEM_LUT_ELEMS 16
#define ISP_VMEM_BAMEM_LUT_ADDR_WIDTH 14
#define ISP_VMEM_BAMEM_HALF_BLOCK_WRITE 1
#define ISP_VMEM_BAMEM_SMART_FETCH 1
#define ISP_VMEM_BAMEM_BIG_ENDIANNESS 0
#endif /* ISP_VMEM_IS_BAMEM */
#define ISP_PMEM_DEPTH 2048
#define ISP_PMEM_WIDTH 640
@ -111,8 +111,8 @@
#define ISP_SRU_GUARDING 1
#define ISP_VLSU_GUARDING 1
#define ISP_VRF_RAM 1
#define ISP_SRF_RAM 1
#define ISP_VRF_RAM 1
#define ISP_SRF_RAM 1
#define ISP_SPLIT_VMUL_VADD_IS 0
#define ISP_RFSPLIT_FPGA 0
@ -166,7 +166,7 @@
#define ISP_VMEM_WIDTH 896
#define ISP_VMEM_ALIGN 128
#if ISP_VMEM_IS_BAMEM
#define ISP_VMEM_ALIGN_ELEM 2
#define ISP_VMEM_ALIGN_ELEM 2
#endif /* ISP_VMEM_IS_BAMEM */
#define ISP_SIMDLSU 1
#define ISP_LSU_IMM_BITS 12

4
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2400_system/hrt/isp2400_support.h
View File

@ -31,8 +31,8 @@ typedef char *tmemvectors, *tmemvectoru, *tvector;
#define hrt_isp_vmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_vmem(cell))
#if ISP_HAS_HIST
#define hrt_isp_hist(cell) HRT_PROC_TYPE_PROP(cell, _simd_histogram)
#define hrt_isp_hist_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_hist(cell))
#define hrt_isp_hist(cell) HRT_PROC_TYPE_PROP(cell, _simd_histogram)
#define hrt_isp_hist_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_hist(cell))
#endif
#endif /* _isp2400_support_h */

210
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.c
View File

@ -24,10 +24,11 @@
void
ia_css_configure_iterator(
const struct ia_css_binary *binary,
const struct ia_css_iterator_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_iterator_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_iterator() enter:\n");
{
unsigned int offset = 0;
@ -39,20 +40,23 @@ ia_css_configure_iterator(
}
if (size) {
ia_css_iterator_config((struct sh_css_isp_iterator_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_iterator() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_copy_output(
const struct ia_css_binary *binary,
const struct ia_css_copy_output_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_copy_output_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_copy_output() enter:\n");
{
unsigned int offset = 0;
@ -64,20 +68,23 @@ ia_css_configure_copy_output(
}
if (size) {
ia_css_copy_output_config((struct sh_css_isp_copy_output_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_copy_output() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_crop(
const struct ia_css_binary *binary,
const struct ia_css_crop_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_crop_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_crop() enter:\n");
{
unsigned int offset = 0;
@ -89,20 +96,23 @@ ia_css_configure_crop(
}
if (size) {
ia_css_crop_config((struct sh_css_isp_crop_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_crop() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_fpn(
const struct ia_css_binary *binary,
const struct ia_css_fpn_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_fpn_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_fpn() enter:\n");
{
unsigned int offset = 0;
@ -114,20 +124,23 @@ ia_css_configure_fpn(
}
if (size) {
ia_css_fpn_config((struct sh_css_isp_fpn_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_fpn() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_dvs(
const struct ia_css_binary *binary,
const struct ia_css_dvs_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_dvs_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_dvs() enter:\n");
{
unsigned int offset = 0;
@ -139,20 +152,23 @@ ia_css_configure_dvs(
}
if (size) {
ia_css_dvs_config((struct sh_css_isp_dvs_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_dvs() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_qplane(
const struct ia_css_binary *binary,
const struct ia_css_qplane_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_qplane_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_qplane() enter:\n");
{
unsigned int offset = 0;
@ -164,20 +180,23 @@ ia_css_configure_qplane(
}
if (size) {
ia_css_qplane_config((struct sh_css_isp_qplane_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_qplane() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_output0(
const struct ia_css_binary *binary,
const struct ia_css_output0_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_output0_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_output0() enter:\n");
{
unsigned int offset = 0;
@ -189,20 +208,23 @@ ia_css_configure_output0(
}
if (size) {
ia_css_output0_config((struct sh_css_isp_output_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_output0() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_output1(
const struct ia_css_binary *binary,
const struct ia_css_output1_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_output1_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_output1() enter:\n");
{
unsigned int offset = 0;
@ -214,20 +236,23 @@ ia_css_configure_output1(
}
if (size) {
ia_css_output1_config((struct sh_css_isp_output_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_output1() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_output(
const struct ia_css_binary *binary,
const struct ia_css_output_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_output_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_output() enter:\n");
{
unsigned int offset = 0;
@ -239,10 +264,12 @@ ia_css_configure_output(
}
if (size) {
ia_css_output_config((struct sh_css_isp_output_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_output() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
@ -250,10 +277,11 @@ ia_css_configure_output(
void
ia_css_configure_sc(
const struct ia_css_binary *binary,
const struct ia_css_sc_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_sc_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_sc() enter:\n");
{
unsigned int offset = 0;
@ -265,10 +293,12 @@ ia_css_configure_sc(
}
if (size) {
ia_css_sc_config((struct sh_css_isp_sc_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_sc() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
@ -276,10 +306,11 @@ ia_css_configure_sc(
void
ia_css_configure_raw(
const struct ia_css_binary *binary,
const struct ia_css_raw_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_raw_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_raw() enter:\n");
{
unsigned int offset = 0;
@ -291,20 +322,23 @@ ia_css_configure_raw(
}
if (size) {
ia_css_raw_config((struct sh_css_isp_raw_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_raw() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_tnr(
const struct ia_css_binary *binary,
const struct ia_css_tnr_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_tnr_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_tnr() enter:\n");
{
unsigned int offset = 0;
@ -316,20 +350,23 @@ ia_css_configure_tnr(
}
if (size) {
ia_css_tnr_config((struct sh_css_isp_tnr_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_tnr() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_ref(
const struct ia_css_binary *binary,
const struct ia_css_ref_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_ref_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_ref() enter:\n");
{
unsigned int offset = 0;
@ -341,20 +378,23 @@ ia_css_configure_ref(
}
if (size) {
ia_css_ref_config((struct sh_css_isp_ref_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_ref() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_vf(
const struct ia_css_binary *binary,
const struct ia_css_vf_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_vf_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_vf() enter:\n");
{
unsigned int offset = 0;
@ -366,8 +406,10 @@ ia_css_configure_vf(
}
if (size) {
ia_css_vf_config((struct sh_css_isp_vf_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_vf() leave:\n");
}

56
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_configs.h
View File

@ -88,101 +88,101 @@ struct ia_css_config_memory_offsets {
void
ia_css_configure_iterator(
const struct ia_css_binary *binary,
const struct ia_css_iterator_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_iterator_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_copy_output(
const struct ia_css_binary *binary,
const struct ia_css_copy_output_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_copy_output_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_crop(
const struct ia_css_binary *binary,
const struct ia_css_crop_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_crop_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_fpn(
const struct ia_css_binary *binary,
const struct ia_css_fpn_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_fpn_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_dvs(
const struct ia_css_binary *binary,
const struct ia_css_dvs_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_dvs_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_qplane(
const struct ia_css_binary *binary,
const struct ia_css_qplane_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_qplane_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_output0(
const struct ia_css_binary *binary,
const struct ia_css_output0_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_output0_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_output1(
const struct ia_css_binary *binary,
const struct ia_css_output1_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_output1_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_output(
const struct ia_css_binary *binary,
const struct ia_css_output_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_output_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
#ifdef ISP2401
void
ia_css_configure_sc(
const struct ia_css_binary *binary,
const struct ia_css_sc_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_sc_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
#endif
void
ia_css_configure_raw(
const struct ia_css_binary *binary,
const struct ia_css_raw_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_raw_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_tnr(
const struct ia_css_binary *binary,
const struct ia_css_tnr_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_tnr_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_ref(
const struct ia_css_binary *binary,
const struct ia_css_ref_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_ref_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_vf(
const struct ia_css_binary *binary,
const struct ia_css_vf_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_vf_configuration *config_dmem);
#endif /* IA_CSS_INCLUDE_CONFIGURATION */

1868
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.c
View File

File diff suppressed because it is too large Load Diff

84
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_params.h
View File

@ -150,237 +150,237 @@ struct ia_css_memory_offsets {
struct ia_css_pipeline_stage; /* forward declaration */
extern void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])(
unsigned int pipe_id,
const struct ia_css_pipeline_stage *stage,
struct ia_css_isp_parameters *params);
unsigned int pipe_id,
const struct ia_css_pipeline_stage *stage,
struct ia_css_isp_parameters *params);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_dp_config(struct ia_css_isp_parameters *params,
const struct ia_css_dp_config *config);
const struct ia_css_dp_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_wb_config(struct ia_css_isp_parameters *params,
const struct ia_css_wb_config *config);
const struct ia_css_wb_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_tnr_config(struct ia_css_isp_parameters *params,
const struct ia_css_tnr_config *config);
const struct ia_css_tnr_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_ob_config(struct ia_css_isp_parameters *params,
const struct ia_css_ob_config *config);
const struct ia_css_ob_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_de_config(struct ia_css_isp_parameters *params,
const struct ia_css_de_config *config);
const struct ia_css_de_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_anr_config(struct ia_css_isp_parameters *params,
const struct ia_css_anr_config *config);
const struct ia_css_anr_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_anr2_config(struct ia_css_isp_parameters *params,
const struct ia_css_anr_thres *config);
const struct ia_css_anr_thres *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_ce_config(struct ia_css_isp_parameters *params,
const struct ia_css_ce_config *config);
const struct ia_css_ce_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_ecd_config(struct ia_css_isp_parameters *params,
const struct ia_css_ecd_config *config);
const struct ia_css_ecd_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_ynr_config(struct ia_css_isp_parameters *params,
const struct ia_css_ynr_config *config);
const struct ia_css_ynr_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_fc_config(struct ia_css_isp_parameters *params,
const struct ia_css_fc_config *config);
const struct ia_css_fc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_cnr_config(struct ia_css_isp_parameters *params,
const struct ia_css_cnr_config *config);
const struct ia_css_cnr_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_macc_config(struct ia_css_isp_parameters *params,
const struct ia_css_macc_config *config);
const struct ia_css_macc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_ctc_config(struct ia_css_isp_parameters *params,
const struct ia_css_ctc_config *config);
const struct ia_css_ctc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_aa_config(struct ia_css_isp_parameters *params,
const struct ia_css_aa_config *config);
const struct ia_css_aa_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params,
const struct ia_css_cc_config *config);
const struct ia_css_cc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params,
const struct ia_css_cc_config *config);
const struct ia_css_cc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_csc_config(struct ia_css_isp_parameters *params,
const struct ia_css_cc_config *config);
const struct ia_css_cc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_nr_config(struct ia_css_isp_parameters *params,
const struct ia_css_nr_config *config);
const struct ia_css_nr_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_gc_config(struct ia_css_isp_parameters *params,
const struct ia_css_gc_config *config);
const struct ia_css_gc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs_coefficients *config);
const struct ia_css_dvs_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs_coefficients *config);
const struct ia_css_dvs_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs_coefficients *config);
const struct ia_css_dvs_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs_coefficients *config);
const struct ia_css_dvs_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs2_coefficients *config);
const struct ia_css_dvs2_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs2_coefficients *config);
const struct ia_css_dvs2_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs2_coefficients *config);
const struct ia_css_dvs2_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs2_coefficients *config);
const struct ia_css_dvs2_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params,
const struct ia_css_rgb_gamma_table *config);
const struct ia_css_rgb_gamma_table *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params,
const struct ia_css_rgb_gamma_table *config);
const struct ia_css_rgb_gamma_table *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params,
const struct ia_css_rgb_gamma_table *config);
const struct ia_css_rgb_gamma_table *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params,
const struct ia_css_xnr_table *config);
const struct ia_css_xnr_table *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_formats_config(struct ia_css_isp_parameters *params,
const struct ia_css_formats_config *config);
const struct ia_css_formats_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_xnr_config(struct ia_css_isp_parameters *params,
const struct ia_css_xnr_config *config);
const struct ia_css_xnr_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_xnr3_config(struct ia_css_isp_parameters *params,
const struct ia_css_xnr3_config *config);
const struct ia_css_xnr3_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_s3a_config(struct ia_css_isp_parameters *params,
const struct ia_css_3a_config *config);
const struct ia_css_3a_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_output_config(struct ia_css_isp_parameters *params,
const struct ia_css_output_config *config);
const struct ia_css_output_config *config);
/* Code generated by genparam/gencode.c:gen_global_access_function() */
void
ia_css_get_configs(struct ia_css_isp_parameters *params,
const struct ia_css_isp_config *config)
const struct ia_css_isp_config *config)
;
#ifdef ISP2401
@ -389,7 +389,7 @@ ia_css_get_configs(struct ia_css_isp_parameters *params,
void
ia_css_set_configs(struct ia_css_isp_parameters *params,
const struct ia_css_isp_config *config)
const struct ia_css_isp_config *config)
;
#ifdef ISP2401

98
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.c
View File

@ -23,27 +23,31 @@
static void
ia_css_initialize_aa_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_aa_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->vmem.aa.size;
unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.aa.offset;
if (size)
memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], 0, size);
memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
0, size);
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_aa_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_cnr_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_cnr_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr.size;
@ -52,20 +56,22 @@ ia_css_initialize_cnr_state(
if (size) {
ia_css_init_cnr_state(
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_cnr_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_cnr2_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_cnr2_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr2.size;
@ -74,20 +80,22 @@ ia_css_initialize_cnr2_state(
if (size) {
ia_css_init_cnr2_state(
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_cnr2_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_dp_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_dp_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->vmem.dp.size;
@ -96,20 +104,22 @@ ia_css_initialize_dp_state(
if (size) {
ia_css_init_dp_state(
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_dp_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_de_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_de_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->vmem.de.size;
@ -118,20 +128,22 @@ ia_css_initialize_de_state(
if (size) {
ia_css_init_de_state(
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_de_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_tnr_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_tnr_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->dmem.tnr.size;
@ -140,20 +152,22 @@ ia_css_initialize_tnr_state(
if (size) {
ia_css_init_tnr_state((struct sh_css_isp_tnr_dmem_state *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_tnr_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_ref_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_ref_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->dmem.ref.size;
@ -162,20 +176,22 @@ ia_css_initialize_ref_state(
if (size) {
ia_css_init_ref_state((struct sh_css_isp_ref_dmem_state *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_ref_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_ynr_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_ynr_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->vmem.ynr.size;
@ -184,16 +200,18 @@ ia_css_initialize_ynr_state(
if (size) {
ia_css_init_ynr_state(
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_ynr_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_state_init_table() */
void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_binary *binary) = {
void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(
const struct ia_css_binary *binary) = {
ia_css_initialize_aa_state,
ia_css_initialize_cnr_state,
ia_css_initialize_cnr2_state,

3
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hive_isp_css_2401_system_csi2p_generated/ia_css_isp_states.h
View File

@ -65,7 +65,8 @@ struct ia_css_state_memory_offsets {
#include "ia_css_binary.h" /* struct ia_css_binary */
/* Code generated by genparam/genstate.c:gen_state_init_table() */
extern void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_binary *binary);
extern void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(
const struct ia_css_binary *binary);
#endif /* IA_CSS_INCLUDE_STATE */

165
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/csi_rx_private.h
View File

@ -34,27 +34,27 @@
* Refer to "csi_rx_public.h" for details.
*/
static inline void csi_rx_fe_ctrl_get_state(
const csi_rx_frontend_ID_t ID,
csi_rx_fe_ctrl_state_t *state)
const csi_rx_frontend_ID_t ID,
csi_rx_fe_ctrl_state_t *state)
{
u32 i;
state->enable =
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_ENABLE_REG_IDX);
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_ENABLE_REG_IDX);
state->nof_enable_lanes =
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_NOF_ENABLED_LANES_REG_IDX);
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_NOF_ENABLED_LANES_REG_IDX);
state->error_handling =
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_ERROR_HANDLING_REG_IDX);
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_ERROR_HANDLING_REG_IDX);
state->status =
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_STATUS_REG_IDX);
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_STATUS_REG_IDX);
state->status_dlane_hs =
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_STATUS_DLANE_HS_REG_IDX);
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_STATUS_DLANE_HS_REG_IDX);
state->status_dlane_lp =
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_STATUS_DLANE_LP_REG_IDX);
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_STATUS_DLANE_LP_REG_IDX);
state->clane.termen =
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_TERMEN_CLANE_REG_IDX);
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_TERMEN_CLANE_REG_IDX);
state->clane.settle =
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_SETTLE_CLANE_REG_IDX);
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_SETTLE_CLANE_REG_IDX);
/*
* Get the values of the register-set per
@ -62,9 +62,9 @@ static inline void csi_rx_fe_ctrl_get_state(
*/
for (i = 0; i < N_CSI_RX_FE_CTRL_DLANES[ID]; i++) {
csi_rx_fe_ctrl_get_dlane_state(
ID,
i,
&state->dlane[i]);
ID,
i,
&state->dlane[i]);
}
}
@ -73,14 +73,14 @@ static inline void csi_rx_fe_ctrl_get_state(
* Refer to "csi_rx_public.h" for details.
*/
static inline void csi_rx_fe_ctrl_get_dlane_state(
const csi_rx_frontend_ID_t ID,
const u32 lane,
csi_rx_fe_ctrl_lane_t *dlane_state)
const csi_rx_frontend_ID_t ID,
const u32 lane,
csi_rx_fe_ctrl_lane_t *dlane_state)
{
dlane_state->termen =
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_TERMEN_DLANE_REG_IDX(lane));
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_TERMEN_DLANE_REG_IDX(lane));
dlane_state->settle =
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_SETTLE_DLANE_REG_IDX(lane));
csi_rx_fe_ctrl_reg_load(ID, _HRT_CSI_RX_DLY_CNT_SETTLE_DLANE_REG_IDX(lane));
}
/**
@ -88,27 +88,36 @@ static inline void csi_rx_fe_ctrl_get_dlane_state(
* Refer to "csi_rx_public.h" for details.
*/
static inline void csi_rx_fe_ctrl_dump_state(
const csi_rx_frontend_ID_t ID,
csi_rx_fe_ctrl_state_t *state)
const csi_rx_frontend_ID_t ID,
csi_rx_fe_ctrl_state_t *state)
{
u32 i;
ia_css_print("CSI RX FE STATE Controller %d Enable state 0x%x\n", ID, state->enable);
ia_css_print("CSI RX FE STATE Controller %d No Of enable lanes 0x%x\n", ID, state->nof_enable_lanes);
ia_css_print("CSI RX FE STATE Controller %d Error handling 0x%x\n", ID, state->error_handling);
ia_css_print("CSI RX FE STATE Controller %d Enable state 0x%x\n", ID,
state->enable);
ia_css_print("CSI RX FE STATE Controller %d No Of enable lanes 0x%x\n", ID,
state->nof_enable_lanes);
ia_css_print("CSI RX FE STATE Controller %d Error handling 0x%x\n", ID,
state->error_handling);
ia_css_print("CSI RX FE STATE Controller %d Status 0x%x\n", ID, state->status);
ia_css_print("CSI RX FE STATE Controller %d Status Dlane HS 0x%x\n", ID, state->status_dlane_hs);
ia_css_print("CSI RX FE STATE Controller %d Status Dlane LP 0x%x\n", ID, state->status_dlane_lp);
ia_css_print("CSI RX FE STATE Controller %d Status term enable LP 0x%x\n", ID, state->clane.termen);
ia_css_print("CSI RX FE STATE Controller %d Status term settle LP 0x%x\n", ID, state->clane.settle);
ia_css_print("CSI RX FE STATE Controller %d Status Dlane HS 0x%x\n", ID,
state->status_dlane_hs);
ia_css_print("CSI RX FE STATE Controller %d Status Dlane LP 0x%x\n", ID,
state->status_dlane_lp);
ia_css_print("CSI RX FE STATE Controller %d Status term enable LP 0x%x\n", ID,
state->clane.termen);
ia_css_print("CSI RX FE STATE Controller %d Status term settle LP 0x%x\n", ID,
state->clane.settle);
/*
* Get the values of the register-set per
* dlane.
*/
for (i = 0; i < N_CSI_RX_FE_CTRL_DLANES[ID]; i++) {
ia_css_print("CSI RX FE STATE Controller %d DLANE ID %d termen 0x%x\n", ID, i, state->dlane[i].termen);
ia_css_print("CSI RX FE STATE Controller %d DLANE ID %d settle 0x%x\n", ID, i, state->dlane[i].settle);
ia_css_print("CSI RX FE STATE Controller %d DLANE ID %d termen 0x%x\n", ID, i,
state->dlane[i].termen);
ia_css_print("CSI RX FE STATE Controller %d DLANE ID %d settle 0x%x\n", ID, i,
state->dlane[i].settle);
}
}
@ -117,61 +126,61 @@ static inline void csi_rx_fe_ctrl_dump_state(
* Refer to "csi_rx_public.h" for details.
*/
static inline void csi_rx_be_ctrl_get_state(
const csi_rx_backend_ID_t ID,
csi_rx_be_ctrl_state_t *state)
const csi_rx_backend_ID_t ID,
csi_rx_be_ctrl_state_t *state)
{
u32 i;
state->enable =
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_ENABLE_REG_IDX);
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_ENABLE_REG_IDX);
state->status =
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_STATUS_REG_IDX);
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_STATUS_REG_IDX);
for (i = 0; i < N_CSI_RX_BE_MIPI_COMP_FMT_REG ; i++) {
state->comp_format_reg[i] =
csi_rx_be_ctrl_reg_load(ID,
_HRT_MIPI_BACKEND_COMP_FORMAT_REG0_IDX + i);
csi_rx_be_ctrl_reg_load(ID,
_HRT_MIPI_BACKEND_COMP_FORMAT_REG0_IDX + i);
}
state->raw16 =
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_RAW16_CONFIG_REG_IDX);
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_RAW16_CONFIG_REG_IDX);
state->raw18 =
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_RAW18_CONFIG_REG_IDX);
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_RAW18_CONFIG_REG_IDX);
state->force_raw8 =
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_FORCE_RAW8_REG_IDX);
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_FORCE_RAW8_REG_IDX);
state->irq_status =
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_IRQ_STATUS_REG_IDX);
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_IRQ_STATUS_REG_IDX);
#if 0 /* device access error for these registers */
/* ToDo: rootcause this failure */
state->custom_mode_enable =
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_EN_REG_IDX);
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_EN_REG_IDX);
state->custom_mode_data_state =
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_DATA_STATE_REG_IDX);
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_DATA_STATE_REG_IDX);
for (i = 0; i < N_CSI_RX_BE_MIPI_CUSTOM_PEC ; i++) {
state->pec[i] =
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_PIX_EXT_S0P0_REG_IDX + i);
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_PIX_EXT_S0P0_REG_IDX + i);
}
state->custom_mode_valid_eop_config =
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_REG_IDX);
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_CUST_PIX_VALID_EOP_REG_IDX);
#endif
state->global_lut_disregard_reg =
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_GLOBAL_LUT_DISREGARD_REG_IDX);
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_GLOBAL_LUT_DISREGARD_REG_IDX);
state->packet_status_stall =
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_PKT_STALL_STATUS_REG_IDX);
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_PKT_STALL_STATUS_REG_IDX);
/*
* Get the values of the register-set per
* lut.
*/
for (i = 0; i < N_SHORT_PACKET_LUT_ENTRIES[ID]; i++) {
state->short_packet_lut_entry[i] =
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_SP_LUT_ENTRY_0_REG_IDX + i);
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_SP_LUT_ENTRY_0_REG_IDX + i);
}
for (i = 0; i < N_LONG_PACKET_LUT_ENTRIES[ID]; i++) {
state->long_packet_lut_entry[i] =
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_LP_LUT_ENTRY_0_REG_IDX + i);
csi_rx_be_ctrl_reg_load(ID, _HRT_MIPI_BACKEND_LP_LUT_ENTRY_0_REG_IDX + i);
}
}
@ -180,8 +189,8 @@ static inline void csi_rx_be_ctrl_get_state(
* Refer to "csi_rx_public.h" for details.
*/
static inline void csi_rx_be_ctrl_dump_state(
const csi_rx_backend_ID_t ID,
csi_rx_be_ctrl_state_t *state)
const csi_rx_backend_ID_t ID,
csi_rx_be_ctrl_state_t *state)
{
u32 i;
@ -189,28 +198,38 @@ static inline void csi_rx_be_ctrl_dump_state(
ia_css_print("CSI RX BE STATE Controller %d Status 0x%x\n", ID, state->status);
for (i = 0; i < N_CSI_RX_BE_MIPI_COMP_FMT_REG ; i++) {
ia_css_print("CSI RX BE STATE Controller %d comp format reg vc%d value 0x%x\n", ID, i, state->status);
ia_css_print("CSI RX BE STATE Controller %d comp format reg vc%d value 0x%x\n",
ID, i, state->status);
}
ia_css_print("CSI RX BE STATE Controller %d RAW16 0x%x\n", ID, state->raw16);
ia_css_print("CSI RX BE STATE Controller %d RAW18 0x%x\n", ID, state->raw18);
ia_css_print("CSI RX BE STATE Controller %d Force RAW8 0x%x\n", ID, state->force_raw8);
ia_css_print("CSI RX BE STATE Controller %d IRQ state 0x%x\n", ID, state->irq_status);
ia_css_print("CSI RX BE STATE Controller %d Force RAW8 0x%x\n", ID,
state->force_raw8);
ia_css_print("CSI RX BE STATE Controller %d IRQ state 0x%x\n", ID,
state->irq_status);
#if 0 /* ToDo:Getting device access error for this register */
for (i = 0; i < N_CSI_RX_BE_MIPI_CUSTOM_PEC ; i++) {
ia_css_print("CSI RX BE STATE Controller %d PEC ID %d custom pec 0x%x\n", ID, i, state->pec[i]);
ia_css_print("CSI RX BE STATE Controller %d PEC ID %d custom pec 0x%x\n", ID, i,
state->pec[i]);
}
#endif
ia_css_print("CSI RX BE STATE Controller %d Global LUT disregard reg 0x%x\n", ID, state->global_lut_disregard_reg);
ia_css_print("CSI RX BE STATE Controller %d packet stall reg 0x%x\n", ID, state->packet_status_stall);
ia_css_print("CSI RX BE STATE Controller %d Global LUT disregard reg 0x%x\n",
ID, state->global_lut_disregard_reg);
ia_css_print("CSI RX BE STATE Controller %d packet stall reg 0x%x\n", ID,
state->packet_status_stall);
/*
* Get the values of the register-set per
* lut.
*/
for (i = 0; i < N_SHORT_PACKET_LUT_ENTRIES[ID]; i++) {
ia_css_print("CSI RX BE STATE Controller ID %d Short packat entry %d shart packet lut id 0x%x\n", ID, i, state->short_packet_lut_entry[i]);
ia_css_print("CSI RX BE STATE Controller ID %d Short packat entry %d shart packet lut id 0x%x\n",
ID, i,
state->short_packet_lut_entry[i]);
}
for (i = 0; i < N_LONG_PACKET_LUT_ENTRIES[ID]; i++) {
ia_css_print("CSI RX BE STATE Controller ID %d Long packat entry %d Long packet lut id 0x%x\n", ID, i, state->long_packet_lut_entry[i]);
ia_css_print("CSI RX BE STATE Controller ID %d Long packat entry %d Long packet lut id 0x%x\n",
ID, i,
state->long_packet_lut_entry[i]);
}
}
@ -225,12 +244,13 @@ static inline void csi_rx_be_ctrl_dump_state(
* Refer to "csi_rx_public.h" for details.
*/
static inline hrt_data csi_rx_fe_ctrl_reg_load(
const csi_rx_frontend_ID_t ID,
const hrt_address reg)
const csi_rx_frontend_ID_t ID,
const hrt_address reg)
{
assert(ID < N_CSI_RX_FRONTEND_ID);
assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1);
return ia_css_device_load_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof(hrt_data));
return ia_css_device_load_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof(
hrt_data));
}
/**
@ -238,14 +258,15 @@ static inline hrt_data csi_rx_fe_ctrl_reg_load(
* Refer to "ibuf_ctrl_public.h" for details.
*/
static inline void csi_rx_fe_ctrl_reg_store(
const csi_rx_frontend_ID_t ID,
const hrt_address reg,
const hrt_data value)
const csi_rx_frontend_ID_t ID,
const hrt_address reg,
const hrt_data value)
{
assert(ID < N_CSI_RX_FRONTEND_ID);
assert(CSI_RX_FE_CTRL_BASE[ID] != (hrt_address)-1);
ia_css_device_store_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof(hrt_data), value);
ia_css_device_store_uint32(CSI_RX_FE_CTRL_BASE[ID] + reg * sizeof(hrt_data),
value);
}
/**
@ -253,12 +274,13 @@ static inline void csi_rx_fe_ctrl_reg_store(
* Refer to "csi_rx_public.h" for details.
*/
static inline hrt_data csi_rx_be_ctrl_reg_load(
const csi_rx_backend_ID_t ID,
const hrt_address reg)
const csi_rx_backend_ID_t ID,
const hrt_address reg)
{
assert(ID < N_CSI_RX_BACKEND_ID);
assert(CSI_RX_BE_CTRL_BASE[ID] != (hrt_address)-1);
return ia_css_device_load_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg * sizeof(hrt_data));
return ia_css_device_load_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg * sizeof(
hrt_data));
}
/**
@ -266,14 +288,15 @@ static inline hrt_data csi_rx_be_ctrl_reg_load(
* Refer to "ibuf_ctrl_public.h" for details.
*/
static inline void csi_rx_be_ctrl_reg_store(
const csi_rx_backend_ID_t ID,
const hrt_address reg,
const hrt_data value)
const csi_rx_backend_ID_t ID,
const hrt_address reg,
const hrt_data value)
{
assert(ID < N_CSI_RX_BACKEND_ID);
assert(CSI_RX_BE_CTRL_BASE[ID] != (hrt_address)-1);
ia_css_device_store_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg * sizeof(hrt_data), value);
ia_css_device_store_uint32(CSI_RX_BE_CTRL_BASE[ID] + reg * sizeof(hrt_data),
value);
}
/* end of DLI */

175
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/ibuf_ctrl_private.h
View File

@ -32,15 +32,15 @@
* Refer to "ibuf_ctrl_public.h" for details.
*/
STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_state(
const ibuf_ctrl_ID_t ID,
ibuf_ctrl_state_t *state)
const ibuf_ctrl_ID_t ID,
ibuf_ctrl_state_t *state)
{
u32 i;
state->recalc_words =
ibuf_ctrl_reg_load(ID, _IBUF_CNTRL_RECALC_WORDS_STATUS);
ibuf_ctrl_reg_load(ID, _IBUF_CNTRL_RECALC_WORDS_STATUS);
state->arbiters =
ibuf_ctrl_reg_load(ID, _IBUF_CNTRL_ARBITERS_STATUS);
ibuf_ctrl_reg_load(ID, _IBUF_CNTRL_ARBITERS_STATUS);
/*
* Get the values of the register-set per
@ -48,9 +48,9 @@ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_state(
*/
for (i = 0; i < N_IBUF_CTRL_PROCS[ID]; i++) {
ibuf_ctrl_get_proc_state(
ID,
i,
&state->proc_state[i]);
ID,
i,
&state->proc_state[i]);
}
}
@ -59,92 +59,92 @@ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_state(
* Refer to "ibuf_ctrl_public.h" for details.
*/
STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_proc_state(
const ibuf_ctrl_ID_t ID,
const u32 proc_id,
ibuf_ctrl_proc_state_t *state)
const ibuf_ctrl_ID_t ID,
const u32 proc_id,
ibuf_ctrl_proc_state_t *state)
{
hrt_address reg_bank_offset;
reg_bank_offset =
_IBUF_CNTRL_PROC_REG_ALIGN * (1 + proc_id);
_IBUF_CNTRL_PROC_REG_ALIGN * (1 + proc_id);
state->num_items =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_ITEMS_PER_STORE);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_ITEMS_PER_STORE);
state->num_stores =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_STORES_PER_FRAME);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_NUM_STORES_PER_FRAME);
state->dma_channel =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_CHANNEL);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_CHANNEL);
state->dma_command =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_CMD);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_CMD);
state->ibuf_st_addr =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_START_ADDRESS);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_START_ADDRESS);
state->ibuf_stride =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_STRIDE);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_STRIDE);
state->ibuf_end_addr =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_END_ADDRESS);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_BUFFER_END_ADDRESS);
state->dest_st_addr =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_START_ADDRESS);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_START_ADDRESS);
state->dest_stride =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_STRIDE);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_STRIDE);
state->dest_end_addr =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_END_ADDRESS);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DEST_END_ADDRESS);
state->sync_frame =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_SYNC_FRAME);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_SYNC_FRAME);
state->sync_command =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_STR2MMIO_SYNC_CMD);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_STR2MMIO_SYNC_CMD);
state->store_command =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_STR2MMIO_STORE_CMD);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_STR2MMIO_STORE_CMD);
state->shift_returned_items =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_SHIFT_ITEMS);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_SHIFT_ITEMS);
state->elems_ibuf =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ELEMS_P_WORD_IBUF);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ELEMS_P_WORD_IBUF);
state->elems_dest =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ELEMS_P_WORD_DEST);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ELEMS_P_WORD_DEST);
state->cur_stores =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_STORES);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_STORES);
state->cur_acks =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_ACKS);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_ACKS);
state->cur_s2m_ibuf_addr =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_S2M_IBUF_ADDR);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_S2M_IBUF_ADDR);
state->cur_dma_ibuf_addr =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_DMA_IBUF_ADDR);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_DMA_IBUF_ADDR);
state->cur_dma_dest_addr =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_DMA_DEST_ADDR);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_DMA_DEST_ADDR);
state->cur_isp_dest_addr =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_ISP_DEST_ADDR);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_ISP_DEST_ADDR);
state->dma_cmds_send =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_NR_DMA_CMDS_SEND);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_CUR_NR_DMA_CMDS_SEND);
state->main_cntrl_state =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_MAIN_CNTRL_STATE);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_MAIN_CNTRL_STATE);
state->dma_sync_state =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_SYNC_STATE);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_DMA_SYNC_STATE);
state->isp_sync_state =
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ISP_SYNC_STATE);
ibuf_ctrl_reg_load(ID, reg_bank_offset + _IBUF_CNTRL_ISP_SYNC_STATE);
}
/**
@ -152,12 +152,13 @@ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_get_proc_state(
* Refer to "ibuf_ctrl_public.h" for details.
*/
STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_dump_state(
const ibuf_ctrl_ID_t ID,
ibuf_ctrl_state_t *state)
const ibuf_ctrl_ID_t ID,
ibuf_ctrl_state_t *state)
{
u32 i;
ia_css_print("IBUF controller ID %d recalculate words 0x%x\n", ID, state->recalc_words);
ia_css_print("IBUF controller ID %d recalculate words 0x%x\n", ID,
state->recalc_words);
ia_css_print("IBUF controller ID %d arbiters 0x%x\n", ID, state->arbiters);
/*
@ -165,32 +166,64 @@ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_dump_state(
* ibuf-controller process.
*/
for (i = 0; i < N_IBUF_CTRL_PROCS[ID]; i++) {
ia_css_print("IBUF controller ID %d Process ID %d num_items 0x%x\n", ID, i, state->proc_state[i].num_items);
ia_css_print("IBUF controller ID %d Process ID %d num_stores 0x%x\n", ID, i, state->proc_state[i].num_stores);
ia_css_print("IBUF controller ID %d Process ID %d dma_channel 0x%x\n", ID, i, state->proc_state[i].dma_channel);
ia_css_print("IBUF controller ID %d Process ID %d dma_command 0x%x\n", ID, i, state->proc_state[i].dma_command);
ia_css_print("IBUF controller ID %d Process ID %d ibuf_st_addr 0x%x\n", ID, i, state->proc_state[i].ibuf_st_addr);
ia_css_print("IBUF controller ID %d Process ID %d ibuf_stride 0x%x\n", ID, i, state->proc_state[i].ibuf_stride);
ia_css_print("IBUF controller ID %d Process ID %d ibuf_end_addr 0x%x\n", ID, i, state->proc_state[i].ibuf_end_addr);
ia_css_print("IBUF controller ID %d Process ID %d dest_st_addr 0x%x\n", ID, i, state->proc_state[i].dest_st_addr);
ia_css_print("IBUF controller ID %d Process ID %d dest_stride 0x%x\n", ID, i, state->proc_state[i].dest_stride);
ia_css_print("IBUF controller ID %d Process ID %d dest_end_addr 0x%x\n", ID, i, state->proc_state[i].dest_end_addr);
ia_css_print("IBUF controller ID %d Process ID %d sync_frame 0x%x\n", ID, i, state->proc_state[i].sync_frame);
ia_css_print("IBUF controller ID %d Process ID %d sync_command 0x%x\n", ID, i, state->proc_state[i].sync_command);
ia_css_print("IBUF controller ID %d Process ID %d store_command 0x%x\n", ID, i, state->proc_state[i].store_command);
ia_css_print("IBUF controller ID %d Process ID %d shift_returned_items 0x%x\n", ID, i, state->proc_state[i].shift_returned_items);
ia_css_print("IBUF controller ID %d Process ID %d elems_ibuf 0x%x\n", ID, i, state->proc_state[i].elems_ibuf);
ia_css_print("IBUF controller ID %d Process ID %d elems_dest 0x%x\n", ID, i, state->proc_state[i].elems_dest);
ia_css_print("IBUF controller ID %d Process ID %d cur_stores 0x%x\n", ID, i, state->proc_state[i].cur_stores);
ia_css_print("IBUF controller ID %d Process ID %d cur_acks 0x%x\n", ID, i, state->proc_state[i].cur_acks);
ia_css_print("IBUF controller ID %d Process ID %d cur_s2m_ibuf_addr 0x%x\n", ID, i, state->proc_state[i].cur_s2m_ibuf_addr);
ia_css_print("IBUF controller ID %d Process ID %d cur_dma_ibuf_addr 0x%x\n", ID, i, state->proc_state[i].cur_dma_ibuf_addr);
ia_css_print("IBUF controller ID %d Process ID %d cur_dma_dest_addr 0x%x\n", ID, i, state->proc_state[i].cur_dma_dest_addr);
ia_css_print("IBUF controller ID %d Process ID %d cur_isp_dest_addr 0x%x\n", ID, i, state->proc_state[i].cur_isp_dest_addr);
ia_css_print("IBUF controller ID %d Process ID %d dma_cmds_send 0x%x\n", ID, i, state->proc_state[i].dma_cmds_send);
ia_css_print("IBUF controller ID %d Process ID %d main_cntrl_state 0x%x\n", ID, i, state->proc_state[i].main_cntrl_state);
ia_css_print("IBUF controller ID %d Process ID %d dma_sync_state 0x%x\n", ID, i, state->proc_state[i].dma_sync_state);
ia_css_print("IBUF controller ID %d Process ID %d isp_sync_state 0x%x\n", ID, i, state->proc_state[i].isp_sync_state);
ia_css_print("IBUF controller ID %d Process ID %d num_items 0x%x\n", ID, i,
state->proc_state[i].num_items);
ia_css_print("IBUF controller ID %d Process ID %d num_stores 0x%x\n", ID, i,
state->proc_state[i].num_stores);
ia_css_print("IBUF controller ID %d Process ID %d dma_channel 0x%x\n", ID, i,
state->proc_state[i].dma_channel);
ia_css_print("IBUF controller ID %d Process ID %d dma_command 0x%x\n", ID, i,
state->proc_state[i].dma_command);
ia_css_print("IBUF controller ID %d Process ID %d ibuf_st_addr 0x%x\n", ID, i,
state->proc_state[i].ibuf_st_addr);
ia_css_print("IBUF controller ID %d Process ID %d ibuf_stride 0x%x\n", ID, i,
state->proc_state[i].ibuf_stride);
ia_css_print("IBUF controller ID %d Process ID %d ibuf_end_addr 0x%x\n", ID, i,
state->proc_state[i].ibuf_end_addr);
ia_css_print("IBUF controller ID %d Process ID %d dest_st_addr 0x%x\n", ID, i,
state->proc_state[i].dest_st_addr);
ia_css_print("IBUF controller ID %d Process ID %d dest_stride 0x%x\n", ID, i,
state->proc_state[i].dest_stride);
ia_css_print("IBUF controller ID %d Process ID %d dest_end_addr 0x%x\n", ID, i,
state->proc_state[i].dest_end_addr);
ia_css_print("IBUF controller ID %d Process ID %d sync_frame 0x%x\n", ID, i,
state->proc_state[i].sync_frame);
ia_css_print("IBUF controller ID %d Process ID %d sync_command 0x%x\n", ID, i,
state->proc_state[i].sync_command);
ia_css_print("IBUF controller ID %d Process ID %d store_command 0x%x\n", ID, i,
state->proc_state[i].store_command);
ia_css_print("IBUF controller ID %d Process ID %d shift_returned_items 0x%x\n",
ID, i,
state->proc_state[i].shift_returned_items);
ia_css_print("IBUF controller ID %d Process ID %d elems_ibuf 0x%x\n", ID, i,
state->proc_state[i].elems_ibuf);
ia_css_print("IBUF controller ID %d Process ID %d elems_dest 0x%x\n", ID, i,
state->proc_state[i].elems_dest);
ia_css_print("IBUF controller ID %d Process ID %d cur_stores 0x%x\n", ID, i,
state->proc_state[i].cur_stores);
ia_css_print("IBUF controller ID %d Process ID %d cur_acks 0x%x\n", ID, i,
state->proc_state[i].cur_acks);
ia_css_print("IBUF controller ID %d Process ID %d cur_s2m_ibuf_addr 0x%x\n", ID,
i,
state->proc_state[i].cur_s2m_ibuf_addr);
ia_css_print("IBUF controller ID %d Process ID %d cur_dma_ibuf_addr 0x%x\n", ID,
i,
state->proc_state[i].cur_dma_ibuf_addr);
ia_css_print("IBUF controller ID %d Process ID %d cur_dma_dest_addr 0x%x\n", ID,
i,
state->proc_state[i].cur_dma_dest_addr);
ia_css_print("IBUF controller ID %d Process ID %d cur_isp_dest_addr 0x%x\n", ID,
i,
state->proc_state[i].cur_isp_dest_addr);
ia_css_print("IBUF controller ID %d Process ID %d dma_cmds_send 0x%x\n", ID, i,
state->proc_state[i].dma_cmds_send);
ia_css_print("IBUF controller ID %d Process ID %d main_cntrl_state 0x%x\n", ID,
i,
state->proc_state[i].main_cntrl_state);
ia_css_print("IBUF controller ID %d Process ID %d dma_sync_state 0x%x\n", ID, i,
state->proc_state[i].dma_sync_state);
ia_css_print("IBUF controller ID %d Process ID %d isp_sync_state 0x%x\n", ID, i,
state->proc_state[i].isp_sync_state);
}
}
@ -206,8 +239,8 @@ STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_dump_state(
* Refer to "ibuf_ctrl_public.h" for details.
*/
STORAGE_CLASS_IBUF_CTRL_C hrt_data ibuf_ctrl_reg_load(
const ibuf_ctrl_ID_t ID,
const hrt_address reg)
const ibuf_ctrl_ID_t ID,
const hrt_address reg)
{
assert(ID < N_IBUF_CTRL_ID);
assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1);
@ -219,9 +252,9 @@ STORAGE_CLASS_IBUF_CTRL_C hrt_data ibuf_ctrl_reg_load(
* Refer to "ibuf_ctrl_public.h" for details.
*/
STORAGE_CLASS_IBUF_CTRL_C void ibuf_ctrl_reg_store(
const ibuf_ctrl_ID_t ID,
const hrt_address reg,
const hrt_data value)
const ibuf_ctrl_ID_t ID,
const hrt_address reg,
const hrt_data value)
{
assert(ID < N_IBUF_CTRL_ID);
assert(IBUF_CTRL_BASE[ID] != (hrt_address)-1);

48
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/input_system_private.h
View File

@ -18,8 +18,8 @@
#include "input_system_public.h"
STORAGE_CLASS_INPUT_SYSTEM_C input_system_err_t input_system_get_state(
const input_system_ID_t ID,
input_system_state_t *state)
const input_system_ID_t ID,
input_system_state_t *state)
{
u32 i;
@ -28,36 +28,36 @@ STORAGE_CLASS_INPUT_SYSTEM_C input_system_err_t input_system_get_state(
/* get the states of all CSI RX frontend devices */
for (i = 0; i < N_CSI_RX_FRONTEND_ID; i++) {
csi_rx_fe_ctrl_get_state(
(csi_rx_frontend_ID_t)i,
&state->csi_rx_fe_ctrl_state[i]);
(csi_rx_frontend_ID_t)i,
&state->csi_rx_fe_ctrl_state[i]);
}
/* get the states of all CIS RX backend devices */
for (i = 0; i < N_CSI_RX_BACKEND_ID; i++) {
csi_rx_be_ctrl_get_state(
(csi_rx_backend_ID_t)i,
&state->csi_rx_be_ctrl_state[i]);
(csi_rx_backend_ID_t)i,
&state->csi_rx_be_ctrl_state[i]);
}
/* get the states of all pixelgen devices */
for (i = 0; i < N_PIXELGEN_ID; i++) {
pixelgen_ctrl_get_state(
(pixelgen_ID_t)i,
&state->pixelgen_ctrl_state[i]);
(pixelgen_ID_t)i,
&state->pixelgen_ctrl_state[i]);
}
/* get the states of all stream2mmio devices */
for (i = 0; i < N_STREAM2MMIO_ID; i++) {
stream2mmio_get_state(
(stream2mmio_ID_t)i,
&state->stream2mmio_state[i]);
(stream2mmio_ID_t)i,
&state->stream2mmio_state[i]);
}
/* get the states of all ibuf-controller devices */
for (i = 0; i < N_IBUF_CTRL_ID; i++) {
ibuf_ctrl_get_state(
(ibuf_ctrl_ID_t)i,
&state->ibuf_ctrl_state[i]);
(ibuf_ctrl_ID_t)i,
&state->ibuf_ctrl_state[i]);
}
/* get the states of all isys irq controllers */
@ -73,8 +73,8 @@ STORAGE_CLASS_INPUT_SYSTEM_C input_system_err_t input_system_get_state(
}
STORAGE_CLASS_INPUT_SYSTEM_C void input_system_dump_state(
const input_system_ID_t ID,
input_system_state_t *state)
const input_system_ID_t ID,
input_system_state_t *state)
{
u32 i;
@ -83,36 +83,36 @@ STORAGE_CLASS_INPUT_SYSTEM_C void input_system_dump_state(
/* dump the states of all CSI RX frontend devices */
for (i = 0; i < N_CSI_RX_FRONTEND_ID; i++) {
csi_rx_fe_ctrl_dump_state(
(csi_rx_frontend_ID_t)i,
&state->csi_rx_fe_ctrl_state[i]);
(csi_rx_frontend_ID_t)i,
&state->csi_rx_fe_ctrl_state[i]);
}
/* dump the states of all CIS RX backend devices */
for (i = 0; i < N_CSI_RX_BACKEND_ID; i++) {
csi_rx_be_ctrl_dump_state(
(csi_rx_backend_ID_t)i,
&state->csi_rx_be_ctrl_state[i]);
(csi_rx_backend_ID_t)i,
&state->csi_rx_be_ctrl_state[i]);
}
/* dump the states of all pixelgen devices */
for (i = 0; i < N_PIXELGEN_ID; i++) {
pixelgen_ctrl_dump_state(
(pixelgen_ID_t)i,
&state->pixelgen_ctrl_state[i]);
(pixelgen_ID_t)i,
&state->pixelgen_ctrl_state[i]);
}
/* dump the states of all st2mmio devices */
for (i = 0; i < N_STREAM2MMIO_ID; i++) {
stream2mmio_dump_state(
(stream2mmio_ID_t)i,
&state->stream2mmio_state[i]);
(stream2mmio_ID_t)i,
&state->stream2mmio_state[i]);
}
/* dump the states of all ibuf-controller devices */
for (i = 0; i < N_IBUF_CTRL_ID; i++) {
ibuf_ctrl_dump_state(
(ibuf_ctrl_ID_t)i,
&state->ibuf_ctrl_state[i]);
(ibuf_ctrl_ID_t)i,
&state->ibuf_ctrl_state[i]);
}
/* dump the states of all isys irq controllers */

8
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma.c
View File

@ -28,13 +28,13 @@ const isys2401_dma_channel N_ISYS2401_DMA_CHANNEL_PROCS[N_ISYS2401_DMA_ID] = {
};
void isys2401_dma_set_max_burst_size(
const isys2401_dma_ID_t dma_id,
uint32_t max_burst_size)
const isys2401_dma_ID_t dma_id,
uint32_t max_burst_size)
{
assert(dma_id < N_ISYS2401_DMA_ID);
assert((max_burst_size > 0x00) && (max_burst_size <= 0xFF));
isys2401_dma_reg_store(dma_id,
DMA_DEV_INFO_REG_IDX(_DMA_V2_DEV_INTERF_MAX_BURST_IDX, HIVE_DMA_BUS_DDR_CONN),
(max_burst_size - 1));
DMA_DEV_INFO_REG_IDX(_DMA_V2_DEV_INTERF_MAX_BURST_IDX, HIVE_DMA_BUS_DDR_CONN),
(max_burst_size - 1));
}

16
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_dma_private.h
View File

@ -23,9 +23,9 @@
#include "print_support.h"
STORAGE_CLASS_ISYS2401_DMA_C void isys2401_dma_reg_store(
const isys2401_dma_ID_t dma_id,
const unsigned int reg,
const hrt_data value)
const isys2401_dma_ID_t dma_id,
const unsigned int reg,
const hrt_data value)
{
unsigned int reg_loc;
@ -34,13 +34,14 @@ STORAGE_CLASS_ISYS2401_DMA_C void isys2401_dma_reg_store(
reg_loc = ISYS2401_DMA_BASE[dma_id] + (reg * sizeof(hrt_data));
ia_css_print("isys dma store at addr(0x%x) val(%u)\n", reg_loc, (unsigned int)value);
ia_css_print("isys dma store at addr(0x%x) val(%u)\n", reg_loc,
(unsigned int)value);
ia_css_device_store_uint32(reg_loc, value);
}
STORAGE_CLASS_ISYS2401_DMA_C hrt_data isys2401_dma_reg_load(
const isys2401_dma_ID_t dma_id,
const unsigned int reg)
const isys2401_dma_ID_t dma_id,
const unsigned int reg)
{
unsigned int reg_loc;
hrt_data value;
@ -51,7 +52,8 @@ STORAGE_CLASS_ISYS2401_DMA_C hrt_data isys2401_dma_reg_load(
reg_loc = ISYS2401_DMA_BASE[dma_id] + (reg * sizeof(hrt_data));
value = ia_css_device_load_uint32(reg_loc);
ia_css_print("isys dma load from addr(0x%x) val(%u)\n", reg_loc, (unsigned int)value);
ia_css_print("isys dma load from addr(0x%x) val(%u)\n", reg_loc,
(unsigned int)value);
return value;
}

14
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq.c
View File

@ -28,12 +28,16 @@
/* Public interface */
STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_status_enable(
const isys_irq_ID_t isys_irqc_id)
const isys_irq_ID_t isys_irqc_id)
{
assert(isys_irqc_id < N_ISYS_IRQ_ID);
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "Setting irq mask for port %u\n", isys_irqc_id);
isys_irqc_reg_store(isys_irqc_id, ISYS_IRQ_MASK_REG_IDX, ISYS_IRQ_MASK_REG_VALUE);
isys_irqc_reg_store(isys_irqc_id, ISYS_IRQ_CLEAR_REG_IDX, ISYS_IRQ_CLEAR_REG_VALUE);
isys_irqc_reg_store(isys_irqc_id, ISYS_IRQ_ENABLE_REG_IDX, ISYS_IRQ_ENABLE_REG_VALUE);
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "Setting irq mask for port %u\n",
isys_irqc_id);
isys_irqc_reg_store(isys_irqc_id, ISYS_IRQ_MASK_REG_IDX,
ISYS_IRQ_MASK_REG_VALUE);
isys_irqc_reg_store(isys_irqc_id, ISYS_IRQ_CLEAR_REG_IDX,
ISYS_IRQ_CLEAR_REG_VALUE);
isys_irqc_reg_store(isys_irqc_id, ISYS_IRQ_ENABLE_REG_IDX,
ISYS_IRQ_ENABLE_REG_VALUE);
}

2
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_local.h
View File

@ -27,7 +27,7 @@ struct isys_irqc_state_s {
hrt_data status;
hrt_data enable;
hrt_data level_no;
/*hrt_data clear; */ /* write-only register */
/*hrt_data clear; */ /* write-only register */
};
#endif /* defined(USE_INPUT_SYSTEM_VERSION_2401) */

28
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_irq_private.h
View File

@ -29,8 +29,8 @@
* Refer to "isys_irq.h" for details.
*/
STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_state_get(
const isys_irq_ID_t isys_irqc_id,
isys_irqc_state_t *state)
const isys_irq_ID_t isys_irqc_id,
isys_irqc_state_t *state)
{
state->edge = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_EDGE_REG_IDX);
state->mask = isys_irqc_reg_load(isys_irqc_id, ISYS_IRQ_MASK_REG_IDX);
@ -48,13 +48,13 @@ STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_state_get(
* Refer to "isys_irq.h" for details.
*/
STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_state_dump(
const isys_irq_ID_t isys_irqc_id,
const isys_irqc_state_t *state)
const isys_irq_ID_t isys_irqc_id,
const isys_irqc_state_t *state)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
"isys irq controller id %d\n\tstatus:0x%x\n\tedge:0x%x\n\tmask:0x%x\n\tenable:0x%x\n\tlevel_not_pulse:0x%x\n",
isys_irqc_id,
state->status, state->edge, state->mask, state->enable, state->level_no);
"isys irq controller id %d\n\tstatus:0x%x\n\tedge:0x%x\n\tmask:0x%x\n\tenable:0x%x\n\tlevel_not_pulse:0x%x\n",
isys_irqc_id,
state->status, state->edge, state->mask, state->enable, state->level_no);
}
/* end of NCI */
@ -65,9 +65,9 @@ STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_state_dump(
/* Support functions */
STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_reg_store(
const isys_irq_ID_t isys_irqc_id,
const unsigned int reg_idx,
const hrt_data value)
const isys_irq_ID_t isys_irqc_id,
const unsigned int reg_idx,
const hrt_data value)
{
unsigned int reg_addr;
@ -76,14 +76,14 @@ STORAGE_CLASS_ISYS2401_IRQ_C void isys_irqc_reg_store(
reg_addr = ISYS_IRQ_BASE[isys_irqc_id] + (reg_idx * sizeof(hrt_data));
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
"isys irq store at addr(0x%x) val(%u)\n", reg_addr, (unsigned int)value);
"isys irq store at addr(0x%x) val(%u)\n", reg_addr, (unsigned int)value);
ia_css_device_store_uint32(reg_addr, value);
}
STORAGE_CLASS_ISYS2401_IRQ_C hrt_data isys_irqc_reg_load(
const isys_irq_ID_t isys_irqc_id,
const unsigned int reg_idx)
const isys_irq_ID_t isys_irqc_id,
const unsigned int reg_idx)
{
unsigned int reg_addr;
hrt_data value;
@ -94,7 +94,7 @@ STORAGE_CLASS_ISYS2401_IRQ_C hrt_data isys_irqc_reg_load(
reg_addr = ISYS_IRQ_BASE[isys_irqc_id] + (reg_idx * sizeof(hrt_data));
value = ia_css_device_load_uint32(reg_addr);
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
"isys irq load from addr(0x%x) val(%u)\n", reg_addr, (unsigned int)value);
"isys irq load from addr(0x%x) val(%u)\n", reg_addr, (unsigned int)value);
return value;
}

46
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/isys_stream2mmio_private.h
View File

@ -40,8 +40,8 @@
* Refer to "stream2mmio_public.h" for details.
*/
STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_get_state(
const stream2mmio_ID_t ID,
stream2mmio_state_t *state)
const stream2mmio_ID_t ID,
stream2mmio_state_t *state)
{
stream2mmio_sid_ID_t i;
@ -59,30 +59,30 @@ STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_get_state(
* Refer to "stream2mmio_public.h" for details.
*/
STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_get_sid_state(
const stream2mmio_ID_t ID,
const stream2mmio_sid_ID_t sid_id,
stream2mmio_sid_state_t *state)
const stream2mmio_ID_t ID,
const stream2mmio_sid_ID_t sid_id,
stream2mmio_sid_state_t *state)
{
state->rcv_ack =
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_ACKNOWLEDGE_REG_ID);
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_ACKNOWLEDGE_REG_ID);
state->pix_width_id =
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_PIX_WIDTH_ID_REG_ID);
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_PIX_WIDTH_ID_REG_ID);
state->start_addr =
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_START_ADDR_REG_ID);
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_START_ADDR_REG_ID);
state->end_addr =
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_END_ADDR_REG_ID);
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_END_ADDR_REG_ID);
state->strides =
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_STRIDE_REG_ID);
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_STRIDE_REG_ID);
state->num_items =
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_NUM_ITEMS_REG_ID);
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_NUM_ITEMS_REG_ID);
state->block_when_no_cmd =
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_BLOCK_WHEN_NO_CMD_REG_ID);
stream2mmio_reg_load(ID, sid_id, STREAM2MMIO_BLOCK_WHEN_NO_CMD_REG_ID);
}
/**
@ -90,7 +90,7 @@ STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_get_sid_state(
* Refer to "stream2mmio_public.h" for details.
*/
STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_print_sid_state(
stream2mmio_sid_state_t *state)
stream2mmio_sid_state_t *state)
{
ia_css_print("\t \t Receive acks 0x%x\n", state->rcv_ack);
ia_css_print("\t \t Pixel width 0x%x\n", state->pix_width_id);
@ -106,8 +106,8 @@ STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_print_sid_state(
* Refer to "stream2mmio_public.h" for details.
*/
STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_dump_state(
const stream2mmio_ID_t ID,
stream2mmio_state_t *state)
const stream2mmio_ID_t ID,
stream2mmio_state_t *state)
{
stream2mmio_sid_ID_t i;
@ -133,9 +133,9 @@ STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_dump_state(
* Refer to "stream2mmio_public.h" for details.
*/
STORAGE_CLASS_STREAM2MMIO_C hrt_data stream2mmio_reg_load(
const stream2mmio_ID_t ID,
const stream2mmio_sid_ID_t sid_id,
const uint32_t reg_idx)
const stream2mmio_ID_t ID,
const stream2mmio_sid_ID_t sid_id,
const uint32_t reg_idx)
{
u32 reg_bank_offset;
@ -143,7 +143,7 @@ STORAGE_CLASS_STREAM2MMIO_C hrt_data stream2mmio_reg_load(
reg_bank_offset = STREAM2MMIO_REGS_PER_SID * sid_id;
return ia_css_device_load_uint32(STREAM2MMIO_CTRL_BASE[ID] +
(reg_bank_offset + reg_idx) * sizeof(hrt_data));
(reg_bank_offset + reg_idx) * sizeof(hrt_data));
}
/**
@ -151,15 +151,15 @@ STORAGE_CLASS_STREAM2MMIO_C hrt_data stream2mmio_reg_load(
* Refer to "stream2mmio_public.h" for details.
*/
STORAGE_CLASS_STREAM2MMIO_C void stream2mmio_reg_store(
const stream2mmio_ID_t ID,
const hrt_address reg,
const hrt_data value)
const stream2mmio_ID_t ID,
const hrt_address reg,
const hrt_data value)
{
assert(ID < N_STREAM2MMIO_ID);
assert(STREAM2MMIO_CTRL_BASE[ID] != (hrt_address)-1);
ia_css_device_store_uint32(STREAM2MMIO_CTRL_BASE[ID] +
reg * sizeof(hrt_data), value);
reg * sizeof(hrt_data), value);
}
/* end of DLI */

129
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/pixelgen_private.h
View File

@ -30,63 +30,63 @@
* Refer to "pixelgen_public.h" for details.
*/
STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_get_state(
const pixelgen_ID_t ID,
pixelgen_ctrl_state_t *state)
const pixelgen_ID_t ID,
pixelgen_ctrl_state_t *state)
{
state->com_enable =
pixelgen_ctrl_reg_load(ID, _PXG_COM_ENABLE_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_COM_ENABLE_REG_IDX);
state->prbs_rstval0 =
pixelgen_ctrl_reg_load(ID, _PXG_PRBS_RSTVAL_REG0_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_PRBS_RSTVAL_REG0_IDX);
state->prbs_rstval1 =
pixelgen_ctrl_reg_load(ID, _PXG_PRBS_RSTVAL_REG1_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_PRBS_RSTVAL_REG1_IDX);
state->syng_sid =
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_SID_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_SID_REG_IDX);
state->syng_free_run =
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_FREE_RUN_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_FREE_RUN_REG_IDX);
state->syng_pause =
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_PAUSE_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_PAUSE_REG_IDX);
state->syng_nof_frames =
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_FRAME_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_FRAME_REG_IDX);
state->syng_nof_pixels =
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_PIXEL_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_PIXEL_REG_IDX);
state->syng_nof_line =
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_LINE_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_NOF_LINE_REG_IDX);
state->syng_hblank_cyc =
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_HBLANK_CYC_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_HBLANK_CYC_REG_IDX);
state->syng_vblank_cyc =
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_VBLANK_CYC_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_VBLANK_CYC_REG_IDX);
state->syng_stat_hcnt =
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_HCNT_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_HCNT_REG_IDX);
state->syng_stat_vcnt =
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_VCNT_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_VCNT_REG_IDX);
state->syng_stat_fcnt =
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_FCNT_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_FCNT_REG_IDX);
state->syng_stat_done =
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_DONE_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_SYNG_STAT_DONE_REG_IDX);
state->tpg_mode =
pixelgen_ctrl_reg_load(ID, _PXG_TPG_MODE_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_TPG_MODE_REG_IDX);
state->tpg_hcnt_mask =
pixelgen_ctrl_reg_load(ID, _PXG_TPG_HCNT_MASK_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_TPG_HCNT_MASK_REG_IDX);
state->tpg_vcnt_mask =
pixelgen_ctrl_reg_load(ID, _PXG_TPG_VCNT_MASK_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_TPG_VCNT_MASK_REG_IDX);
state->tpg_xycnt_mask =
pixelgen_ctrl_reg_load(ID, _PXG_TPG_XYCNT_MASK_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_TPG_XYCNT_MASK_REG_IDX);
state->tpg_hcnt_delta =
pixelgen_ctrl_reg_load(ID, _PXG_TPG_HCNT_DELTA_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_TPG_HCNT_DELTA_REG_IDX);
state->tpg_vcnt_delta =
pixelgen_ctrl_reg_load(ID, _PXG_TPG_VCNT_DELTA_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_TPG_VCNT_DELTA_REG_IDX);
state->tpg_r1 =
pixelgen_ctrl_reg_load(ID, _PXG_TPG_R1_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_TPG_R1_REG_IDX);
state->tpg_g1 =
pixelgen_ctrl_reg_load(ID, _PXG_TPG_G1_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_TPG_G1_REG_IDX);
state->tpg_b1 =
pixelgen_ctrl_reg_load(ID, _PXG_TPG_B1_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_TPG_B1_REG_IDX);
state->tpg_r2 =
pixelgen_ctrl_reg_load(ID, _PXG_TPG_R2_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_TPG_R2_REG_IDX);
state->tpg_g2 =
pixelgen_ctrl_reg_load(ID, _PXG_TPG_G2_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_TPG_G2_REG_IDX);
state->tpg_b2 =
pixelgen_ctrl_reg_load(ID, _PXG_TPG_B2_REG_IDX);
pixelgen_ctrl_reg_load(ID, _PXG_TPG_B2_REG_IDX);
}
/**
@ -94,30 +94,47 @@ STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_get_state(
* Refer to "pixelgen_public.h" for details.
*/
STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_dump_state(
const pixelgen_ID_t ID,
pixelgen_ctrl_state_t *state)
const pixelgen_ID_t ID,
pixelgen_ctrl_state_t *state)
{
ia_css_print("Pixel Generator ID %d Enable 0x%x\n", ID, state->com_enable);
ia_css_print("Pixel Generator ID %d PRBS reset vlue 0 0x%x\n", ID, state->prbs_rstval0);
ia_css_print("Pixel Generator ID %d PRBS reset vlue 1 0x%x\n", ID, state->prbs_rstval1);
ia_css_print("Pixel Generator ID %d PRBS reset vlue 0 0x%x\n", ID,
state->prbs_rstval0);
ia_css_print("Pixel Generator ID %d PRBS reset vlue 1 0x%x\n", ID,
state->prbs_rstval1);
ia_css_print("Pixel Generator ID %d SYNC SID 0x%x\n", ID, state->syng_sid);
ia_css_print("Pixel Generator ID %d syng free run 0x%x\n", ID, state->syng_free_run);
ia_css_print("Pixel Generator ID %d syng free run 0x%x\n", ID,
state->syng_free_run);
ia_css_print("Pixel Generator ID %d syng pause 0x%x\n", ID, state->syng_pause);
ia_css_print("Pixel Generator ID %d syng no of frames 0x%x\n", ID, state->syng_nof_frames);
ia_css_print("Pixel Generator ID %d syng no of pixels 0x%x\n", ID, state->syng_nof_pixels);
ia_css_print("Pixel Generator ID %d syng no of line 0x%x\n", ID, state->syng_nof_line);
ia_css_print("Pixel Generator ID %d syng hblank cyc 0x%x\n", ID, state->syng_hblank_cyc);
ia_css_print("Pixel Generator ID %d syng vblank cyc 0x%x\n", ID, state->syng_vblank_cyc);
ia_css_print("Pixel Generator ID %d syng stat hcnt 0x%x\n", ID, state->syng_stat_hcnt);
ia_css_print("Pixel Generator ID %d syng stat vcnt 0x%x\n", ID, state->syng_stat_vcnt);
ia_css_print("Pixel Generator ID %d syng stat fcnt 0x%x\n", ID, state->syng_stat_fcnt);
ia_css_print("Pixel Generator ID %d syng stat done 0x%x\n", ID, state->syng_stat_done);
ia_css_print("Pixel Generator ID %d syng no of frames 0x%x\n", ID,
state->syng_nof_frames);
ia_css_print("Pixel Generator ID %d syng no of pixels 0x%x\n", ID,
state->syng_nof_pixels);
ia_css_print("Pixel Generator ID %d syng no of line 0x%x\n", ID,
state->syng_nof_line);
ia_css_print("Pixel Generator ID %d syng hblank cyc 0x%x\n", ID,
state->syng_hblank_cyc);
ia_css_print("Pixel Generator ID %d syng vblank cyc 0x%x\n", ID,
state->syng_vblank_cyc);
ia_css_print("Pixel Generator ID %d syng stat hcnt 0x%x\n", ID,
state->syng_stat_hcnt);
ia_css_print("Pixel Generator ID %d syng stat vcnt 0x%x\n", ID,
state->syng_stat_vcnt);
ia_css_print("Pixel Generator ID %d syng stat fcnt 0x%x\n", ID,
state->syng_stat_fcnt);
ia_css_print("Pixel Generator ID %d syng stat done 0x%x\n", ID,
state->syng_stat_done);
ia_css_print("Pixel Generator ID %d tpg modee 0x%x\n", ID, state->tpg_mode);
ia_css_print("Pixel Generator ID %d tpg hcnt mask 0x%x\n", ID, state->tpg_hcnt_mask);
ia_css_print("Pixel Generator ID %d tpg hcnt mask 0x%x\n", ID, state->tpg_hcnt_mask);
ia_css_print("Pixel Generator ID %d tpg xycnt mask 0x%x\n", ID, state->tpg_xycnt_mask);
ia_css_print("Pixel Generator ID %d tpg hcnt delta 0x%x\n", ID, state->tpg_hcnt_delta);
ia_css_print("Pixel Generator ID %d tpg vcnt delta 0x%x\n", ID, state->tpg_vcnt_delta);
ia_css_print("Pixel Generator ID %d tpg hcnt mask 0x%x\n", ID,
state->tpg_hcnt_mask);
ia_css_print("Pixel Generator ID %d tpg hcnt mask 0x%x\n", ID,
state->tpg_hcnt_mask);
ia_css_print("Pixel Generator ID %d tpg xycnt mask 0x%x\n", ID,
state->tpg_xycnt_mask);
ia_css_print("Pixel Generator ID %d tpg hcnt delta 0x%x\n", ID,
state->tpg_hcnt_delta);
ia_css_print("Pixel Generator ID %d tpg vcnt delta 0x%x\n", ID,
state->tpg_vcnt_delta);
ia_css_print("Pixel Generator ID %d tpg r1 0x%x\n", ID, state->tpg_r1);
ia_css_print("Pixel Generator ID %d tpg g1 0x%x\n", ID, state->tpg_g1);
ia_css_print("Pixel Generator ID %d tpg b1 0x%x\n", ID, state->tpg_b1);
@ -137,12 +154,13 @@ STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_dump_state(
* Refer to "pixelgen_public.h" for details.
*/
STORAGE_CLASS_PIXELGEN_C hrt_data pixelgen_ctrl_reg_load(
const pixelgen_ID_t ID,
const hrt_address reg)
const pixelgen_ID_t ID,
const hrt_address reg)
{
assert(ID < N_PIXELGEN_ID);
assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address) - 1);
return ia_css_device_load_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof(hrt_data));
return ia_css_device_load_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof(
hrt_data));
}
/**
@ -150,14 +168,15 @@ STORAGE_CLASS_PIXELGEN_C hrt_data pixelgen_ctrl_reg_load(
* Refer to "pixelgen_ctrl_public.h" for details.
*/
STORAGE_CLASS_PIXELGEN_C void pixelgen_ctrl_reg_store(
const pixelgen_ID_t ID,
const hrt_address reg,
const hrt_data value)
const pixelgen_ID_t ID,
const hrt_address reg,
const hrt_data value)
{
assert(ID < N_PIXELGEN_ID);
assert(PIXELGEN_CTRL_BASE[ID] != (hrt_address)-1);
ia_css_device_store_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof(hrt_data), value);
ia_css_device_store_uint32(PIXELGEN_CTRL_BASE[ID] + reg * sizeof(hrt_data),
value);
}
/* end of DLI */

124
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/host/system_local.h
View File

@ -43,32 +43,40 @@
/* DDR */
static const hrt_address DDR_BASE[N_DDR_ID] = {
0x0000000120000000ULL};
0x0000000120000000ULL
};
/* ISP */
static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = {
0x0000000000020000ULL};
0x0000000000020000ULL
};
static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = {
0x0000000000200000ULL};
0x0000000000200000ULL
};
static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = {
0x0000000000100000ULL};
0x0000000000100000ULL
};
static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = {
0x00000000001C0000ULL,
0x00000000001D0000ULL,
0x00000000001E0000ULL};
0x00000000001E0000ULL
};
static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = {
0x00000000001F0000ULL};
0x00000000001F0000ULL
};
/* SP */
static const hrt_address SP_CTRL_BASE[N_SP_ID] = {
0x0000000000010000ULL};
0x0000000000010000ULL
};
static const hrt_address SP_DMEM_BASE[N_SP_ID] = {
0x0000000000300000ULL};
0x0000000000300000ULL
};
/* MMU */
#if defined(IS_ISP_2400_MAMOIADA_SYSTEM) || defined(IS_ISP_2401_MAMOIADA_SYSTEM)
@ -78,24 +86,28 @@ static const hrt_address SP_DMEM_BASE[N_SP_ID] = {
*/
static const hrt_address MMU_BASE[N_MMU_ID] = {
0x0000000000070000ULL,
0x00000000000A0000ULL};
0x00000000000A0000ULL
};
#else
#error "system_local.h: SYSTEM must be one of {2400, 2401 }"
#endif
/* DMA */
static const hrt_address DMA_BASE[N_DMA_ID] = {
0x0000000000040000ULL};
0x0000000000040000ULL
};
static const hrt_address ISYS2401_DMA_BASE[N_ISYS2401_DMA_ID] = {
0x00000000000CA000ULL};
0x00000000000CA000ULL
};
/* IRQ */
static const hrt_address IRQ_BASE[N_IRQ_ID] = {
0x0000000000000500ULL,
0x0000000000030A00ULL,
0x000000000008C000ULL,
0x0000000000090200ULL};
0x0000000000090200ULL
};
/*
0x0000000000000500ULL};
*/
@ -103,11 +115,13 @@ static const hrt_address IRQ_BASE[N_IRQ_ID] = {
/* GDC */
static const hrt_address GDC_BASE[N_GDC_ID] = {
0x0000000000050000ULL,
0x0000000000060000ULL};
0x0000000000060000ULL
};
/* FIFO_MONITOR (not a subset of GP_DEVICE) */
static const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = {
0x0000000000000000ULL};
0x0000000000000000ULL
};
/*
static const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = {
@ -119,32 +133,37 @@ static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = {
/* GP_DEVICE (single base for all separate GP_REG instances) */
static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = {
0x0000000000000000ULL};
0x0000000000000000ULL
};
/*GP TIMER , all timer registers are inter-twined,
* so, having multiple base addresses for
* different timers does not help*/
static const hrt_address GP_TIMER_BASE =
(hrt_address)0x0000000000000600ULL;
(hrt_address)0x0000000000000600ULL;
/* GPIO */
static const hrt_address GPIO_BASE[N_GPIO_ID] = {
0x0000000000000400ULL};
0x0000000000000400ULL
};
/* TIMED_CTRL */
static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = {
0x0000000000000100ULL};
0x0000000000000100ULL
};
/* INPUT_FORMATTER */
static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = {
0x0000000000030000ULL,
0x0000000000030200ULL,
0x0000000000030400ULL,
0x0000000000030600ULL}; /* memcpy() */
0x0000000000030600ULL
}; /* memcpy() */
/* INPUT_SYSTEM */
static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = {
0x0000000000080000ULL};
0x0000000000080000ULL
};
/* 0x0000000000081000ULL, */ /* capture A */
/* 0x0000000000082000ULL, */ /* capture B */
/* 0x0000000000083000ULL, */ /* capture C */
@ -157,7 +176,8 @@ static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = {
/* RX, the MIPI lane control regs start at offset 0 */
static const hrt_address RX_BASE[N_RX_ID] = {
0x0000000000080100ULL};
0x0000000000080100ULL
};
/* IBUF_CTRL, part of the Input System 2401 */
static const hrt_address IBUF_CTRL_BASE[N_IBUF_CTRL_ID] = {
@ -206,32 +226,40 @@ static const hrt_address STREAM2MMIO_CTRL_BASE[N_STREAM2MMIO_ID] = {
/* DDR : Attention, this value not defined in 32-bit */
static const hrt_address DDR_BASE[N_DDR_ID] = {
0x00000000UL};
0x00000000UL
};
/* ISP */
static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = {
0x00020000UL};
0x00020000UL
};
static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = {
0xffffffffUL};
0xffffffffUL
};
static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = {
0xffffffffUL};
0xffffffffUL
};
static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = {
0xffffffffUL,
0xffffffffUL,
0xffffffffUL};
0xffffffffUL
};
static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = {
0xffffffffUL};
0xffffffffUL
};
/* SP */
static const hrt_address SP_CTRL_BASE[N_SP_ID] = {
0x00010000UL};
0x00010000UL
};
static const hrt_address SP_DMEM_BASE[N_SP_ID] = {
0x00300000UL};
0x00300000UL
};
/* MMU */
#if defined(IS_ISP_2400_MAMOIADA_SYSTEM) || defined(IS_ISP_2401_MAMOIADA_SYSTEM)
@ -241,24 +269,28 @@ static const hrt_address SP_DMEM_BASE[N_SP_ID] = {
*/
static const hrt_address MMU_BASE[N_MMU_ID] = {
0x00070000UL,
0x000A0000UL};
0x000A0000UL
};
#else
#error "system_local.h: SYSTEM must be one of {2400, 2401 }"
#endif
/* DMA */
static const hrt_address DMA_BASE[N_DMA_ID] = {
0x00040000UL};
0x00040000UL
};
static const hrt_address ISYS2401_DMA_BASE[N_ISYS2401_DMA_ID] = {
0x000CA000UL};
0x000CA000UL
};
/* IRQ */
static const hrt_address IRQ_BASE[N_IRQ_ID] = {
0x00000500UL,
0x00030A00UL,
0x0008C000UL,
0x00090200UL};
0x00090200UL
};
/*
0x00000500UL};
*/
@ -266,11 +298,13 @@ static const hrt_address IRQ_BASE[N_IRQ_ID] = {
/* GDC */
static const hrt_address GDC_BASE[N_GDC_ID] = {
0x00050000UL,
0x00060000UL};
0x00060000UL
};
/* FIFO_MONITOR (not a subset of GP_DEVICE) */
static const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = {
0x00000000UL};
0x00000000UL
};
/*
static const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = {
@ -282,31 +316,36 @@ static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = {
/* GP_DEVICE (single base for all separate GP_REG instances) */
static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = {
0x00000000UL};
0x00000000UL
};
/*GP TIMER , all timer registers are inter-twined,
* so, having multiple base addresses for
* different timers does not help*/
static const hrt_address GP_TIMER_BASE =
(hrt_address)0x00000600UL;
(hrt_address)0x00000600UL;
/* GPIO */
static const hrt_address GPIO_BASE[N_GPIO_ID] = {
0x00000400UL};
0x00000400UL
};
/* TIMED_CTRL */
static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = {
0x00000100UL};
0x00000100UL
};
/* INPUT_FORMATTER */
static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = {
0x00030000UL,
0x00030200UL,
0x00030400UL};
0x00030400UL
};
/* 0x00030600UL, */ /* memcpy() */
/* INPUT_SYSTEM */
static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = {
0x00080000UL};
0x00080000UL
};
/* 0x00081000UL, */ /* capture A */
/* 0x00082000UL, */ /* capture B */
/* 0x00083000UL, */ /* capture C */
@ -319,7 +358,8 @@ static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = {
/* RX, the MIPI lane control regs start at offset 0 */
static const hrt_address RX_BASE[N_RX_ID] = {
0x00080100UL};
0x00080100UL
};
/* IBUF_CTRL, part of the Input System 2401 */
static const hrt_address IBUF_CTRL_BASE[N_IBUF_CTRL_ID] = {

2
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/dma_v2_defs.h
View File

@ -122,7 +122,7 @@
#define _DMA_V2_ZERO_EXTEND 0
#define _DMA_V2_SIGN_EXTEND 1
/* SLAVE address map */
/* SLAVE address map */
#define _DMA_V2_SEL_FSM_CMD 0
#define _DMA_V2_SEL_CH_REG 1
#define _DMA_V2_SEL_CONN_GROUP 2

50
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gdc_v2_defs.h
View File

@ -25,43 +25,43 @@
#define HRT_GDC_BCI_COEF_BITS 14 /* 14 bits per coefficient */
#define HRT_GDC_BCI_COEF_ONE (1 << (HRT_GDC_BCI_COEF_BITS - 2)) /* We represent signed 10 bit coefficients. */
/* The supported range is [-256, .., +256] */
/* in 14-bit signed notation, */
/* We need all ten bits (MSB must be zero). */
/* -s is inserted to solve this issue, and */
/* therefore "1" is equal to +256. */
/* The supported range is [-256, .., +256] */
/* in 14-bit signed notation, */
/* We need all ten bits (MSB must be zero). */
/* -s is inserted to solve this issue, and */
/* therefore "1" is equal to +256. */
#define HRT_GDC_BCI_COEF_MASK ((1 << HRT_GDC_BCI_COEF_BITS) - 1)
#define HRT_GDC_LUT_BYTES (HRT_GDC_N * 4 * 2) /* 1024 addresses, 4 coefficients per address, */
/* 2 bytes per coefficient */
/* 2 bytes per coefficient */
#define _HRT_GDC_REG_ALIGN 4
// 31 30 29 25 24 0
// |-----|---|--------|------------------------|
// | CMD | C | Reg_ID | Value |
// 31 30 29 25 24 0
// |-----|---|--------|------------------------|
// | CMD | C | Reg_ID | Value |
// There are just two commands possible for the GDC block:
// 1 - Configure reg
// 0 - Data token
// There are just two commands possible for the GDC block:
// 1 - Configure reg
// 0 - Data token
// C - Reserved bit
// Used in protocol to indicate whether it is C-run or other type of runs
// In case of C-run, this bit has a value of 1, for all the other runs, it is 0.
// C - Reserved bit
// Used in protocol to indicate whether it is C-run or other type of runs
// In case of C-run, this bit has a value of 1, for all the other runs, it is 0.
// Reg_ID - Address of the register to be configured
// Reg_ID - Address of the register to be configured
// Value - Value to store to the addressed register, maximum of 24 bits
// Value - Value to store to the addressed register, maximum of 24 bits
// Configure reg command is not followed by any other token.
// The address of the register and the data to be filled in is contained in the same token
// Configure reg command is not followed by any other token.
// The address of the register and the data to be filled in is contained in the same token
// When the first data token is received, it must be:
// 1. FRX and FRY (device configured in one of the scaling modes) ***DEFAULT MODE***, or,
// 2. P0'X (device configured in one of the tetragon modes)
// After the first data token is received, pre-defined number of tokens with the following meaning follow:
// 1. two tokens: SRC address ; DST address
// 2. nine tokens: P0'Y, .., P3'Y ; SRC address ; DST address
// When the first data token is received, it must be:
// 1. FRX and FRY (device configured in one of the scaling modes) ***DEFAULT MODE***, or,
// 2. P0'X (device configured in one of the tetragon modes)
// After the first data token is received, pre-defined number of tokens with the following meaning follow:
// 1. two tokens: SRC address ; DST address
// 2. nine tokens: P0'Y, .., P3'Y ; SRC address ; DST address
#define HRT_GDC_CONFIG_CMD 1
#define HRT_GDC_DATA_CMD 0

8
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/gpio_block_defs.h
View File

@ -18,10 +18,10 @@
#define _HRT_GPIO_BLOCK_REG_ALIGN 4
/* R/W registers */
#define _gpio_block_reg_do_e 0
#define _gpio_block_reg_do_e 0
#define _gpio_block_reg_do_select 1
#define _gpio_block_reg_do_0 2
#define _gpio_block_reg_do_1 3
#define _gpio_block_reg_do_0 2
#define _gpio_block_reg_do_1 3
#define _gpio_block_reg_do_pwm_cnt_0 4
#define _gpio_block_reg_do_pwm_cnt_1 5
#define _gpio_block_reg_do_pwm_cnt_2 6
@ -36,6 +36,6 @@
#define _gpio_block_reg_di_active_level 15
/* read-only registers */
#define _gpio_block_reg_di 16
#define _gpio_block_reg_di 16
#endif /* _gpio_block_defs_h_ */

74
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/hive_isp_css_2401_irq_types_hrt.h
View File

@ -23,46 +23,46 @@
* The definitions are taken from <system>_defs.h
*/
typedef enum hrt_isp_css_irq {
hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID,
hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID,
hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID,
hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID,
hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID,
hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID,
hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID,
hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID,
hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID,
hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID,
hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID,
hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID,
hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID,
hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID,
hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID,
hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID,
hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID,
hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID,
hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID,
hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID,
hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID,
hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID,
hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID,
hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID,
hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID,
hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID,
hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID,
hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID,
hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID,
hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID,
hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID,
hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID,
/* this must (obviously) be the last on in the enum */
hrt_isp_css_irq_num_irqs
hrt_isp_css_irq_gpio_pin_0 = HIVE_GP_DEV_IRQ_GPIO_PIN_0_BIT_ID,
hrt_isp_css_irq_gpio_pin_1 = HIVE_GP_DEV_IRQ_GPIO_PIN_1_BIT_ID,
hrt_isp_css_irq_gpio_pin_2 = HIVE_GP_DEV_IRQ_GPIO_PIN_2_BIT_ID,
hrt_isp_css_irq_gpio_pin_3 = HIVE_GP_DEV_IRQ_GPIO_PIN_3_BIT_ID,
hrt_isp_css_irq_gpio_pin_4 = HIVE_GP_DEV_IRQ_GPIO_PIN_4_BIT_ID,
hrt_isp_css_irq_gpio_pin_5 = HIVE_GP_DEV_IRQ_GPIO_PIN_5_BIT_ID,
hrt_isp_css_irq_gpio_pin_6 = HIVE_GP_DEV_IRQ_GPIO_PIN_6_BIT_ID,
hrt_isp_css_irq_gpio_pin_7 = HIVE_GP_DEV_IRQ_GPIO_PIN_7_BIT_ID,
hrt_isp_css_irq_gpio_pin_8 = HIVE_GP_DEV_IRQ_GPIO_PIN_8_BIT_ID,
hrt_isp_css_irq_gpio_pin_9 = HIVE_GP_DEV_IRQ_GPIO_PIN_9_BIT_ID,
hrt_isp_css_irq_gpio_pin_10 = HIVE_GP_DEV_IRQ_GPIO_PIN_10_BIT_ID,
hrt_isp_css_irq_gpio_pin_11 = HIVE_GP_DEV_IRQ_GPIO_PIN_11_BIT_ID,
hrt_isp_css_irq_sp = HIVE_GP_DEV_IRQ_SP_BIT_ID,
hrt_isp_css_irq_isp = HIVE_GP_DEV_IRQ_ISP_BIT_ID,
hrt_isp_css_irq_isys = HIVE_GP_DEV_IRQ_ISYS_BIT_ID,
hrt_isp_css_irq_isel = HIVE_GP_DEV_IRQ_ISEL_BIT_ID,
hrt_isp_css_irq_ifmt = HIVE_GP_DEV_IRQ_IFMT_BIT_ID,
hrt_isp_css_irq_sp_stream_mon = HIVE_GP_DEV_IRQ_SP_STREAM_MON_BIT_ID,
hrt_isp_css_irq_isp_stream_mon = HIVE_GP_DEV_IRQ_ISP_STREAM_MON_BIT_ID,
hrt_isp_css_irq_mod_stream_mon = HIVE_GP_DEV_IRQ_MOD_STREAM_MON_BIT_ID,
hrt_isp_css_irq_is2401 = HIVE_GP_DEV_IRQ_IS2401_BIT_ID,
hrt_isp_css_irq_isp_bamem_error = HIVE_GP_DEV_IRQ_ISP_BAMEM_ERROR_BIT_ID,
hrt_isp_css_irq_isp_dmem_error = HIVE_GP_DEV_IRQ_ISP_DMEM_ERROR_BIT_ID,
hrt_isp_css_irq_sp_icache_mem_error = HIVE_GP_DEV_IRQ_SP_ICACHE_MEM_ERROR_BIT_ID,
hrt_isp_css_irq_sp_dmem_error = HIVE_GP_DEV_IRQ_SP_DMEM_ERROR_BIT_ID,
hrt_isp_css_irq_mmu_cache_mem_error = HIVE_GP_DEV_IRQ_MMU_CACHE_MEM_ERROR_BIT_ID,
hrt_isp_css_irq_gp_timer_0 = HIVE_GP_DEV_IRQ_GP_TIMER_0_BIT_ID,
hrt_isp_css_irq_gp_timer_1 = HIVE_GP_DEV_IRQ_GP_TIMER_1_BIT_ID,
hrt_isp_css_irq_sw_pin_0 = HIVE_GP_DEV_IRQ_SW_PIN_0_BIT_ID,
hrt_isp_css_irq_sw_pin_1 = HIVE_GP_DEV_IRQ_SW_PIN_1_BIT_ID,
hrt_isp_css_irq_dma = HIVE_GP_DEV_IRQ_DMA_BIT_ID,
hrt_isp_css_irq_sp_stream_mon_b = HIVE_GP_DEV_IRQ_SP_STREAM_MON_B_BIT_ID,
/* this must (obviously) be the last on in the enum */
hrt_isp_css_irq_num_irqs
} hrt_isp_css_irq_t;
typedef enum hrt_isp_css_irq_status {
hrt_isp_css_irq_status_error,
hrt_isp_css_irq_status_more_irqs,
hrt_isp_css_irq_status_success
hrt_isp_css_irq_status_error,
hrt_isp_css_irq_status_more_irqs,
hrt_isp_css_irq_status_success
} hrt_isp_css_irq_status_t;
#endif /* _HIVE_ISP_CSS_2401_IRQ_TYPES_HRT_H_ */

44
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/ibuf_cntrl_defs.h
View File

@ -19,20 +19,20 @@
#include <dma_v2_defs.h>
#define _IBUF_CNTRL_REG_ALIGN 4
/* alignment of register banks, first bank are shared configuration and status registers: */
/* alignment of register banks, first bank are shared configuration and status registers: */
#define _IBUF_CNTRL_PROC_REG_ALIGN 32
/* the actual amount of configuration registers per proc: */
/* the actual amount of configuration registers per proc: */
#define _IBUF_CNTRL_CONFIG_REGS_PER_PROC 18
/* the actual amount of shared configuration registers: */
/* the actual amount of shared configuration registers: */
#define _IBUF_CNTRL_CONFIG_REGS_NO_PROC 0
/* the actual amount of status registers per proc */
/* the actual amount of status registers per proc */
#define _IBUF_CNTRL_STATUS_REGS_PER_PROC (_IBUF_CNTRL_CONFIG_REGS_PER_PROC + 10)
/* the actual amount shared status registers */
/* the actual amount shared status registers */
#define _IBUF_CNTRL_STATUS_REGS_NO_PROC (_IBUF_CNTRL_CONFIG_REGS_NO_PROC + 2)
/* time out bits, maximum time out value is 2^_IBUF_CNTRL_TIME_OUT_BITS - 1 */
/* time out bits, maximum time out value is 2^_IBUF_CNTRL_TIME_OUT_BITS - 1 */
#define _IBUF_CNTRL_TIME_OUT_BITS 5
/* command token definition */
@ -53,7 +53,7 @@
#define _IBUF_CNTRL_ACK_TOKEN_ITEMS_BITS _STREAM2MMIO_PACK_NUM_ITEMS_BITS
#define _IBUF_CNTRL_ACK_TOKEN_LSB _IBUF_CNTRL_ACK_TOKEN_STORES_IDX
#define _IBUF_CNTRL_ACK_TOKEN_MSB (_IBUF_CNTRL_ACK_TOKEN_ITEMS_BITS + _IBUF_CNTRL_ACK_TOKEN_ITEMS_IDX - 1)
/* bit 31 indicates a valid ack: */
/* bit 31 indicates a valid ack: */
#define _IBUF_CNTRL_ACK_TOKEN_VALID_BIT (_IBUF_CNTRL_ACK_TOKEN_ITEMS_BITS + _IBUF_CNTRL_ACK_TOKEN_ITEMS_IDX)
/*shared registers:*/
@ -66,44 +66,44 @@
#define _IBUF_CNTRL_CMD 0
#define _IBUF_CNTRL_ACK 1
/* number of items (packets or words) per frame: */
/* number of items (packets or words) per frame: */
#define _IBUF_CNTRL_NUM_ITEMS_PER_STORE 2
/* number of stores (packets or words) per store/buffer: */
/* number of stores (packets or words) per store/buffer: */
#define _IBUF_CNTRL_NUM_STORES_PER_FRAME 3
/* the channel and command in the DMA */
/* the channel and command in the DMA */
#define _IBUF_CNTRL_DMA_CHANNEL 4
#define _IBUF_CNTRL_DMA_CMD 5
/* the start address and stride of the buffers */
/* the start address and stride of the buffers */
#define _IBUF_CNTRL_BUFFER_START_ADDRESS 6
#define _IBUF_CNTRL_BUFFER_STRIDE 7
#define _IBUF_CNTRL_BUFFER_END_ADDRESS 8
/* destination start address, stride and end address; should be the same as in the DMA */
/* destination start address, stride and end address; should be the same as in the DMA */
#define _IBUF_CNTRL_DEST_START_ADDRESS 9
#define _IBUF_CNTRL_DEST_STRIDE 10
#define _IBUF_CNTRL_DEST_END_ADDRESS 11
/* send a frame sync or not, default 1 */
/* send a frame sync or not, default 1 */
#define _IBUF_CNTRL_SYNC_FRAME 12
/* str2mmio cmds */
/* str2mmio cmds */
#define _IBUF_CNTRL_STR2MMIO_SYNC_CMD 13
#define _IBUF_CNTRL_STR2MMIO_STORE_CMD 14
/* num elems p word*/
/* num elems p word*/
#define _IBUF_CNTRL_SHIFT_ITEMS 15
#define _IBUF_CNTRL_ELEMS_P_WORD_IBUF 16
#define _IBUF_CNTRL_ELEMS_P_WORD_DEST 17
/* STATUS */
/* current frame and stores in buffer */
/* STATUS */
/* current frame and stores in buffer */
#define _IBUF_CNTRL_CUR_STORES 18
#define _IBUF_CNTRL_CUR_ACKS 19
/* current buffer and destination address for DMA cmd's */
/* current buffer and destination address for DMA cmd's */
#define _IBUF_CNTRL_CUR_S2M_IBUF_ADDR 20
#define _IBUF_CNTRL_CUR_DMA_IBUF_ADDR 21
#define _IBUF_CNTRL_CUR_DMA_DEST_ADDR 22
@ -119,16 +119,16 @@
#define _IBUF_CNTRL_CMD_STORE_FRAME_IDX 0
#define _IBUF_CNTRL_CMD_ONLINE_IDX 1
/* initialize, copy st_addr to cur_addr etc */
/* initialize, copy st_addr to cur_addr etc */
#define _IBUF_CNTRL_CMD_INITIALIZE 0
/* store an online frame (sync with ISP, use end cfg start, stride and end address: */
/* store an online frame (sync with ISP, use end cfg start, stride and end address: */
#define _IBUF_CNTRL_CMD_STORE_ONLINE_FRAME ((1 << _IBUF_CNTRL_CMD_STORE_FRAME_IDX) | (1 << _IBUF_CNTRL_CMD_ONLINE_IDX))
/* store an offline frame (don't sync with ISP, requires start address as 2nd token, no end address: */
/* store an offline frame (don't sync with ISP, requires start address as 2nd token, no end address: */
#define _IBUF_CNTRL_CMD_STORE_OFFLINE_FRAME BIT(_IBUF_CNTRL_CMD_STORE_FRAME_IDX)
/* false command token, should be different then commands. Use online bit, not store frame: */
/* false command token, should be different then commands. Use online bit, not store frame: */
#define _IBUF_CNTRL_FALSE_ACK 2
#endif

4
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2400_support.h
View File

@ -31,8 +31,8 @@ typedef char *tmemvectors, *tmemvectoru, *tvector;
#define hrt_isp_vmem_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_vmem(cell))
#if ISP_HAS_HIST
#define hrt_isp_hist(cell) HRT_PROC_TYPE_PROP(cell, _simd_histogram)
#define hrt_isp_hist_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_hist(cell))
#define hrt_isp_hist(cell) HRT_PROC_TYPE_PROP(cell, _simd_histogram)
#define hrt_isp_hist_master_port_address(cell) hrt_mem_master_port_address(cell, hrt_isp_hist(cell))
#endif
#endif /* _isp2400_support_h */

46
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/isp2401_mamoiada_params.h
View File

@ -45,26 +45,26 @@
#define ISP_VMEM_ELEM_PRECISION 14
#define ISP_VMEM_IS_BAMEM 1
#if ISP_VMEM_IS_BAMEM
#define ISP_VMEM_BAMEM_MAX_BOI_HEIGHT 8
#define ISP_VMEM_BAMEM_LATENCY 5
#define ISP_VMEM_BAMEM_BANK_NARROWING_FACTOR 2
#define ISP_VMEM_BAMEM_NR_DATA_PLANES 8
#define ISP_VMEM_BAMEM_NR_CFG_REGISTERS 16
#define ISP_VMEM_BAMEM_LININT 0
#define ISP_VMEM_BAMEM_DAP_BITS 3
#define ISP_VMEM_BAMEM_LININT_FRAC_BITS 0
#define ISP_VMEM_BAMEM_PID_BITS 3
#define ISP_VMEM_BAMEM_OFFSET_BITS 19
#define ISP_VMEM_BAMEM_ADDRESS_BITS 25
#define ISP_VMEM_BAMEM_RID_BITS 4
#define ISP_VMEM_BAMEM_TRANSPOSITION 1
#define ISP_VMEM_BAMEM_VEC_PLUS_SLICE 1
#define ISP_VMEM_BAMEM_ARB_SERVICE_CYCLE_BITS 1
#define ISP_VMEM_BAMEM_LUT_ELEMS 16
#define ISP_VMEM_BAMEM_LUT_ADDR_WIDTH 14
#define ISP_VMEM_BAMEM_HALF_BLOCK_WRITE 1
#define ISP_VMEM_BAMEM_SMART_FETCH 1
#define ISP_VMEM_BAMEM_BIG_ENDIANNESS 0
#define ISP_VMEM_BAMEM_MAX_BOI_HEIGHT 8
#define ISP_VMEM_BAMEM_LATENCY 5
#define ISP_VMEM_BAMEM_BANK_NARROWING_FACTOR 2
#define ISP_VMEM_BAMEM_NR_DATA_PLANES 8
#define ISP_VMEM_BAMEM_NR_CFG_REGISTERS 16
#define ISP_VMEM_BAMEM_LININT 0
#define ISP_VMEM_BAMEM_DAP_BITS 3
#define ISP_VMEM_BAMEM_LININT_FRAC_BITS 0
#define ISP_VMEM_BAMEM_PID_BITS 3
#define ISP_VMEM_BAMEM_OFFSET_BITS 19
#define ISP_VMEM_BAMEM_ADDRESS_BITS 25
#define ISP_VMEM_BAMEM_RID_BITS 4
#define ISP_VMEM_BAMEM_TRANSPOSITION 1
#define ISP_VMEM_BAMEM_VEC_PLUS_SLICE 1
#define ISP_VMEM_BAMEM_ARB_SERVICE_CYCLE_BITS 1
#define ISP_VMEM_BAMEM_LUT_ELEMS 16
#define ISP_VMEM_BAMEM_LUT_ADDR_WIDTH 14
#define ISP_VMEM_BAMEM_HALF_BLOCK_WRITE 1
#define ISP_VMEM_BAMEM_SMART_FETCH 1
#define ISP_VMEM_BAMEM_BIG_ENDIANNESS 0
#endif /* ISP_VMEM_IS_BAMEM */
#define ISP_PMEM_DEPTH 2048
#define ISP_PMEM_WIDTH 640
@ -111,8 +111,8 @@
#define ISP_SRU_GUARDING 1
#define ISP_VLSU_GUARDING 1
#define ISP_VRF_RAM 1
#define ISP_SRF_RAM 1
#define ISP_VRF_RAM 1
#define ISP_SRF_RAM 1
#define ISP_SPLIT_VMUL_VADD_IS 0
#define ISP_RFSPLIT_FPGA 0
@ -166,7 +166,7 @@
#define ISP_VMEM_WIDTH 896
#define ISP_VMEM_ALIGN 128
#if ISP_VMEM_IS_BAMEM
#define ISP_VMEM_ALIGN_ELEM 2
#define ISP_VMEM_ALIGN_ELEM 2
#endif /* ISP_VMEM_IS_BAMEM */
#define ISP_SIMDLSU 1
#define ISP_LSU_IMM_BITS 12

4
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/hrt/stream2mmio_defs.h
View File

@ -56,8 +56,8 @@
#define _STREAM2MMIO_ACK_TOKEN_EOP_BIT _STREAM2MMIO_PACK_ACK_EOP_BIT
#define _STREAM2MMIO_ACK_TOKEN_EOF_BIT _STREAM2MMIO_PACK_ACK_EOF_BIT
#define _STREAM2MMIO_ACK_TOKEN_VALID_BIT (_STREAM2MMIO_ACK_TOKEN_EOF_BIT + 1) /* this bit indicates a valid ack */
/* if there is no valid ack, a read */
/* on the ack register returns 0 */
/* if there is no valid ack, a read */
/* on the ack register returns 0 */
#define _STREAM2MMIO_ACK_TOKEN_WIDTH (_STREAM2MMIO_ACK_TOKEN_VALID_BIT + 1)
/* commands for packer module */

3
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/input_system_global.h
View File

@ -186,7 +186,8 @@ struct virtual_input_system_stream_s {
#endif
};
typedef struct virtual_input_system_stream_cfg_s virtual_input_system_stream_cfg_t;
typedef struct virtual_input_system_stream_cfg_s
virtual_input_system_stream_cfg_t;
struct virtual_input_system_stream_cfg_s {
u8 enable_metadata;
input_system_input_port_cfg_t input_port_cfg;

9
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_csi2p_system/isys_dma_global.h
View File

@ -45,7 +45,7 @@ struct isys2401_dma_port_cfg_s {
u32 elements;
u32 cropping;
u32 width;
};
};
/* end of DMA Port */
/************************************************
@ -68,8 +68,8 @@ typedef enum {
} isys2401_dma_connection;
typedef enum {
isys2401_dma_zero_extension = _DMA_ZERO_EXTEND,
isys2401_dma_sign_extension = _DMA_SIGN_EXTEND
isys2401_dma_zero_extension = _DMA_ZERO_EXTEND,
isys2401_dma_sign_extension = _DMA_SIGN_EXTEND
} isys2401_dma_extension;
typedef struct isys2401_dma_cfg_s isys2401_dma_cfg_t;
@ -83,6 +83,7 @@ struct isys2401_dma_cfg_s {
/* end of DMA Device */
/* isys2401_dma_channel limits per DMA ID */
extern const isys2401_dma_channel N_ISYS2401_DMA_CHANNEL_PROCS[N_ISYS2401_DMA_ID];
extern const isys2401_dma_channel
N_ISYS2401_DMA_CHANNEL_PROCS[N_ISYS2401_DMA_ID];
#endif /* __ISYS_DMA_GLOBAL_H_INCLUDED__ */

210
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.c
View File

@ -24,10 +24,11 @@
void
ia_css_configure_iterator(
const struct ia_css_binary *binary,
const struct ia_css_iterator_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_iterator_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_iterator() enter:\n");
{
unsigned int offset = 0;
@ -39,20 +40,23 @@ ia_css_configure_iterator(
}
if (size) {
ia_css_iterator_config((struct sh_css_isp_iterator_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_iterator() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_iterator() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_copy_output(
const struct ia_css_binary *binary,
const struct ia_css_copy_output_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_copy_output_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_copy_output() enter:\n");
{
unsigned int offset = 0;
@ -64,20 +68,23 @@ ia_css_configure_copy_output(
}
if (size) {
ia_css_copy_output_config((struct sh_css_isp_copy_output_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_copy_output() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_copy_output() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_crop(
const struct ia_css_binary *binary,
const struct ia_css_crop_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_crop_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_crop() enter:\n");
{
unsigned int offset = 0;
@ -89,20 +96,23 @@ ia_css_configure_crop(
}
if (size) {
ia_css_crop_config((struct sh_css_isp_crop_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_crop() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_crop() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_fpn(
const struct ia_css_binary *binary,
const struct ia_css_fpn_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_fpn_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_fpn() enter:\n");
{
unsigned int offset = 0;
@ -114,20 +124,23 @@ ia_css_configure_fpn(
}
if (size) {
ia_css_fpn_config((struct sh_css_isp_fpn_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_fpn() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_fpn() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_dvs(
const struct ia_css_binary *binary,
const struct ia_css_dvs_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_dvs_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_dvs() enter:\n");
{
unsigned int offset = 0;
@ -139,20 +152,23 @@ ia_css_configure_dvs(
}
if (size) {
ia_css_dvs_config((struct sh_css_isp_dvs_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_dvs() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_dvs() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_qplane(
const struct ia_css_binary *binary,
const struct ia_css_qplane_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_qplane_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_qplane() enter:\n");
{
unsigned int offset = 0;
@ -164,20 +180,23 @@ ia_css_configure_qplane(
}
if (size) {
ia_css_qplane_config((struct sh_css_isp_qplane_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_qplane() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_qplane() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_output0(
const struct ia_css_binary *binary,
const struct ia_css_output0_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_output0_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_output0() enter:\n");
{
unsigned int offset = 0;
@ -189,20 +208,23 @@ ia_css_configure_output0(
}
if (size) {
ia_css_output0_config((struct sh_css_isp_output_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output0() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_output0() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_output1(
const struct ia_css_binary *binary,
const struct ia_css_output1_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_output1_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_output1() enter:\n");
{
unsigned int offset = 0;
@ -214,20 +236,23 @@ ia_css_configure_output1(
}
if (size) {
ia_css_output1_config((struct sh_css_isp_output_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output1() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_output1() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_output(
const struct ia_css_binary *binary,
const struct ia_css_output_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_output_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_output() enter:\n");
{
unsigned int offset = 0;
@ -239,10 +264,12 @@ ia_css_configure_output(
}
if (size) {
ia_css_output_config((struct sh_css_isp_output_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_output() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_output() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
@ -250,10 +277,11 @@ ia_css_configure_output(
void
ia_css_configure_sc(
const struct ia_css_binary *binary,
const struct ia_css_sc_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_sc_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_sc() enter:\n");
{
unsigned int offset = 0;
@ -265,10 +293,12 @@ ia_css_configure_sc(
}
if (size) {
ia_css_sc_config((struct sh_css_isp_sc_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_sc() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_sc() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
@ -276,10 +306,11 @@ ia_css_configure_sc(
void
ia_css_configure_raw(
const struct ia_css_binary *binary,
const struct ia_css_raw_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_raw_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_raw() enter:\n");
{
unsigned int offset = 0;
@ -291,20 +322,23 @@ ia_css_configure_raw(
}
if (size) {
ia_css_raw_config((struct sh_css_isp_raw_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_raw() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_raw() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_tnr(
const struct ia_css_binary *binary,
const struct ia_css_tnr_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_tnr_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_tnr() enter:\n");
{
unsigned int offset = 0;
@ -316,20 +350,23 @@ ia_css_configure_tnr(
}
if (size) {
ia_css_tnr_config((struct sh_css_isp_tnr_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_tnr() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_tnr() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_ref(
const struct ia_css_binary *binary,
const struct ia_css_ref_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_ref_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_ref() enter:\n");
{
unsigned int offset = 0;
@ -341,20 +378,23 @@ ia_css_configure_ref(
}
if (size) {
ia_css_ref_config((struct sh_css_isp_ref_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_ref() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_ref() leave:\n");
}
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_vf(
const struct ia_css_binary *binary,
const struct ia_css_vf_configuration *config_dmem)
const struct ia_css_binary *binary,
const struct ia_css_vf_configuration *config_dmem)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_vf() enter:\n");
{
unsigned int offset = 0;
@ -366,8 +406,10 @@ ia_css_configure_vf(
}
if (size) {
ia_css_vf_config((struct sh_css_isp_vf_isp_config *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size); }
&binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset],
config_dmem, size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_configure_vf() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_configure_vf() leave:\n");
}

56
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_configs.h
View File

@ -88,101 +88,101 @@ struct ia_css_config_memory_offsets {
void
ia_css_configure_iterator(
const struct ia_css_binary *binary,
const struct ia_css_iterator_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_iterator_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_copy_output(
const struct ia_css_binary *binary,
const struct ia_css_copy_output_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_copy_output_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_crop(
const struct ia_css_binary *binary,
const struct ia_css_crop_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_crop_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_fpn(
const struct ia_css_binary *binary,
const struct ia_css_fpn_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_fpn_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_dvs(
const struct ia_css_binary *binary,
const struct ia_css_dvs_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_dvs_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_qplane(
const struct ia_css_binary *binary,
const struct ia_css_qplane_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_qplane_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_output0(
const struct ia_css_binary *binary,
const struct ia_css_output0_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_output0_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_output1(
const struct ia_css_binary *binary,
const struct ia_css_output1_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_output1_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_output(
const struct ia_css_binary *binary,
const struct ia_css_output_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_output_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
#ifdef ISP2401
void
ia_css_configure_sc(
const struct ia_css_binary *binary,
const struct ia_css_sc_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_sc_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
#endif
void
ia_css_configure_raw(
const struct ia_css_binary *binary,
const struct ia_css_raw_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_raw_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_tnr(
const struct ia_css_binary *binary,
const struct ia_css_tnr_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_tnr_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_ref(
const struct ia_css_binary *binary,
const struct ia_css_ref_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_ref_configuration *config_dmem);
/* Code generated by genparam/genconfig.c:gen_configure_function() */
void
ia_css_configure_vf(
const struct ia_css_binary *binary,
const struct ia_css_vf_configuration *config_dmem);
const struct ia_css_binary *binary,
const struct ia_css_vf_configuration *config_dmem);
#endif /* IA_CSS_INCLUDE_CONFIGURATION */

1868
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.c
View File

File diff suppressed because it is too large Load Diff

84
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_params.h
View File

@ -150,237 +150,237 @@ struct ia_css_memory_offsets {
struct ia_css_pipeline_stage; /* forward declaration */
extern void (*ia_css_kernel_process_param[IA_CSS_NUM_PARAMETER_IDS])(
unsigned int pipe_id,
const struct ia_css_pipeline_stage *stage,
struct ia_css_isp_parameters *params);
unsigned int pipe_id,
const struct ia_css_pipeline_stage *stage,
struct ia_css_isp_parameters *params);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_dp_config(struct ia_css_isp_parameters *params,
const struct ia_css_dp_config *config);
const struct ia_css_dp_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_wb_config(struct ia_css_isp_parameters *params,
const struct ia_css_wb_config *config);
const struct ia_css_wb_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_tnr_config(struct ia_css_isp_parameters *params,
const struct ia_css_tnr_config *config);
const struct ia_css_tnr_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_ob_config(struct ia_css_isp_parameters *params,
const struct ia_css_ob_config *config);
const struct ia_css_ob_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_de_config(struct ia_css_isp_parameters *params,
const struct ia_css_de_config *config);
const struct ia_css_de_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_anr_config(struct ia_css_isp_parameters *params,
const struct ia_css_anr_config *config);
const struct ia_css_anr_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_anr2_config(struct ia_css_isp_parameters *params,
const struct ia_css_anr_thres *config);
const struct ia_css_anr_thres *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_ce_config(struct ia_css_isp_parameters *params,
const struct ia_css_ce_config *config);
const struct ia_css_ce_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_ecd_config(struct ia_css_isp_parameters *params,
const struct ia_css_ecd_config *config);
const struct ia_css_ecd_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_ynr_config(struct ia_css_isp_parameters *params,
const struct ia_css_ynr_config *config);
const struct ia_css_ynr_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_fc_config(struct ia_css_isp_parameters *params,
const struct ia_css_fc_config *config);
const struct ia_css_fc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_cnr_config(struct ia_css_isp_parameters *params,
const struct ia_css_cnr_config *config);
const struct ia_css_cnr_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_macc_config(struct ia_css_isp_parameters *params,
const struct ia_css_macc_config *config);
const struct ia_css_macc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_ctc_config(struct ia_css_isp_parameters *params,
const struct ia_css_ctc_config *config);
const struct ia_css_ctc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_aa_config(struct ia_css_isp_parameters *params,
const struct ia_css_aa_config *config);
const struct ia_css_aa_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_yuv2rgb_config(struct ia_css_isp_parameters *params,
const struct ia_css_cc_config *config);
const struct ia_css_cc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_rgb2yuv_config(struct ia_css_isp_parameters *params,
const struct ia_css_cc_config *config);
const struct ia_css_cc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_csc_config(struct ia_css_isp_parameters *params,
const struct ia_css_cc_config *config);
const struct ia_css_cc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_nr_config(struct ia_css_isp_parameters *params,
const struct ia_css_nr_config *config);
const struct ia_css_nr_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_gc_config(struct ia_css_isp_parameters *params,
const struct ia_css_gc_config *config);
const struct ia_css_gc_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis_horicoef_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs_coefficients *config);
const struct ia_css_dvs_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis_vertcoef_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs_coefficients *config);
const struct ia_css_dvs_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis_horiproj_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs_coefficients *config);
const struct ia_css_dvs_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis_vertproj_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs_coefficients *config);
const struct ia_css_dvs_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis2_horicoef_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs2_coefficients *config);
const struct ia_css_dvs2_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis2_vertcoef_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs2_coefficients *config);
const struct ia_css_dvs2_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis2_horiproj_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs2_coefficients *config);
const struct ia_css_dvs2_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_sdis2_vertproj_config(struct ia_css_isp_parameters *params,
const struct ia_css_dvs2_coefficients *config);
const struct ia_css_dvs2_coefficients *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_r_gamma_config(struct ia_css_isp_parameters *params,
const struct ia_css_rgb_gamma_table *config);
const struct ia_css_rgb_gamma_table *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_g_gamma_config(struct ia_css_isp_parameters *params,
const struct ia_css_rgb_gamma_table *config);
const struct ia_css_rgb_gamma_table *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_b_gamma_config(struct ia_css_isp_parameters *params,
const struct ia_css_rgb_gamma_table *config);
const struct ia_css_rgb_gamma_table *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_xnr_table_config(struct ia_css_isp_parameters *params,
const struct ia_css_xnr_table *config);
const struct ia_css_xnr_table *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_formats_config(struct ia_css_isp_parameters *params,
const struct ia_css_formats_config *config);
const struct ia_css_formats_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_xnr_config(struct ia_css_isp_parameters *params,
const struct ia_css_xnr_config *config);
const struct ia_css_xnr_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_xnr3_config(struct ia_css_isp_parameters *params,
const struct ia_css_xnr3_config *config);
const struct ia_css_xnr3_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_s3a_config(struct ia_css_isp_parameters *params,
const struct ia_css_3a_config *config);
const struct ia_css_3a_config *config);
/* Code generated by genparam/gencode.c:gen_set_function() */
void
ia_css_set_output_config(struct ia_css_isp_parameters *params,
const struct ia_css_output_config *config);
const struct ia_css_output_config *config);
/* Code generated by genparam/gencode.c:gen_global_access_function() */
void
ia_css_get_configs(struct ia_css_isp_parameters *params,
const struct ia_css_isp_config *config)
const struct ia_css_isp_config *config)
;
#ifdef ISP2401
@ -389,7 +389,7 @@ ia_css_get_configs(struct ia_css_isp_parameters *params,
void
ia_css_set_configs(struct ia_css_isp_parameters *params,
const struct ia_css_isp_config *config)
const struct ia_css_isp_config *config)
;
#ifdef ISP2401

98
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.c
View File

@ -23,27 +23,31 @@
static void
ia_css_initialize_aa_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_aa_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->vmem.aa.size;
unsigned int offset = binary->info->mem_offsets.offsets.state->vmem.aa.offset;
if (size)
memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset], 0, size);
memset(&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
0, size);
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_aa_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_aa_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_cnr_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_cnr_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr.size;
@ -52,20 +56,22 @@ ia_css_initialize_cnr_state(
if (size) {
ia_css_init_cnr_state(
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_cnr_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_cnr2_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_cnr2_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->vmem.cnr2.size;
@ -74,20 +80,22 @@ ia_css_initialize_cnr2_state(
if (size) {
ia_css_init_cnr2_state(
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_cnr2_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_cnr2_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_dp_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_dp_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->vmem.dp.size;
@ -96,20 +104,22 @@ ia_css_initialize_dp_state(
if (size) {
ia_css_init_dp_state(
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_dp_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_dp_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_de_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_de_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->vmem.de.size;
@ -118,20 +128,22 @@ ia_css_initialize_de_state(
if (size) {
ia_css_init_de_state(
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_de_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_de_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_tnr_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_tnr_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->dmem.tnr.size;
@ -140,20 +152,22 @@ ia_css_initialize_tnr_state(
if (size) {
ia_css_init_tnr_state((struct sh_css_isp_tnr_dmem_state *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_tnr_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_tnr_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_ref_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_ref_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->dmem.ref.size;
@ -162,20 +176,22 @@ ia_css_initialize_ref_state(
if (size) {
ia_css_init_ref_state((struct sh_css_isp_ref_dmem_state *)
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_DMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ref_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_ref_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_init_function() */
static void
ia_css_initialize_ynr_state(
const struct ia_css_binary *binary)
const struct ia_css_binary *binary)
{
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() enter:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_ynr_state() enter:\n");
{
unsigned int size = binary->info->mem_offsets.offsets.state->vmem.ynr.size;
@ -184,16 +200,18 @@ ia_css_initialize_ynr_state(
if (size) {
ia_css_init_ynr_state(
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
&binary->mem_params.params[IA_CSS_PARAM_CLASS_STATE][IA_CSS_ISP_VMEM].address[offset],
size);
}
}
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE, "ia_css_initialize_ynr_state() leave:\n");
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE_PRIVATE,
"ia_css_initialize_ynr_state() leave:\n");
}
/* Code generated by genparam/genstate.c:gen_state_init_table() */
void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_binary *binary) = {
void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(
const struct ia_css_binary *binary) = {
ia_css_initialize_aa_state,
ia_css_initialize_cnr_state,
ia_css_initialize_cnr2_state,

3
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hive_isp_css_2401_system_generated/ia_css_isp_states.h
View File

@ -65,7 +65,8 @@ struct ia_css_state_memory_offsets {
#include "ia_css_binary.h" /* struct ia_css_binary */
/* Code generated by genparam/genstate.c:gen_state_init_table() */
extern void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(const struct ia_css_binary *binary);
extern void (* ia_css_kernel_init_state[IA_CSS_NUM_STATE_IDS])(
const struct ia_css_binary *binary);
#endif /* IA_CSS_INCLUDE_STATE */

2
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/dma_v2_defs.h
View File

@ -122,7 +122,7 @@
#define _DMA_V2_ZERO_EXTEND 0
#define _DMA_V2_SIGN_EXTEND 1
/* SLAVE address map */
/* SLAVE address map */
#define _DMA_V2_SEL_FSM_CMD 0
#define _DMA_V2_SEL_CH_REG 1
#define _DMA_V2_SEL_CONN_GROUP 2

50
drivers/staging/media/atomisp/pci/atomisp2/css2400/css_2401_system/hrt/gdc_v2_defs.h
View File

@ -25,43 +25,43 @@
#define HRT_GDC_BCI_COEF_BITS 14 /* 14 bits per coefficient */
#define HRT_GDC_BCI_COEF_ONE (1 << (HRT_GDC_BCI_COEF_BITS - 2)) /* We represent signed 10 bit coefficients. */
/* The supported range is [-256, .., +256] */
/* in 14-bit signed notation, */
/* We need all ten bits (MSB must be zero). */
/* -s is inserted to solve this issue, and */
/* therefore "1" is equal to +256. */
/* The supported range is [-256, .., +256] */
/* in 14-bit signed notation, */
/* We need all ten bits (MSB must be zero). */
/* -s is inserted to solve this issue, and */
/* therefore "1" is equal to +256. */
#define HRT_GDC_BCI_COEF_MASK ((1 << HRT_GDC_BCI_COEF_BITS) - 1)
#define HRT_GDC_LUT_BYTES (HRT_GDC_N * 4 * 2) /* 1024 addresses, 4 coefficients per address, */
/* 2 bytes per coefficient */
/* 2 bytes per coefficient */
#define _HRT_GDC_REG_ALIGN 4
// 31 30 29 25 24 0
// |-----|---|--------|------------------------|
// | CMD | C | Reg_ID | Value |
// 31 30 29 25 24 0
// |-----|---|--------|------------------------|
// | CMD | C | Reg_ID | Value |
// There are just two commands possible for the GDC block:
// 1 - Configure reg
// 0 - Data token
// There are just two commands possible for the GDC block:
// 1 - Configure reg
// 0 - Data token
// C - Reserved bit
// Used in protocol to indicate whether it is C-run or other type of runs
// In case of C-run, this bit has a value of 1, for all the other runs, it is 0.
// C - Reserved bit
// Used in protocol to indicate whether it is C-run or other type of runs
// In case of C-run, this bit has a value of 1, for all the other runs, it is 0.
// Reg_ID - Address of the register to be configured
// Reg_ID - Address of the register to be configured
// Value - Value to store to the addressed register, maximum of 24 bits
// Value - Value to store to the addressed register, maximum of 24 bits
// Configure reg command is not followed by any other token.
// The address of the register and the data to be filled in is contained in the same token
// Configure reg command is not followed by any other token.
// The address of the register and the data to be filled in is contained in the same token
// When the first data token is received, it must be:
// 1. FRX and FRY (device configured in one of the scaling modes) ***DEFAULT MODE***, or,
// 2. P0'X (device configured in one of the tetragon modes)
// After the first data token is received, pre-defined number of tokens with the following meaning follow:
// 1. two tokens: SRC address ; DST address
// 2. nine tokens: P0'Y, .., P3'Y ; SRC address ; DST address
// When the first data token is received, it must be:
// 1. FRX and FRY (device configured in one of the scaling modes) ***DEFAULT MODE***, or,
// 2. P0'X (device configured in one of the tetragon modes)
// After the first data token is received, pre-defined number of tokens with the following meaning follow:
// 1. two tokens: SRC address ; DST address
// 2. nine tokens: P0'Y, .., P3'Y ; SRC address ; DST address
#define HRT_GDC_CONFIG_CMD 1
#define HRT_GDC_DATA_CMD 0

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