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arm64: dts: exynos7: add specific compatibles to several blocks

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Exynos7 reuses several devices from older designs, thus historically
we kept the old (block's) compatible only.  This works fine and there is
no bug here, however guidelines expressed in
Documentation/devicetree/bindings/writing-bindings.rst state that:
1. Compatibles should be specific.
2. We should add new compatibles in case of bugs or features.

Add compatibles specific to Exynos7 in front of all old-SoC-like
compatibles.  This will also help reviews of new code using existing
DTS as template.  No functional impact on Linux drivers behavior.

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20231108104343.24192-15-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Krzysztof Kozlowski 2023-11-08 11:43:40 +01:00
parent c226e8c5e7
commit ea9875b7d4
1 changed files with 10 additions and 8 deletions
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18
arch/arm64/boot/dts/exynos/exynos7.dtsi
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@ -128,7 +128,8 @@ soc: soc@0 {
ranges = <0 0 0 0x18000000>;
chipid@10000000 {
compatible = "samsung,exynos4210-chipid";
compatible = "samsung,exynos7-chipid",
"samsung,exynos4210-chipid";
reg = <0x10000000 0x100>;
};
@ -279,7 +280,7 @@ clock_fsys1: clock-controller@156e0000 {
};
serial_0: serial@13630000 {
compatible = "samsung,exynos4210-uart";
compatible = "samsung,exynos7-uart", "samsung,exynos4210-uart";
reg = <0x13630000 0x100>;
interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock_peric0 PCLK_UART0>,
@ -289,7 +290,7 @@ serial_0: serial@13630000 {
};
serial_1: serial@14c20000 {
compatible = "samsung,exynos4210-uart";
compatible = "samsung,exynos7-uart", "samsung,exynos4210-uart";
reg = <0x14c20000 0x100>;
interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock_peric1 PCLK_UART1>,
@ -299,7 +300,7 @@ serial_1: serial@14c20000 {
};
serial_2: serial@14c30000 {
compatible = "samsung,exynos4210-uart";
compatible = "samsung,exynos7-uart", "samsung,exynos4210-uart";
reg = <0x14c30000 0x100>;
interrupts = <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock_peric1 PCLK_UART2>,
@ -309,7 +310,7 @@ serial_2: serial@14c30000 {
};
serial_3: serial@14c40000 {
compatible = "samsung,exynos4210-uart";
compatible = "samsung,exynos7-uart", "samsung,exynos4210-uart";
reg = <0x14c40000 0x100>;
interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock_peric1 PCLK_UART3>,
@ -539,7 +540,7 @@ pmu_system_controller: system-controller@105c0000 {
};
rtc: rtc@10590000 {
compatible = "samsung,s3c6410-rtc";
compatible = "samsung,exynos7-rtc", "samsung,s3c6410-rtc";
reg = <0x10590000 0x100>;
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
@ -559,7 +560,8 @@ watchdog: watchdog@101d0000 {
};
gpu: gpu@14ac0000 {
compatible = "samsung,exynos5433-mali", "arm,mali-t760";
compatible = "samsung,exynos7-mali",
"samsung,exynos5433-mali", "arm,mali-t760";
reg = <0x14ac0000 0x5000>;
interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>,
@ -619,7 +621,7 @@ adc: adc@13620000 {
};
pwm: pwm@136c0000 {
compatible = "samsung,exynos4210-pwm";
compatible = "samsung,exynos7-pwm", "samsung,exynos4210-pwm";
reg = <0x136c0000 0x100>;
interrupts = <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,