From b64ac044ad949711470213550b53bd06684c5a03 Mon Sep 17 00:00:00 2001 From: Steffen Trumtrar Date: Thu, 26 Mar 2020 10:53:56 +0100 Subject: [PATCH 1/2] ARM: dts: socfgpa: set bridges status to disabled The hps-to-fpga bridges can't be used, when the FPGA is not programmed. Set the default state to disabled and leave enabling them to the board-specific dts files. Although this changes behavior, there are no in-tree users of the bridges, so this won't break anything. Signed-off-by: Steffen Trumtrar Signed-off-by: Dinh Nguyen --- arch/arm/boot/dts/socfpga.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 4f3993cc0227..7f0480354ee6 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -531,6 +531,7 @@ fpga_bridge0: fpga_bridge@ff400000 { reg = <0xff400000 0x100000>; resets = <&rst LWHPS2FPGA_RESET>; clocks = <&l4_main_clk>; + status = "disabled"; }; fpga_bridge1: fpga_bridge@ff500000 { @@ -538,6 +539,7 @@ fpga_bridge1: fpga_bridge@ff500000 { reg = <0xff500000 0x10000>; resets = <&rst HPS2FPGA_RESET>; clocks = <&l4_main_clk>; + status = "disabled"; }; fpgamgr0: fpgamgr@ff706000 { From 29aed3ef6d4985bf8d3ef6505c3e63efc838414e Mon Sep 17 00:00:00 2001 From: Steffen Trumtrar Date: Thu, 26 Mar 2020 10:53:57 +0100 Subject: [PATCH 2/2] ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs. Signed-off-by: Steffen Trumtrar Signed-off-by: Dinh Nguyen --- arch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 7f0480354ee6..c2b54af417a2 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -542,6 +542,20 @@ fpga_bridge1: fpga_bridge@ff500000 { status = "disabled"; }; + fpga_bridge2: fpga-bridge@ff600000 { + compatible = "altr,socfpga-fpga2hps-bridge"; + reg = <0xff600000 0x100000>; + resets = <&rst FPGA2HPS_RESET>; + clocks = <&l4_main_clk>; + status = "disabled"; + }; + + fpga_bridge3: fpga-bridge@ffc25080 { + compatible = "altr,socfpga-fpga2sdram-bridge"; + reg = <0xffc25080 0x4>; + status = "disabled"; + }; + fpgamgr0: fpgamgr@ff706000 { compatible = "altr,socfpga-fpga-mgr"; reg = <0xff706000 0x1000