arm64: dts: qcom: milos: Add CCI busses

Add the nodes and the pinctrl for the CCI I2C busses on the Milos SoC.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20260320-milos-cci-v2-2-1947fc83f756@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Luca Weiss 2026-03-20 09:09:50 +01:00 committed by Bjorn Andersson
parent 7658e9b948
commit e9e75b3e62

View File

@ -1849,6 +1849,72 @@ videocc: clock-controller@aaf0000 {
#power-domain-cells = <1>;
};
cci0: cci@ac15000 {
compatible = "qcom,milos-cci", "qcom,msm8996-cci";
reg = <0x0 0x0ac15000 0x0 0x1000>;
interrupts = <GIC_SPI 426 IRQ_TYPE_EDGE_RISING 0>;
power-domains = <&camcc CAM_CC_CAMSS_TOP_GDSC>;
clocks = <&camcc CAM_CC_SOC_AHB_CLK>,
<&camcc CAM_CC_CPAS_AHB_CLK>,
<&camcc CAM_CC_CCI_0_CLK>;
clock-names = "soc_ahb",
"cpas_ahb",
"cci";
pinctrl-0 = <&cci0_0_default &cci0_1_default>;
pinctrl-1 = <&cci0_0_sleep &cci0_1_sleep>;
pinctrl-names = "default", "sleep";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
cci0_i2c0: i2c-bus@0 {
reg = <0>;
clock-frequency = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
};
cci0_i2c1: i2c-bus@1 {
reg = <1>;
clock-frequency = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
};
};
cci1: cci@ac16000 {
compatible = "qcom,milos-cci", "qcom,msm8996-cci";
reg = <0x0 0x0ac16000 0x0 0x1000>;
interrupts = <GIC_SPI 427 IRQ_TYPE_EDGE_RISING 0>;
power-domains = <&camcc CAM_CC_CAMSS_TOP_GDSC>;
clocks = <&camcc CAM_CC_SOC_AHB_CLK>,
<&camcc CAM_CC_CPAS_AHB_CLK>,
<&camcc CAM_CC_CCI_1_CLK>;
clock-names = "soc_ahb",
"cpas_ahb",
"cci";
pinctrl-0 = <&cci1_0_default &cci1_1_default>;
pinctrl-1 = <&cci1_0_sleep &cci1_1_sleep>;
pinctrl-names = "default", "sleep";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
cci1_i2c0: i2c-bus@0 {
reg = <0>;
clock-frequency = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
};
cci1_i2c1: i2c-bus@1 {
reg = <1>;
clock-frequency = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
};
};
camcc: clock-controller@adb0000 {
compatible = "qcom,milos-camcc";
reg = <0x0 0x0adb0000 0x0 0x40000>;
@ -2093,6 +2159,134 @@ data-pins {
bias-pull-up;
};
};
cci0_0_default: cci0-0-default-state {
sda-pins {
pins = "gpio88";
function = "cci_i2c_sda";
drive-strength = <2>;
bias-pull-up = <2200>;
};
scl-pins {
pins = "gpio89";
function = "cci_i2c_scl";
drive-strength = <2>;
bias-pull-up = <2200>;
};
};
cci0_0_sleep: cci0-0-sleep-state {
sda-pins {
pins = "gpio88";
function = "cci_i2c_sda";
drive-strength = <2>;
bias-pull-down;
};
scl-pins {
pins = "gpio89";
function = "cci_i2c_scl";
drive-strength = <2>;
bias-pull-down;
};
};
cci0_1_default: cci0-1-default-state {
sda-pins {
pins = "gpio90";
function = "cci_i2c_sda";
drive-strength = <2>;
bias-pull-up = <2200>;
};
scl-pins {
pins = "gpio91";
function = "cci_i2c_scl";
drive-strength = <2>;
bias-pull-up = <2200>;
};
};
cci0_1_sleep: cci0-1-sleep-state {
sda-pins {
pins = "gpio90";
function = "cci_i2c_sda";
drive-strength = <2>;
bias-pull-down;
};
scl-pins {
pins = "gpio91";
function = "cci_i2c_scl";
drive-strength = <2>;
bias-pull-down;
};
};
cci1_0_default: cci1-0-default-state {
sda-pins {
pins = "gpio92";
function = "cci_i2c_sda";
drive-strength = <2>;
bias-pull-up = <2200>;
};
scl-pins {
pins = "gpio93";
function = "cci_i2c_scl";
drive-strength = <2>;
bias-pull-up = <2200>;
};
};
cci1_0_sleep: cci1-0-sleep-state {
sda-pins {
pins = "gpio92";
function = "cci_i2c_sda";
drive-strength = <2>;
bias-pull-down;
};
scl-pins {
pins = "gpio93";
function = "cci_i2c_scl";
drive-strength = <2>;
bias-pull-down;
};
};
cci1_1_default: cci1-1-default-state {
sda-pins {
pins = "gpio94";
function = "cci_i2c_sda";
drive-strength = <2>;
bias-pull-up = <2200>;
};
scl-pins {
pins = "gpio95";
function = "cci_i2c_scl";
drive-strength = <2>;
bias-pull-up = <2200>;
};
};
cci1_1_sleep: cci1-1-sleep-state {
sda-pins {
pins = "gpio94";
function = "cci_i2c_sda";
drive-strength = <2>;
bias-pull-down;
};
scl-pins {
pins = "gpio95";
function = "cci_i2c_scl";
drive-strength = <2>;
bias-pull-down;
};
};
};
apps_smmu: iommu@15000000 {