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drm/amdgpu: pass the entity to use to amdgpu_ttm_map_buffer
This way the caller can select the one it wants to use. Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Pierre-Eric Pelloux-Prayer
Alex Deucher
parent
bc0515ece3
commit
e95b41846d
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@ -176,6 +176,7 @@ amdgpu_ttm_job_submit(struct amdgpu_device *adev, struct amdgpu_job *job, u32 nu
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/**
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* amdgpu_ttm_map_buffer - Map memory into the GART windows
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* @entity: entity to run the window setup job
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* @bo: buffer object to map
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* @mem: memory object to map
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* @mm_cur: range to map
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@ -187,7 +188,8 @@ amdgpu_ttm_job_submit(struct amdgpu_device *adev, struct amdgpu_job *job, u32 nu
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* Setup one of the GART windows to access a specific piece of memory or return
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* the physical address for local memory.
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*/
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static int amdgpu_ttm_map_buffer(struct ttm_buffer_object *bo,
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static int amdgpu_ttm_map_buffer(struct amdgpu_ttm_buffer_entity *entity,
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struct ttm_buffer_object *bo,
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struct ttm_resource *mem,
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struct amdgpu_res_cursor *mm_cur,
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unsigned int window,
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@ -234,7 +236,7 @@ static int amdgpu_ttm_map_buffer(struct ttm_buffer_object *bo,
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num_dw = ALIGN(adev->mman.buffer_funcs->copy_num_dw, 8);
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num_bytes = num_pages * 8 * AMDGPU_GPU_PAGES_IN_CPU_PAGE;
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r = amdgpu_job_alloc_with_ib(adev, &adev->mman.default_entity.base,
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r = amdgpu_job_alloc_with_ib(adev, &entity->base,
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AMDGPU_FENCE_OWNER_UNDEFINED,
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num_dw * 4 + num_bytes,
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AMDGPU_IB_POOL_DELAYED, &job,
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@ -274,6 +276,7 @@ static int amdgpu_ttm_map_buffer(struct ttm_buffer_object *bo,
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/**
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* amdgpu_ttm_copy_mem_to_mem - Helper function for copy
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* @adev: amdgpu device
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* @entity: entity to run the jobs
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* @src: buffer/address where to read from
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* @dst: buffer/address where to write to
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* @size: number of bytes to copy
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@ -288,6 +291,7 @@ static int amdgpu_ttm_map_buffer(struct ttm_buffer_object *bo,
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*/
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__attribute__((nonnull))
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static int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
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struct amdgpu_ttm_buffer_entity *entity,
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const struct amdgpu_copy_mem *src,
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const struct amdgpu_copy_mem *dst,
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uint64_t size, bool tmz,
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@ -319,12 +323,12 @@ static int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
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cur_size = min3(src_mm.size, dst_mm.size, 256ULL << 20);
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/* Map src to window 0 and dst to window 1. */
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r = amdgpu_ttm_map_buffer(src->bo, src->mem, &src_mm,
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r = amdgpu_ttm_map_buffer(entity, src->bo, src->mem, &src_mm,
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0, tmz, &cur_size, &from);
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if (r)
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goto error;
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r = amdgpu_ttm_map_buffer(dst->bo, dst->mem, &dst_mm,
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r = amdgpu_ttm_map_buffer(entity, dst->bo, dst->mem, &dst_mm,
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1, tmz, &cur_size, &to);
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if (r)
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goto error;
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@ -393,7 +397,9 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
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src.offset = 0;
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dst.offset = 0;
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r = amdgpu_ttm_copy_mem_to_mem(adev, &src, &dst,
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r = amdgpu_ttm_copy_mem_to_mem(adev,
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&adev->mman.move_entity,
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&src, &dst,
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new_mem->size,
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amdgpu_bo_encrypted(abo),
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bo->base.resv, &fence);
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@ -2336,17 +2342,16 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable)
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}
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static int amdgpu_ttm_prepare_job(struct amdgpu_device *adev,
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struct amdgpu_ttm_buffer_entity *entity,
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unsigned int num_dw,
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struct dma_resv *resv,
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bool vm_needs_flush,
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struct amdgpu_job **job,
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bool delayed, u64 k_job_id)
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u64 k_job_id)
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{
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enum amdgpu_ib_pool_type pool = AMDGPU_IB_POOL_DELAYED;
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int r;
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struct drm_sched_entity *entity = delayed ? &adev->mman.clear_entity.base :
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&adev->mman.default_entity.base;
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r = amdgpu_job_alloc_with_ib(adev, entity,
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r = amdgpu_job_alloc_with_ib(adev, &entity->base,
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AMDGPU_FENCE_OWNER_UNDEFINED,
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num_dw * 4, pool, job, k_job_id);
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if (r)
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@ -2389,8 +2394,8 @@ int amdgpu_copy_buffer(struct amdgpu_device *adev, uint64_t src_offset,
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max_bytes = adev->mman.buffer_funcs->copy_max_bytes;
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num_loops = DIV_ROUND_UP(byte_count, max_bytes);
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num_dw = ALIGN(num_loops * adev->mman.buffer_funcs->copy_num_dw, 8);
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r = amdgpu_ttm_prepare_job(adev, num_dw,
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resv, vm_needs_flush, &job, false,
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r = amdgpu_ttm_prepare_job(adev, &adev->mman.move_entity, num_dw,
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resv, vm_needs_flush, &job,
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AMDGPU_KERNEL_JOB_ID_TTM_COPY_BUFFER);
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if (r)
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goto error_free;
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@ -2415,11 +2420,13 @@ int amdgpu_copy_buffer(struct amdgpu_device *adev, uint64_t src_offset,
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return r;
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}
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static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev, uint32_t src_data,
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static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev,
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struct amdgpu_ttm_buffer_entity *entity,
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uint32_t src_data,
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uint64_t dst_addr, uint32_t byte_count,
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struct dma_resv *resv,
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struct dma_fence **fence,
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bool vm_needs_flush, bool delayed,
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bool vm_needs_flush,
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u64 k_job_id)
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{
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unsigned int num_loops, num_dw;
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@ -2431,8 +2438,8 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev, uint32_t src_data,
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max_bytes = adev->mman.buffer_funcs->fill_max_bytes;
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num_loops = DIV_ROUND_UP_ULL(byte_count, max_bytes);
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num_dw = ALIGN(num_loops * adev->mman.buffer_funcs->fill_num_dw, 8);
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r = amdgpu_ttm_prepare_job(adev, num_dw, resv, vm_needs_flush,
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&job, delayed, k_job_id);
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r = amdgpu_ttm_prepare_job(adev, entity, num_dw, resv,
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vm_needs_flush, &job, k_job_id);
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if (r)
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return r;
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@ -2493,13 +2500,14 @@ int amdgpu_ttm_clear_buffer(struct amdgpu_bo *bo,
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/* Never clear more than 256MiB at once to avoid timeouts */
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size = min(cursor.size, 256ULL << 20);
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r = amdgpu_ttm_map_buffer(&bo->tbo, bo->tbo.resource, &cursor,
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r = amdgpu_ttm_map_buffer(&adev->mman.clear_entity,
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&bo->tbo, bo->tbo.resource, &cursor,
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1, false, &size, &addr);
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if (r)
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goto err;
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r = amdgpu_ttm_fill_mem(adev, 0, addr, size, resv,
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&next, true, true,
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r = amdgpu_ttm_fill_mem(adev, &adev->mman.clear_entity, 0, addr, size, resv,
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&next, true,
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AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER);
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if (r)
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goto err;
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@ -2523,10 +2531,14 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo,
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u64 k_job_id)
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{
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struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
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struct amdgpu_ttm_buffer_entity *entity;
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struct dma_fence *fence = NULL;
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struct amdgpu_res_cursor dst;
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int r;
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entity = delayed ? &adev->mman.clear_entity :
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&adev->mman.move_entity;
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if (!adev->mman.buffer_funcs_enabled) {
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dev_err(adev->dev,
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"Trying to clear memory with ring turned off.\n");
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@ -2543,13 +2555,14 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo,
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/* Never fill more than 256MiB at once to avoid timeouts */
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cur_size = min(dst.size, 256ULL << 20);
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r = amdgpu_ttm_map_buffer(&bo->tbo, bo->tbo.resource, &dst,
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r = amdgpu_ttm_map_buffer(&adev->mman.default_entity,
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&bo->tbo, bo->tbo.resource, &dst,
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1, false, &cur_size, &to);
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if (r)
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goto error;
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r = amdgpu_ttm_fill_mem(adev, src_data, to, cur_size, resv,
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&next, true, delayed, k_job_id);
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r = amdgpu_ttm_fill_mem(adev, entity, src_data, to, cur_size, resv,
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&next, true, k_job_id);
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if (r)
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goto error;
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