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wifi: mt76: mt7996: add support for more variants
Current varaints supported: - mt7996 chipset: tri-band, 4+4+4 NSS, eFEM - mt7992 chipset: dual-band, 4+4 NSS, eFEM This patch adds support for the following variants: - mt7996 chipset: - tri-band, 4+4+4 NSS, iFEM - tri-band, 2+3+3 NSS, eFEM - tri-band, 2+3+3 NSS, iFEM - mt7992 chipset: - dual-band, 4+4 NSS, iFEM - dual-band, 4+4 NSS, with band0 iFEM and band1 eFEM - dual-band, 2+3 NSS, eFEM - dual-band, 2+3 NSS, iFEM Co-developed-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com> Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com> Signed-off-by: Shayne Chen <shayne.chen@mediatek.com> Tested-by: Daniel Golle <daniel@makrotopia.org> Link: https://patch.msgid.link/20240926032440.15978-2-shayne.chen@mediatek.com Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
Shayne Chen
Felix Fietkau
parent
0da2e41070
commit
e8cb33ad54
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@ -25,17 +25,108 @@ static int mt7996_check_eeprom(struct mt7996_dev *dev)
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static char *mt7996_eeprom_name(struct mt7996_dev *dev)
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{
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switch (mt76_chip(&dev->mt76)) {
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case 0x7990:
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return MT7996_EEPROM_DEFAULT;
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case 0x7992:
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return MT7992_EEPROM_DEFAULT;
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switch (dev->var.type) {
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case MT7992_VAR_TYPE_23:
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if (dev->var.fem == MT7996_FEM_INT)
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return MT7992_EEPROM_DEFAULT_23_INT;
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return MT7992_EEPROM_DEFAULT_23;
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case MT7992_VAR_TYPE_44:
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default:
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if (dev->var.fem == MT7996_FEM_INT)
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return MT7992_EEPROM_DEFAULT_INT;
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if (dev->var.fem == MT7996_FEM_MIX)
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return MT7992_EEPROM_DEFAULT_MIX;
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return MT7992_EEPROM_DEFAULT;
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}
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case 0x7990:
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default:
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return MT7996_EEPROM_DEFAULT;
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switch (dev->var.type) {
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case MT7996_VAR_TYPE_233:
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if (dev->var.fem == MT7996_FEM_INT)
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return MT7996_EEPROM_DEFAULT_233_INT;
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return MT7996_EEPROM_DEFAULT_233;
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case MT7996_VAR_TYPE_444:
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default:
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if (dev->var.fem == MT7996_FEM_INT)
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return MT7996_EEPROM_DEFAULT_INT;
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return MT7996_EEPROM_DEFAULT;
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}
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}
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}
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static void
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mt7996_eeprom_parse_stream(const u8 *eeprom, u8 band_idx, u8 *path,
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u8 *rx_path, u8 *nss)
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{
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switch (band_idx) {
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case MT_BAND1:
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*path = FIELD_GET(MT_EE_WIFI_CONF2_TX_PATH_BAND1,
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eeprom[MT_EE_WIFI_CONF + 2]);
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*rx_path = FIELD_GET(MT_EE_WIFI_CONF3_RX_PATH_BAND1,
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eeprom[MT_EE_WIFI_CONF + 3]);
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*nss = FIELD_GET(MT_EE_WIFI_CONF5_STREAM_NUM_BAND1,
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eeprom[MT_EE_WIFI_CONF + 5]);
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break;
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case MT_BAND2:
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*path = FIELD_GET(MT_EE_WIFI_CONF2_TX_PATH_BAND2,
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eeprom[MT_EE_WIFI_CONF + 2]);
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*rx_path = FIELD_GET(MT_EE_WIFI_CONF4_RX_PATH_BAND2,
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eeprom[MT_EE_WIFI_CONF + 4]);
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*nss = FIELD_GET(MT_EE_WIFI_CONF5_STREAM_NUM_BAND2,
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eeprom[MT_EE_WIFI_CONF + 5]);
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break;
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default:
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*path = FIELD_GET(MT_EE_WIFI_CONF1_TX_PATH_BAND0,
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eeprom[MT_EE_WIFI_CONF + 1]);
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*rx_path = FIELD_GET(MT_EE_WIFI_CONF3_RX_PATH_BAND0,
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eeprom[MT_EE_WIFI_CONF + 3]);
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*nss = FIELD_GET(MT_EE_WIFI_CONF4_STREAM_NUM_BAND0,
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eeprom[MT_EE_WIFI_CONF + 4]);
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break;
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}
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}
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static bool mt7996_eeprom_variant_valid(struct mt7996_dev *dev, const u8 *def)
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{
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#define FEM_INT 0
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#define FEM_EXT 3
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u8 *eeprom = dev->mt76.eeprom.data, fem[2];
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int i;
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for (i = 0; i < 2; i++)
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fem[i] = u8_get_bits(eeprom[MT_EE_WIFI_CONF + 6 + i],
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MT_EE_WIFI_PA_LNA_CONFIG);
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if (dev->var.fem == MT7996_FEM_EXT &&
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!(fem[0] == FEM_EXT && fem[1] == FEM_EXT))
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return false;
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else if (dev->var.fem == MT7996_FEM_INT &&
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!(fem[0] == FEM_INT && fem[1] == FEM_INT))
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return false;
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else if (dev->var.fem == MT7996_FEM_MIX &&
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!(fem[0] == FEM_INT && fem[1] == FEM_EXT))
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return false;
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for (i = 0; i < __MT_MAX_BAND; i++) {
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u8 path, rx_path, nss;
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u8 def_path, def_rx_path, def_nss;
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if (!dev->mt76.phys[i])
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continue;
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mt7996_eeprom_parse_stream(eeprom, i, &path, &rx_path, &nss);
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mt7996_eeprom_parse_stream(def, i, &def_path, &def_rx_path,
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&def_nss);
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if (path > def_path || rx_path > def_rx_path || nss > def_nss)
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return false;
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}
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return true;
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}
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static int
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mt7996_eeprom_load_default(struct mt7996_dev *dev)
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mt7996_eeprom_check_or_use_default(struct mt7996_dev *dev, bool use_default)
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{
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u8 *eeprom = dev->mt76.eeprom.data;
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const struct firmware *fw = NULL;
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@ -51,6 +142,10 @@ mt7996_eeprom_load_default(struct mt7996_dev *dev)
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goto out;
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}
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if (!use_default && mt7996_eeprom_variant_valid(dev, fw->data))
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goto out;
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dev_warn(dev->mt76.dev, "eeprom load fail, use default bin\n");
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memcpy(eeprom, fw->data, MT7996_EEPROM_SIZE);
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dev->flash_mode = true;
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@ -62,48 +157,68 @@ mt7996_eeprom_load_default(struct mt7996_dev *dev)
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static int mt7996_eeprom_load(struct mt7996_dev *dev)
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{
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bool use_default = false;
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int ret;
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ret = mt76_eeprom_init(&dev->mt76, MT7996_EEPROM_SIZE);
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if (ret < 0)
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return ret;
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if (ret) {
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if (ret && !mt7996_check_eeprom(dev)) {
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dev->flash_mode = true;
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} else {
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u8 free_block_num;
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u32 block_num, i;
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u32 eeprom_blk_size = MT7996_EEPROM_BLOCK_SIZE;
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goto out;
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}
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if (!dev->flash_mode) {
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u32 eeprom_blk_size = MT7996_EEPROM_BLOCK_SIZE;
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u32 block_num = DIV_ROUND_UP(MT7996_EEPROM_SIZE, eeprom_blk_size);
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u8 free_block_num;
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int i;
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memset(dev->mt76.eeprom.data, 0, MT7996_EEPROM_SIZE);
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ret = mt7996_mcu_get_eeprom_free_block(dev, &free_block_num);
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if (ret < 0)
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return ret;
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/* efuse info isn't enough */
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if (free_block_num >= 59)
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return -EINVAL;
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if (free_block_num >= 59) {
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use_default = true;
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goto out;
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}
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/* read eeprom data from efuse */
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block_num = DIV_ROUND_UP(MT7996_EEPROM_SIZE, eeprom_blk_size);
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for (i = 0; i < block_num; i++) {
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/* check if eeprom data from fw is valid */
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if (mt7996_mcu_get_eeprom(dev, 0, NULL, 0) ||
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mt7996_check_eeprom(dev)) {
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use_default = true;
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goto out;
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}
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/* read eeprom data from fw */
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for (i = 1; i < block_num; i++) {
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u32 len = eeprom_blk_size;
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if (i == block_num - 1)
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len = MT7996_EEPROM_SIZE % eeprom_blk_size;
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ret = mt7996_mcu_get_eeprom(dev, i * eeprom_blk_size,
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NULL, len);
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if (ret && ret != -EINVAL)
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return ret;
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if (ret && ret != -EINVAL) {
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use_default = true;
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goto out;
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}
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}
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}
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return mt7996_check_eeprom(dev);
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out:
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return mt7996_eeprom_check_or_use_default(dev, use_default);
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}
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static int mt7996_eeprom_parse_efuse_hw_cap(struct mt7996_dev *dev)
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static int mt7996_eeprom_parse_efuse_hw_cap(struct mt7996_phy *phy,
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u8 *path, u8 *rx_path, u8 *nss)
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{
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#define MODE_HE_ONLY BIT(0)
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#define WTBL_SIZE_GROUP GENMASK(31, 28)
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#define STREAM_CAP(_offs) ((cap & (0x7 << (_offs))) >> (_offs))
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struct mt7996_dev *dev = phy->dev;
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u32 cap = 0;
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int ret;
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@ -112,13 +227,17 @@ static int mt7996_eeprom_parse_efuse_hw_cap(struct mt7996_dev *dev)
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return ret;
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if (cap) {
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u8 band_offs = phy->mt76->band_idx * 3;
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dev->has_eht = !(cap & MODE_HE_ONLY);
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dev->wtbl_size_group = u32_get_bits(cap, WTBL_SIZE_GROUP);
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*nss = min_t(u8, *nss, STREAM_CAP(1 + band_offs));
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*path = min_t(u8, *path, STREAM_CAP(10 + band_offs));
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*rx_path = min_t(u8, *rx_path, STREAM_CAP(19 + band_offs));
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}
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if (dev->wtbl_size_group < 2 || dev->wtbl_size_group > 4 ||
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is_mt7992(&dev->mt76))
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dev->wtbl_size_group = 2; /* set default */
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if (dev->wtbl_size_group < 2 || dev->wtbl_size_group > 4)
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dev->wtbl_size_group = is_mt7996(&dev->mt76) ? 4 : 2;
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return 0;
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}
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@ -168,32 +287,10 @@ int mt7996_eeprom_parse_hw_cap(struct mt7996_dev *dev, struct mt7996_phy *phy)
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int max_path = 5, max_nss = 4;
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int ret;
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switch (band_idx) {
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case MT_BAND1:
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path = FIELD_GET(MT_EE_WIFI_CONF2_TX_PATH_BAND1,
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eeprom[MT_EE_WIFI_CONF + 2]);
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rx_path = FIELD_GET(MT_EE_WIFI_CONF3_RX_PATH_BAND1,
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eeprom[MT_EE_WIFI_CONF + 3]);
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nss = FIELD_GET(MT_EE_WIFI_CONF5_STREAM_NUM_BAND1,
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eeprom[MT_EE_WIFI_CONF + 5]);
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break;
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case MT_BAND2:
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path = FIELD_GET(MT_EE_WIFI_CONF2_TX_PATH_BAND2,
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eeprom[MT_EE_WIFI_CONF + 2]);
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rx_path = FIELD_GET(MT_EE_WIFI_CONF4_RX_PATH_BAND2,
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eeprom[MT_EE_WIFI_CONF + 4]);
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nss = FIELD_GET(MT_EE_WIFI_CONF5_STREAM_NUM_BAND2,
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eeprom[MT_EE_WIFI_CONF + 5]);
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break;
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default:
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path = FIELD_GET(MT_EE_WIFI_CONF1_TX_PATH_BAND0,
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eeprom[MT_EE_WIFI_CONF + 1]);
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rx_path = FIELD_GET(MT_EE_WIFI_CONF3_RX_PATH_BAND0,
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eeprom[MT_EE_WIFI_CONF + 3]);
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nss = FIELD_GET(MT_EE_WIFI_CONF4_STREAM_NUM_BAND0,
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eeprom[MT_EE_WIFI_CONF + 4]);
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break;
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}
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mt7996_eeprom_parse_stream(eeprom, band_idx, &path, &rx_path, &nss);
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ret = mt7996_eeprom_parse_efuse_hw_cap(phy, &path, &rx_path, &nss);
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if (ret)
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return ret;
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if (!path || path > max_path)
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path = max_path;
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@ -213,10 +310,6 @@ int mt7996_eeprom_parse_hw_cap(struct mt7996_dev *dev, struct mt7996_phy *phy)
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dev->chainshift[band_idx + 1] = dev->chainshift[band_idx] +
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hweight16(mphy->chainmask);
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ret = mt7996_eeprom_parse_efuse_hw_cap(dev);
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if (ret)
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return ret;
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return mt7996_eeprom_parse_band_config(phy);
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}
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@ -225,15 +318,8 @@ int mt7996_eeprom_init(struct mt7996_dev *dev)
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int ret;
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ret = mt7996_eeprom_load(dev);
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if (ret < 0) {
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if (ret != -EINVAL)
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return ret;
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dev_warn(dev->mt76.dev, "eeprom load fail, use default bin\n");
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ret = mt7996_eeprom_load_default(dev);
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if (ret)
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return ret;
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}
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if (ret < 0)
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return ret;
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ret = mt7996_eeprom_parse_hw_cap(dev, &dev->phy);
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if (ret < 0)
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@ -40,6 +40,8 @@ enum mt7996_eeprom_field {
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#define MT_EE_WIFI_CONF5_STREAM_NUM_BAND1 GENMASK(2, 0)
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#define MT_EE_WIFI_CONF5_STREAM_NUM_BAND2 GENMASK(5, 3)
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#define MT_EE_WIFI_PA_LNA_CONFIG GENMASK(1, 0)
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#define MT_EE_RATE_DELTA_MASK GENMASK(5, 0)
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#define MT_EE_RATE_DELTA_SIGN BIT(6)
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#define MT_EE_RATE_DELTA_EN BIT(7)
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@ -881,6 +881,76 @@ static void mt7996_wed_rro_work(struct work_struct *work)
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#endif
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}
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static int mt7996_variant_type_init(struct mt7996_dev *dev)
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{
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u32 val = mt76_rr(dev, MT_PAD_GPIO);
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u8 var_type;
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switch (mt76_chip(&dev->mt76)) {
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case 0x7990:
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if (val & MT_PAD_GPIO_2ADIE_TBTC)
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var_type = MT7996_VAR_TYPE_233;
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else
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var_type = MT7996_VAR_TYPE_444;
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break;
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case 0x7992:
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if (val & MT_PAD_GPIO_ADIE_SINGLE)
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var_type = MT7992_VAR_TYPE_23;
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else if (u32_get_bits(val, MT_PAD_GPIO_ADIE_COMB_7992))
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var_type = MT7992_VAR_TYPE_44;
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else
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return -EINVAL;
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break;
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default:
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return -EINVAL;
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}
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dev->var.type = var_type;
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return 0;
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}
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static int mt7996_variant_fem_init(struct mt7996_dev *dev)
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{
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#define MT7976C_EFUSE_OFFSET 0x470
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u8 buf[MT7996_EEPROM_BLOCK_SIZE], idx, adie_idx, adie_comb;
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u32 regval, val = mt76_rr(dev, MT_PAD_GPIO);
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u16 adie_id, adie_ver;
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bool is_7976c;
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int ret;
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if (is_mt7992(&dev->mt76)) {
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adie_idx = (val & MT_PAD_GPIO_ADIE_SINGLE) ? 0 : 1;
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adie_comb = u32_get_bits(val, MT_PAD_GPIO_ADIE_COMB_7992);
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} else {
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adie_idx = 0;
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adie_comb = u32_get_bits(val, MT_PAD_GPIO_ADIE_COMB);
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}
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ret = mt7996_mcu_rf_regval(dev, MT_ADIE_CHIP_ID(adie_idx), ®val, false);
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if (ret)
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return ret;
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ret = mt7996_mcu_get_eeprom(dev, MT7976C_EFUSE_OFFSET, buf, sizeof(buf));
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if (ret && ret != -EINVAL)
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return ret;
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adie_ver = u32_get_bits(regval, MT_ADIE_VERSION_MASK);
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idx = MT7976C_EFUSE_OFFSET % MT7996_EEPROM_BLOCK_SIZE;
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is_7976c = adie_ver == 0x8a10 || adie_ver == 0x8b00 ||
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adie_ver == 0x8c10 || buf[idx] == 0xc;
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adie_id = u32_get_bits(regval, MT_ADIE_CHIP_ID_MASK);
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if (adie_id == 0x7975 || adie_id == 0x7979 ||
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(adie_id == 0x7976 && is_7976c))
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dev->var.fem = MT7996_FEM_INT;
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else if (adie_id == 0x7977 && adie_comb == 1)
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dev->var.fem = MT7996_FEM_MIX;
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else
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dev->var.fem = MT7996_FEM_EXT;
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return 0;
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}
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static int mt7996_init_hardware(struct mt7996_dev *dev)
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{
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int ret, idx;
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@ -896,6 +966,10 @@ static int mt7996_init_hardware(struct mt7996_dev *dev)
|
|||
INIT_LIST_HEAD(&dev->wed_rro.poll_list);
|
||||
spin_lock_init(&dev->wed_rro.lock);
|
||||
|
||||
ret = mt7996_variant_type_init(dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = mt7996_dma_init(dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
|
@ -910,6 +984,10 @@ static int mt7996_init_hardware(struct mt7996_dev *dev)
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = mt7996_variant_fem_init(dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = mt7996_eeprom_init(dev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
|
|
|||
|
|
@ -14,11 +14,23 @@
|
|||
char *_fw; \
|
||||
switch (mt76_chip(&(_dev)->mt76)) { \
|
||||
case 0x7992: \
|
||||
_fw = MT7992_##name; \
|
||||
switch ((_dev)->var.type) { \
|
||||
case MT7992_VAR_TYPE_23: \
|
||||
_fw = MT7992_##name##_23; \
|
||||
break; \
|
||||
default: \
|
||||
_fw = MT7992_##name; \
|
||||
} \
|
||||
break; \
|
||||
case 0x7990: \
|
||||
default: \
|
||||
_fw = MT7996_##name; \
|
||||
switch ((_dev)->var.type) { \
|
||||
case MT7996_VAR_TYPE_233: \
|
||||
_fw = MT7996_##name##_233; \
|
||||
break; \
|
||||
default: \
|
||||
_fw = MT7996_##name; \
|
||||
} \
|
||||
break; \
|
||||
} \
|
||||
_fw; \
|
||||
|
|
|
|||
|
|
@ -34,13 +34,32 @@
|
|||
#define MT7996_FIRMWARE_DSP "mediatek/mt7996/mt7996_dsp.bin"
|
||||
#define MT7996_ROM_PATCH "mediatek/mt7996/mt7996_rom_patch.bin"
|
||||
|
||||
#define MT7996_FIRMWARE_WA_233 "mediatek/mt7996/mt7996_wa_233.bin"
|
||||
#define MT7996_FIRMWARE_WM_233 "mediatek/mt7996/mt7996_wm_233.bin"
|
||||
#define MT7996_FIRMWARE_DSP_233 MT7996_FIRMWARE_DSP
|
||||
#define MT7996_ROM_PATCH_233 "mediatek/mt7996/mt7996_rom_patch_233.bin"
|
||||
|
||||
#define MT7992_FIRMWARE_WA "mediatek/mt7996/mt7992_wa.bin"
|
||||
#define MT7992_FIRMWARE_WM "mediatek/mt7996/mt7992_wm.bin"
|
||||
#define MT7992_FIRMWARE_DSP "mediatek/mt7996/mt7992_dsp.bin"
|
||||
#define MT7992_ROM_PATCH "mediatek/mt7996/mt7992_rom_patch.bin"
|
||||
|
||||
#define MT7992_FIRMWARE_WA_23 "mediatek/mt7996/mt7992_wa_23.bin"
|
||||
#define MT7992_FIRMWARE_WM_23 "mediatek/mt7996/mt7992_wm_23.bin"
|
||||
#define MT7992_FIRMWARE_DSP_23 "mediatek/mt7996/mt7992_dsp_23.bin"
|
||||
#define MT7992_ROM_PATCH_23 "mediatek/mt7996/mt7992_rom_patch_23.bin"
|
||||
|
||||
#define MT7996_EEPROM_DEFAULT "mediatek/mt7996/mt7996_eeprom.bin"
|
||||
#define MT7996_EEPROM_DEFAULT_INT "mediatek/mt7996/mt7996_eeprom_2i5i6i.bin"
|
||||
#define MT7996_EEPROM_DEFAULT_233 "mediatek/mt7996/mt7996_eeprom_233.bin"
|
||||
#define MT7996_EEPROM_DEFAULT_233_INT "mediatek/mt7996/mt7996_eeprom_233_2i5i6i.bin"
|
||||
|
||||
#define MT7992_EEPROM_DEFAULT "mediatek/mt7996/mt7992_eeprom.bin"
|
||||
#define MT7992_EEPROM_DEFAULT_INT "mediatek/mt7996/mt7992_eeprom_2i5i.bin"
|
||||
#define MT7992_EEPROM_DEFAULT_MIX "mediatek/mt7996/mt7992_eeprom_2i5e.bin"
|
||||
#define MT7992_EEPROM_DEFAULT_23 "mediatek/mt7996/mt7992_eeprom_23.bin"
|
||||
#define MT7992_EEPROM_DEFAULT_23_INT "mediatek/mt7996/mt7992_eeprom_23_2i5i.bin"
|
||||
|
||||
#define MT7996_EEPROM_SIZE 7680
|
||||
#define MT7996_EEPROM_BLOCK_SIZE 16
|
||||
#define MT7996_TOKEN_SIZE 16384
|
||||
|
|
@ -95,6 +114,22 @@ enum mt7996_ram_type {
|
|||
MT7996_RAM_TYPE_DSP,
|
||||
};
|
||||
|
||||
enum mt7996_var_type {
|
||||
MT7996_VAR_TYPE_444,
|
||||
MT7996_VAR_TYPE_233,
|
||||
};
|
||||
|
||||
enum mt7992_var_type {
|
||||
MT7992_VAR_TYPE_44,
|
||||
MT7992_VAR_TYPE_23,
|
||||
};
|
||||
|
||||
enum mt7996_fem_type {
|
||||
MT7996_FEM_EXT,
|
||||
MT7996_FEM_INT,
|
||||
MT7996_FEM_MIX,
|
||||
};
|
||||
|
||||
enum mt7996_txq_id {
|
||||
MT7996_TXQ_FWDL = 16,
|
||||
MT7996_TXQ_MCU_WM,
|
||||
|
|
@ -329,6 +364,10 @@ struct mt7996_dev {
|
|||
spinlock_t reg_lock;
|
||||
|
||||
u8 wtbl_size_group;
|
||||
struct {
|
||||
u8 type:4;
|
||||
u8 fem:4;
|
||||
} var;
|
||||
};
|
||||
|
||||
enum {
|
||||
|
|
@ -405,12 +444,7 @@ mt7996_band_valid(struct mt7996_dev *dev, u8 band)
|
|||
if (is_mt7992(&dev->mt76))
|
||||
return band <= MT_BAND1;
|
||||
|
||||
/* tri-band support */
|
||||
if (band <= MT_BAND2 &&
|
||||
mt76_get_field(dev, MT_PAD_GPIO, MT_PAD_GPIO_ADIE_COMB) <= 1)
|
||||
return true;
|
||||
|
||||
return band == MT_BAND0 || band == MT_BAND2;
|
||||
return band <= MT_BAND2;
|
||||
}
|
||||
|
||||
extern const struct ieee80211_ops mt7996_ops;
|
||||
|
|
|
|||
|
|
@ -660,8 +660,17 @@ enum offs_rev {
|
|||
#define MT_TOP_MISC MT_TOP(0xf0)
|
||||
#define MT_TOP_MISC_FW_STATE GENMASK(2, 0)
|
||||
|
||||
/* ADIE */
|
||||
#define MT_ADIE_CHIP_ID(_idx) (0x0f00002c + ((_idx) << 28))
|
||||
#define MT_ADIE_VERSION_MASK GENMASK(15, 0)
|
||||
#define MT_ADIE_CHIP_ID_MASK GENMASK(31, 16)
|
||||
|
||||
#define MT_PAD_GPIO 0x700056f0
|
||||
#define MT_PAD_GPIO_ADIE_COMB GENMASK(16, 15)
|
||||
#define MT_PAD_GPIO_2ADIE_TBTC BIT(19)
|
||||
/* for mt7992 */
|
||||
#define MT_PAD_GPIO_ADIE_COMB_7992 GENMASK(17, 16)
|
||||
#define MT_PAD_GPIO_ADIE_SINGLE BIT(15)
|
||||
|
||||
#define MT_HW_REV 0x70010204
|
||||
#define MT_HW_REV1 0x8a00
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user