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arm64: dts: mediatek: Add CPU Idle support
MT8365 has 3 CPU Idle states: - MCDI_CPU. (Multi-Core-Deep-Idle) - MCDI_CLUSTER. - DPIDLE. (Deep-Idle) Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20230203-evk-board-support-v8-10-7019f3fd0adf@baylibre.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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@ -128,6 +128,7 @@ cpu0: cpu@0 {
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reg = <0x0>;
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#cooling-cells = <2>;
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enable-method = "psci";
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cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>;
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i-cache-size = <0x8000>;
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i-cache-line-size = <64>;
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i-cache-sets = <256>;
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@ -147,6 +148,7 @@ cpu1: cpu@1 {
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reg = <0x1>;
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#cooling-cells = <2>;
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enable-method = "psci";
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cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>;
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i-cache-size = <0x8000>;
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i-cache-line-size = <64>;
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i-cache-sets = <256>;
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@ -166,6 +168,7 @@ cpu2: cpu@2 {
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reg = <0x2>;
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#cooling-cells = <2>;
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enable-method = "psci";
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cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>;
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i-cache-size = <0x8000>;
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i-cache-line-size = <64>;
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i-cache-sets = <256>;
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@ -185,6 +188,7 @@ cpu3: cpu@3 {
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reg = <0x3>;
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#cooling-cells = <2>;
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enable-method = "psci";
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cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>;
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i-cache-size = <0x8000>;
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i-cache-line-size = <64>;
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i-cache-sets = <256>;
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@ -198,6 +202,37 @@ cpu3: cpu@3 {
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operating-points-v2 = <&cluster0_opp>;
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};
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idle-states {
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entry-method = "psci";
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CPU_MCDI: cpu-mcdi {
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compatible = "arm,idle-state";
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local-timer-stop;
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arm,psci-suspend-param = <0x00010001>;
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entry-latency-us = <300>;
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exit-latency-us = <200>;
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min-residency-us = <1000>;
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};
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CLUSTER_MCDI: cluster-mcdi {
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compatible = "arm,idle-state";
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local-timer-stop;
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arm,psci-suspend-param = <0x01010001>;
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entry-latency-us = <350>;
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exit-latency-us = <250>;
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min-residency-us = <1200>;
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};
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CLUSTER_DPIDLE: cluster-dpidle {
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compatible = "arm,idle-state";
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local-timer-stop;
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arm,psci-suspend-param = <0x01010004>;
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entry-latency-us = <300>;
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exit-latency-us = <800>;
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min-residency-us = <3300>;
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};
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};
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l2: l2-cache {
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compatible = "cache";
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cache-level = <2>;
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