arm_mpam: propagate MSC access errors for msmon helpers

Allow the helper functions for msmon accesses to return an error, and
propagate read and write errors from the lower level up.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
Reviewed-by: Ben Horgan <ben.horgan@arm.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Tested-by: Gavin Shan <gshan@redhat.com> # on NVIDIA Grace Hopper
Tested-by: Ritwick Sharma <ritwick.sharma@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
This commit is contained in:
Andre Przywara 2026-10-01 17:34:29 +02:00 committed by James Morse
parent 7ec57e8b75
commit e8166b1139

View File

@ -1177,15 +1177,20 @@ static int mpam_msc_read_mbwu_l(struct mpam_msc *msc, u64 *res)
return 0;
}
static void mpam_msc_zero_mbwu_l(struct mpam_msc *msc)
static int mpam_msc_zero_mbwu_l(struct mpam_msc *msc)
{
int ret;
mpam_mon_sel_lock_held(msc);
WARN_ON_ONCE((MSMON_MBWU_L + sizeof(u64)) > msc->mapped_hwpage_sz);
WARN_ON_ONCE(!cpumask_test_cpu(smp_processor_id(), &msc->accessibility));
__mpam_write_reg(msc, MSMON_MBWU_L, 0);
__mpam_write_reg(msc, MSMON_MBWU_L + 4, 0);
ret = __mpam_write_reg(msc, MSMON_MBWU_L, 0);
if (ret)
return ret;
return __mpam_write_reg(msc, MSMON_MBWU_L + 4, 0);
}
static void gen_msmon_ctl_flt_vals(struct mon_read *m, u32 *ctl_val,
@ -1228,24 +1233,28 @@ static void gen_msmon_ctl_flt_vals(struct mon_read *m, u32 *ctl_val,
}
}
static void read_msmon_ctl_flt_vals(struct mon_read *m, u32 *ctl_val,
u32 *flt_val)
static int read_msmon_ctl_flt_vals(struct mon_read *m, u32 *ctl_val,
u32 *flt_val)
{
struct mpam_msc *msc = m->ris->vmsc->msc;
int ret;
switch (m->type) {
case mpam_feat_msmon_csu:
mpam_read_monsel_reg(msc, CFG_CSU_CTL, ctl_val);
mpam_read_monsel_reg(msc, CFG_CSU_FLT, flt_val);
break;
ret = mpam_read_monsel_reg(msc, CFG_CSU_CTL, ctl_val);
if (ret)
return ret;
return mpam_read_monsel_reg(msc, CFG_CSU_FLT, flt_val);
case mpam_feat_msmon_mbwu_31counter:
case mpam_feat_msmon_mbwu_44counter:
case mpam_feat_msmon_mbwu_63counter:
mpam_read_monsel_reg(msc, CFG_MBWU_CTL, ctl_val);
mpam_read_monsel_reg(msc, CFG_MBWU_FLT, flt_val);
break;
ret = mpam_read_monsel_reg(msc, CFG_MBWU_CTL, ctl_val);
if (ret)
return ret;
return mpam_read_monsel_reg(msc, CFG_MBWU_FLT, flt_val);
default:
pr_warn("Unexpected monitor type %d\n", m->type);
return -EINVAL;
}
}
@ -1258,10 +1267,11 @@ static inline void clean_msmon_ctl_val(u32 *cur_ctl)
*cur_ctl &= ~MSMON_CFG_MBWU_CTL_OFLOW_STATUS_L;
}
static void write_msmon_ctl_flt_vals(struct mon_read *m, u32 ctl_val,
u32 flt_val)
static int write_msmon_ctl_flt_vals(struct mon_read *m, u32 ctl_val,
u32 flt_val)
{
struct mpam_msc *msc = m->ris->vmsc->msc;
int ret;
/*
* Write the ctl_val with the enable bit cleared, reset the counter,
@ -1269,25 +1279,37 @@ static void write_msmon_ctl_flt_vals(struct mon_read *m, u32 ctl_val,
*/
switch (m->type) {
case mpam_feat_msmon_csu:
mpam_write_monsel_reg(msc, CFG_CSU_FLT, flt_val);
mpam_write_monsel_reg(msc, CFG_CSU_CTL, ctl_val);
mpam_write_monsel_reg(msc, CSU, 0);
mpam_write_monsel_reg(msc, CFG_CSU_CTL, ctl_val | MSMON_CFG_x_CTL_EN);
break;
ret = mpam_write_monsel_reg(msc, CFG_CSU_FLT, flt_val);
if (ret)
return ret;
ret = mpam_write_monsel_reg(msc, CFG_CSU_CTL, ctl_val);
if (ret)
return ret;
ret = mpam_write_monsel_reg(msc, CSU, 0);
if (ret)
return ret;
return mpam_write_monsel_reg(msc, CFG_CSU_CTL, ctl_val | MSMON_CFG_x_CTL_EN);
case mpam_feat_msmon_mbwu_31counter:
case mpam_feat_msmon_mbwu_44counter:
case mpam_feat_msmon_mbwu_63counter:
mpam_write_monsel_reg(msc, CFG_MBWU_FLT, flt_val);
mpam_write_monsel_reg(msc, CFG_MBWU_CTL, ctl_val);
mpam_write_monsel_reg(msc, CFG_MBWU_CTL, ctl_val | MSMON_CFG_x_CTL_EN);
ret = mpam_write_monsel_reg(msc, CFG_MBWU_FLT, flt_val);
if (ret)
return ret;
ret = mpam_write_monsel_reg(msc, CFG_MBWU_CTL, ctl_val);
if (ret)
return ret;
ret = mpam_write_monsel_reg(msc, CFG_MBWU_CTL,
ctl_val | MSMON_CFG_x_CTL_EN);
if (ret)
return ret;
/* Counting monitors require NRDY to be reset by software */
if (m->type == mpam_feat_msmon_mbwu_31counter)
mpam_write_monsel_reg(msc, MBWU, 0);
else
mpam_msc_zero_mbwu_l(m->ris->vmsc->msc);
break;
return mpam_write_monsel_reg(msc, MBWU, 0);
return mpam_msc_zero_mbwu_l(m->ris->vmsc->msc);
default:
pr_warn("Unexpected monitor type %d\n", m->type);
return -EINVAL;
}
}