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drm/xe/xe3p_xpc: XeCore mask spans four registers

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On Xe3p_XPC, there are now four registers reserved to express the XeCore
mask rather than just three. Define the new registers and update the IP
descriptor accordingly.

Note that this only applies to Xe3p_XPC for now; Xe3p_LPG still only
uses three registers to express the mask.

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://patch.msgid.link/20260205214139.48515-4-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
This commit is contained in:
Matt Roper 2026-02-05 13:41:41 -08:00
parent 6acf3d3ed6
commit e8100643ff
4 changed files with 7 additions and 3 deletions
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2
drivers/gpu/drm/xe/regs/xe_gt_regs.h
View File

@ -253,6 +253,8 @@
#define XE2_GT_COMPUTE_DSS_2 XE_REG(0x914c)
#define XE2_GT_GEOMETRY_DSS_1 XE_REG(0x9150)
#define XE2_GT_GEOMETRY_DSS_2 XE_REG(0x9154)
#define XE3P_XPC_GT_GEOMETRY_DSS_3 XE_REG(0x915c)
#define XE3P_XPC_GT_COMPUTE_DSS_3 XE_REG(0x9160)
#define SERVICE_COPY_ENABLE XE_REG(0x9170)
#define FUSE_SERVICE_COPY_ENABLE_MASK REG_GENMASK(7, 0)

2
drivers/gpu/drm/xe/xe_gt_topology.c
View File

@ -212,11 +212,13 @@ xe_gt_topology_init(struct xe_gt *gt)
XELP_GT_GEOMETRY_DSS_ENABLE,
XE2_GT_GEOMETRY_DSS_1,
XE2_GT_GEOMETRY_DSS_2,
XE3P_XPC_GT_GEOMETRY_DSS_3,
};
static const struct xe_reg compute_regs[] = {
XEHP_GT_COMPUTE_DSS_ENABLE,
XEHPC_GT_COMPUTE_DSS_ENABLE_EXT,
XE2_GT_COMPUTE_DSS_2,
XE3P_XPC_GT_COMPUTE_DSS_3,
};
struct drm_printer p;

2
drivers/gpu/drm/xe/xe_gt_types.h
View File

@ -35,7 +35,7 @@ enum xe_gt_eu_type {
XE_GT_EU_TYPE_SIMD16,
};
#define XE_MAX_DSS_FUSE_REGS 3
#define XE_MAX_DSS_FUSE_REGS 4
#define XE_MAX_DSS_FUSE_BITS (32 * XE_MAX_DSS_FUSE_REGS)
#define XE_MAX_EU_FUSE_REGS 1
#define XE_MAX_EU_FUSE_BITS (32 * XE_MAX_EU_FUSE_REGS)

4
drivers/gpu/drm/xe/xe_pci.c
View File

@ -122,8 +122,8 @@ static const struct xe_graphics_desc graphics_xe3p_xpc = {
GENMASK(XE_HW_ENGINE_CCS3, XE_HW_ENGINE_CCS0),
.multi_queue_engine_class_mask = BIT(XE_ENGINE_CLASS_COPY) |
BIT(XE_ENGINE_CLASS_COMPUTE),
.num_geometry_xecore_fuse_regs = 3,
.num_compute_xecore_fuse_regs = 3,
.num_geometry_xecore_fuse_regs = 4,
.num_compute_xecore_fuse_regs = 4,
};
static const struct xe_media_desc media_xem = {