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ASoC: cs530x: Correct MCLK reference frequency values
The MCLK frequency must be 49.152 MHz (for 48 kHz-related sample rates) or 45.1584 MHz (for 44.1 kHz-related sample rates). Signed-off-by: Vitaly Rodionov <vitalyr@opensource.cirrus.com> Link: https://patch.msgid.link/20251023090327.58275-10-vitalyr@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -1100,9 +1100,12 @@ static int cs530x_set_sysclk(struct snd_soc_component *component, int clk_id,
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switch (source) {
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case CS530X_SYSCLK_SRC_MCLK:
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if (freq != 24560000 && freq != 22572000) {
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dev_err(component->dev, "Invalid MCLK source rate %d\n",
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freq);
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switch (freq) {
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case CS530X_SYSCLK_REF_45_1MHZ:
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case CS530X_SYSCLK_REF_49_1MHZ:
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break;
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default:
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dev_err(component->dev, "Invalid MCLK source rate %d\n", freq);
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return -EINVAL;
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}
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break;
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@ -200,6 +200,12 @@
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/* IN_VOL_CTL5 and OUT_VOL_CTL5 */
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#define CS530X_INOUT_VU BIT(0)
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/* MCLK Reference Source Frequency */
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/* 41KHz related */
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#define CS530X_SYSCLK_REF_45_1MHZ 45158400
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/* 48KHz related */
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#define CS530X_SYSCLK_REF_49_1MHZ 49152000
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/* System Clock Source */
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#define CS530X_SYSCLK_SRC_MCLK 0
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#define CS530X_SYSCLK_SRC_PLL 1
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