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https://github.com/torvalds/linux.git
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KVM: x86: Fold irq_comm.c into irq.c
Drop irq_comm.c, a.k.a. common IRQ APIs, as there has been no non-x86 user
since commit 003f7de625 ("KVM: ia64: remove") (at the time, irq_comm.c
lived in virt/kvm, not arch/x86/kvm).
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Kai Huang <kai.huang@intel.com>
Link: https://lore.kernel.org/r/20250611213557.294358-19-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
This commit is contained in:
Sean Christopherson
parent
37b1761fe8
commit
e76c274513
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@ -5,10 +5,8 @@ ccflags-$(CONFIG_KVM_WERROR) += -Werror
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include $(srctree)/virt/kvm/Makefile.kvm
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kvm-y += x86.o emulate.o irq.o lapic.o \
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irq_comm.o cpuid.o pmu.o mtrr.o \
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debugfs.o mmu/mmu.o mmu/page_track.o \
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mmu/spte.o
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kvm-y += x86.o emulate.o irq.o lapic.o cpuid.o pmu.o mtrr.o \
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debugfs.o mmu/mmu.o mmu/page_track.o mmu/spte.o
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kvm-$(CONFIG_X86_64) += mmu/tdp_iter.o mmu/tdp_mmu.o
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kvm-$(CONFIG_KVM_IOAPIC) += i8259.o i8254.o ioapic.o
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@ -12,9 +12,10 @@
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#include <linux/export.h>
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#include <linux/kvm_host.h>
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#include "hyperv.h"
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#include "ioapic.h"
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#include "irq.h"
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#include "i8254.h"
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#include "trace.h"
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#include "x86.h"
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#include "xen.h"
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@ -193,6 +194,307 @@ bool kvm_arch_irqchip_in_kernel(struct kvm *kvm)
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return irqchip_in_kernel(kvm);
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}
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int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
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struct kvm_lapic_irq *irq, struct dest_map *dest_map)
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{
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int r = -1;
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struct kvm_vcpu *vcpu, *lowest = NULL;
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unsigned long i, dest_vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)];
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unsigned int dest_vcpus = 0;
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if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
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return r;
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if (irq->dest_mode == APIC_DEST_PHYSICAL &&
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irq->dest_id == 0xff && kvm_lowest_prio_delivery(irq)) {
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pr_info("apic: phys broadcast and lowest prio\n");
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irq->delivery_mode = APIC_DM_FIXED;
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}
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memset(dest_vcpu_bitmap, 0, sizeof(dest_vcpu_bitmap));
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kvm_for_each_vcpu(i, vcpu, kvm) {
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if (!kvm_apic_present(vcpu))
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continue;
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if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
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irq->dest_id, irq->dest_mode))
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continue;
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if (!kvm_lowest_prio_delivery(irq)) {
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if (r < 0)
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r = 0;
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r += kvm_apic_set_irq(vcpu, irq, dest_map);
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} else if (kvm_apic_sw_enabled(vcpu->arch.apic)) {
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if (!kvm_vector_hashing_enabled()) {
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if (!lowest)
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lowest = vcpu;
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else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
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lowest = vcpu;
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} else {
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__set_bit(i, dest_vcpu_bitmap);
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dest_vcpus++;
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}
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}
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}
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if (dest_vcpus != 0) {
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int idx = kvm_vector_to_index(irq->vector, dest_vcpus,
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dest_vcpu_bitmap, KVM_MAX_VCPUS);
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lowest = kvm_get_vcpu(kvm, idx);
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}
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if (lowest)
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r = kvm_apic_set_irq(lowest, irq, dest_map);
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return r;
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}
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void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
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struct kvm_lapic_irq *irq)
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{
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struct msi_msg msg = { .address_lo = e->msi.address_lo,
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.address_hi = e->msi.address_hi,
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.data = e->msi.data };
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trace_kvm_msi_set_irq(msg.address_lo | (kvm->arch.x2apic_format ?
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(u64)msg.address_hi << 32 : 0), msg.data);
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irq->dest_id = x86_msi_msg_get_destid(&msg, kvm->arch.x2apic_format);
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irq->vector = msg.arch_data.vector;
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irq->dest_mode = kvm_lapic_irq_dest_mode(msg.arch_addr_lo.dest_mode_logical);
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irq->trig_mode = msg.arch_data.is_level;
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irq->delivery_mode = msg.arch_data.delivery_mode << 8;
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irq->msi_redir_hint = msg.arch_addr_lo.redirect_hint;
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irq->level = 1;
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irq->shorthand = APIC_DEST_NOSHORT;
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}
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EXPORT_SYMBOL_GPL(kvm_set_msi_irq);
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static inline bool kvm_msi_route_invalid(struct kvm *kvm,
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struct kvm_kernel_irq_routing_entry *e)
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{
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return kvm->arch.x2apic_format && (e->msi.address_hi & 0xff);
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}
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int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
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struct kvm *kvm, int irq_source_id, int level, bool line_status)
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{
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struct kvm_lapic_irq irq;
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if (kvm_msi_route_invalid(kvm, e))
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return -EINVAL;
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if (!level)
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return -1;
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kvm_set_msi_irq(kvm, e, &irq);
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return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL);
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}
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int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e,
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struct kvm *kvm, int irq_source_id, int level,
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bool line_status)
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{
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struct kvm_lapic_irq irq;
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int r;
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switch (e->type) {
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#ifdef CONFIG_KVM_HYPERV
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case KVM_IRQ_ROUTING_HV_SINT:
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return kvm_hv_synic_set_irq(e, kvm, irq_source_id, level,
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line_status);
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#endif
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case KVM_IRQ_ROUTING_MSI:
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if (kvm_msi_route_invalid(kvm, e))
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return -EINVAL;
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kvm_set_msi_irq(kvm, e, &irq);
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if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
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return r;
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break;
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#ifdef CONFIG_KVM_XEN
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case KVM_IRQ_ROUTING_XEN_EVTCHN:
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if (!level)
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return -1;
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return kvm_xen_set_evtchn_fast(&e->xen_evtchn, kvm);
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#endif
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default:
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break;
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}
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return -EWOULDBLOCK;
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}
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bool kvm_arch_can_set_irq_routing(struct kvm *kvm)
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{
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return irqchip_in_kernel(kvm);
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}
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int kvm_set_routing_entry(struct kvm *kvm,
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struct kvm_kernel_irq_routing_entry *e,
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const struct kvm_irq_routing_entry *ue)
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{
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/* We can't check irqchip_in_kernel() here as some callers are
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* currently initializing the irqchip. Other callers should therefore
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* check kvm_arch_can_set_irq_routing() before calling this function.
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*/
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switch (ue->type) {
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#ifdef CONFIG_KVM_IOAPIC
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case KVM_IRQ_ROUTING_IRQCHIP:
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if (irqchip_split(kvm))
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return -EINVAL;
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e->irqchip.pin = ue->u.irqchip.pin;
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switch (ue->u.irqchip.irqchip) {
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case KVM_IRQCHIP_PIC_SLAVE:
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e->irqchip.pin += PIC_NUM_PINS / 2;
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fallthrough;
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case KVM_IRQCHIP_PIC_MASTER:
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if (ue->u.irqchip.pin >= PIC_NUM_PINS / 2)
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return -EINVAL;
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e->set = kvm_pic_set_irq;
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break;
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case KVM_IRQCHIP_IOAPIC:
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if (ue->u.irqchip.pin >= KVM_IOAPIC_NUM_PINS)
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return -EINVAL;
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e->set = kvm_ioapic_set_irq;
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break;
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default:
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return -EINVAL;
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}
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e->irqchip.irqchip = ue->u.irqchip.irqchip;
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break;
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#endif
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case KVM_IRQ_ROUTING_MSI:
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e->set = kvm_set_msi;
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e->msi.address_lo = ue->u.msi.address_lo;
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e->msi.address_hi = ue->u.msi.address_hi;
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e->msi.data = ue->u.msi.data;
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if (kvm_msi_route_invalid(kvm, e))
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return -EINVAL;
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break;
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#ifdef CONFIG_KVM_HYPERV
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case KVM_IRQ_ROUTING_HV_SINT:
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e->set = kvm_hv_synic_set_irq;
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e->hv_sint.vcpu = ue->u.hv_sint.vcpu;
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e->hv_sint.sint = ue->u.hv_sint.sint;
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break;
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#endif
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#ifdef CONFIG_KVM_XEN
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case KVM_IRQ_ROUTING_XEN_EVTCHN:
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return kvm_xen_setup_evtchn(kvm, e, ue);
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#endif
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default:
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return -EINVAL;
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}
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return 0;
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}
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bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
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struct kvm_vcpu **dest_vcpu)
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{
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int r = 0;
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unsigned long i;
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struct kvm_vcpu *vcpu;
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if (kvm_intr_is_single_vcpu_fast(kvm, irq, dest_vcpu))
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return true;
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kvm_for_each_vcpu(i, vcpu, kvm) {
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if (!kvm_apic_present(vcpu))
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continue;
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if (!kvm_apic_match_dest(vcpu, NULL, irq->shorthand,
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irq->dest_id, irq->dest_mode))
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continue;
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if (++r == 2)
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return false;
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*dest_vcpu = vcpu;
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}
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return r == 1;
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}
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EXPORT_SYMBOL_GPL(kvm_intr_is_single_vcpu);
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void kvm_scan_ioapic_irq(struct kvm_vcpu *vcpu, u32 dest_id, u16 dest_mode,
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u8 vector, unsigned long *ioapic_handled_vectors)
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{
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/*
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* Intercept EOI if the vCPU is the target of the new IRQ routing, or
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* the vCPU has a pending IRQ from the old routing, i.e. if the vCPU
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* may receive a level-triggered IRQ in the future, or already received
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* level-triggered IRQ. The EOI needs to be intercepted and forwarded
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* to I/O APIC emulation so that the IRQ can be de-asserted.
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*/
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if (kvm_apic_match_dest(vcpu, NULL, APIC_DEST_NOSHORT, dest_id, dest_mode)) {
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__set_bit(vector, ioapic_handled_vectors);
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} else if (kvm_apic_pending_eoi(vcpu, vector)) {
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__set_bit(vector, ioapic_handled_vectors);
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/*
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* Track the highest pending EOI for which the vCPU is NOT the
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* target in the new routing. Only the EOI for the IRQ that is
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* in-flight (for the old routing) needs to be intercepted, any
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* future IRQs that arrive on this vCPU will be coincidental to
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* the level-triggered routing and don't need to be intercepted.
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*/
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if ((int)vector > vcpu->arch.highest_stale_pending_ioapic_eoi)
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vcpu->arch.highest_stale_pending_ioapic_eoi = vector;
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}
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}
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void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu,
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ulong *ioapic_handled_vectors)
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{
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struct kvm *kvm = vcpu->kvm;
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struct kvm_kernel_irq_routing_entry *entry;
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struct kvm_irq_routing_table *table;
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u32 i, nr_ioapic_pins;
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int idx;
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idx = srcu_read_lock(&kvm->irq_srcu);
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table = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);
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nr_ioapic_pins = min_t(u32, table->nr_rt_entries,
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kvm->arch.nr_reserved_ioapic_pins);
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for (i = 0; i < nr_ioapic_pins; ++i) {
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hlist_for_each_entry(entry, &table->map[i], link) {
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struct kvm_lapic_irq irq;
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if (entry->type != KVM_IRQ_ROUTING_MSI)
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continue;
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kvm_set_msi_irq(vcpu->kvm, entry, &irq);
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if (!irq.trig_mode)
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continue;
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kvm_scan_ioapic_irq(vcpu, irq.dest_id, irq.dest_mode,
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irq.vector, ioapic_handled_vectors);
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}
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}
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srcu_read_unlock(&kvm->irq_srcu, idx);
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}
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void kvm_arch_irq_routing_update(struct kvm *kvm)
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{
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#ifdef CONFIG_KVM_HYPERV
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kvm_hv_irq_routing_update(kvm);
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#endif
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if (irqchip_split(kvm))
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kvm_make_scan_ioapic_request(kvm);
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}
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#ifdef CONFIG_KVM_IOAPIC
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#define IOAPIC_ROUTING_ENTRY(irq) \
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{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
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@ -1,325 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* irq_comm.c: Common API for in kernel interrupt controller
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* Copyright (c) 2007, Intel Corporation.
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*
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* Authors:
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* Yaozu (Eddie) Dong <Eddie.dong@intel.com>
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*
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* Copyright 2010 Red Hat, Inc. and/or its affiliates.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/kvm_host.h>
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#include <linux/slab.h>
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#include <linux/export.h>
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#include <linux/rculist.h>
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#include "hyperv.h"
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#include "ioapic.h"
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#include "irq.h"
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#include "lapic.h"
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#include "trace.h"
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#include "x86.h"
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#include "xen.h"
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int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
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struct kvm_lapic_irq *irq, struct dest_map *dest_map)
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{
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int r = -1;
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struct kvm_vcpu *vcpu, *lowest = NULL;
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unsigned long i, dest_vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)];
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unsigned int dest_vcpus = 0;
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if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
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return r;
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if (irq->dest_mode == APIC_DEST_PHYSICAL &&
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irq->dest_id == 0xff && kvm_lowest_prio_delivery(irq)) {
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pr_info("apic: phys broadcast and lowest prio\n");
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irq->delivery_mode = APIC_DM_FIXED;
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}
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memset(dest_vcpu_bitmap, 0, sizeof(dest_vcpu_bitmap));
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kvm_for_each_vcpu(i, vcpu, kvm) {
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if (!kvm_apic_present(vcpu))
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continue;
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if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
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irq->dest_id, irq->dest_mode))
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continue;
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if (!kvm_lowest_prio_delivery(irq)) {
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if (r < 0)
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r = 0;
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r += kvm_apic_set_irq(vcpu, irq, dest_map);
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} else if (kvm_apic_sw_enabled(vcpu->arch.apic)) {
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if (!kvm_vector_hashing_enabled()) {
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if (!lowest)
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lowest = vcpu;
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else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
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lowest = vcpu;
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} else {
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__set_bit(i, dest_vcpu_bitmap);
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dest_vcpus++;
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}
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}
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}
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if (dest_vcpus != 0) {
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int idx = kvm_vector_to_index(irq->vector, dest_vcpus,
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dest_vcpu_bitmap, KVM_MAX_VCPUS);
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lowest = kvm_get_vcpu(kvm, idx);
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}
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if (lowest)
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r = kvm_apic_set_irq(lowest, irq, dest_map);
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return r;
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}
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void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
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struct kvm_lapic_irq *irq)
|
||||
{
|
||||
struct msi_msg msg = { .address_lo = e->msi.address_lo,
|
||||
.address_hi = e->msi.address_hi,
|
||||
.data = e->msi.data };
|
||||
|
||||
trace_kvm_msi_set_irq(msg.address_lo | (kvm->arch.x2apic_format ?
|
||||
(u64)msg.address_hi << 32 : 0), msg.data);
|
||||
|
||||
irq->dest_id = x86_msi_msg_get_destid(&msg, kvm->arch.x2apic_format);
|
||||
irq->vector = msg.arch_data.vector;
|
||||
irq->dest_mode = kvm_lapic_irq_dest_mode(msg.arch_addr_lo.dest_mode_logical);
|
||||
irq->trig_mode = msg.arch_data.is_level;
|
||||
irq->delivery_mode = msg.arch_data.delivery_mode << 8;
|
||||
irq->msi_redir_hint = msg.arch_addr_lo.redirect_hint;
|
||||
irq->level = 1;
|
||||
irq->shorthand = APIC_DEST_NOSHORT;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(kvm_set_msi_irq);
|
||||
|
||||
static inline bool kvm_msi_route_invalid(struct kvm *kvm,
|
||||
struct kvm_kernel_irq_routing_entry *e)
|
||||
{
|
||||
return kvm->arch.x2apic_format && (e->msi.address_hi & 0xff);
|
||||
}
|
||||
|
||||
int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
|
||||
struct kvm *kvm, int irq_source_id, int level, bool line_status)
|
||||
{
|
||||
struct kvm_lapic_irq irq;
|
||||
|
||||
if (kvm_msi_route_invalid(kvm, e))
|
||||
return -EINVAL;
|
||||
|
||||
if (!level)
|
||||
return -1;
|
||||
|
||||
kvm_set_msi_irq(kvm, e, &irq);
|
||||
|
||||
return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL);
|
||||
}
|
||||
|
||||
int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e,
|
||||
struct kvm *kvm, int irq_source_id, int level,
|
||||
bool line_status)
|
||||
{
|
||||
struct kvm_lapic_irq irq;
|
||||
int r;
|
||||
|
||||
switch (e->type) {
|
||||
#ifdef CONFIG_KVM_HYPERV
|
||||
case KVM_IRQ_ROUTING_HV_SINT:
|
||||
return kvm_hv_synic_set_irq(e, kvm, irq_source_id, level,
|
||||
line_status);
|
||||
#endif
|
||||
|
||||
case KVM_IRQ_ROUTING_MSI:
|
||||
if (kvm_msi_route_invalid(kvm, e))
|
||||
return -EINVAL;
|
||||
|
||||
kvm_set_msi_irq(kvm, e, &irq);
|
||||
|
||||
if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
|
||||
return r;
|
||||
break;
|
||||
|
||||
#ifdef CONFIG_KVM_XEN
|
||||
case KVM_IRQ_ROUTING_XEN_EVTCHN:
|
||||
if (!level)
|
||||
return -1;
|
||||
|
||||
return kvm_xen_set_evtchn_fast(&e->xen_evtchn, kvm);
|
||||
#endif
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return -EWOULDBLOCK;
|
||||
}
|
||||
|
||||
bool kvm_arch_can_set_irq_routing(struct kvm *kvm)
|
||||
{
|
||||
return irqchip_in_kernel(kvm);
|
||||
}
|
||||
|
||||
int kvm_set_routing_entry(struct kvm *kvm,
|
||||
struct kvm_kernel_irq_routing_entry *e,
|
||||
const struct kvm_irq_routing_entry *ue)
|
||||
{
|
||||
/* We can't check irqchip_in_kernel() here as some callers are
|
||||
* currently initializing the irqchip. Other callers should therefore
|
||||
* check kvm_arch_can_set_irq_routing() before calling this function.
|
||||
*/
|
||||
switch (ue->type) {
|
||||
#ifdef CONFIG_KVM_IOAPIC
|
||||
case KVM_IRQ_ROUTING_IRQCHIP:
|
||||
if (irqchip_split(kvm))
|
||||
return -EINVAL;
|
||||
e->irqchip.pin = ue->u.irqchip.pin;
|
||||
switch (ue->u.irqchip.irqchip) {
|
||||
case KVM_IRQCHIP_PIC_SLAVE:
|
||||
e->irqchip.pin += PIC_NUM_PINS / 2;
|
||||
fallthrough;
|
||||
case KVM_IRQCHIP_PIC_MASTER:
|
||||
if (ue->u.irqchip.pin >= PIC_NUM_PINS / 2)
|
||||
return -EINVAL;
|
||||
e->set = kvm_pic_set_irq;
|
||||
break;
|
||||
case KVM_IRQCHIP_IOAPIC:
|
||||
if (ue->u.irqchip.pin >= KVM_IOAPIC_NUM_PINS)
|
||||
return -EINVAL;
|
||||
e->set = kvm_ioapic_set_irq;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
e->irqchip.irqchip = ue->u.irqchip.irqchip;
|
||||
break;
|
||||
#endif
|
||||
case KVM_IRQ_ROUTING_MSI:
|
||||
e->set = kvm_set_msi;
|
||||
e->msi.address_lo = ue->u.msi.address_lo;
|
||||
e->msi.address_hi = ue->u.msi.address_hi;
|
||||
e->msi.data = ue->u.msi.data;
|
||||
|
||||
if (kvm_msi_route_invalid(kvm, e))
|
||||
return -EINVAL;
|
||||
break;
|
||||
#ifdef CONFIG_KVM_HYPERV
|
||||
case KVM_IRQ_ROUTING_HV_SINT:
|
||||
e->set = kvm_hv_synic_set_irq;
|
||||
e->hv_sint.vcpu = ue->u.hv_sint.vcpu;
|
||||
e->hv_sint.sint = ue->u.hv_sint.sint;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_KVM_XEN
|
||||
case KVM_IRQ_ROUTING_XEN_EVTCHN:
|
||||
return kvm_xen_setup_evtchn(kvm, e, ue);
|
||||
#endif
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
|
||||
struct kvm_vcpu **dest_vcpu)
|
||||
{
|
||||
int r = 0;
|
||||
unsigned long i;
|
||||
struct kvm_vcpu *vcpu;
|
||||
|
||||
if (kvm_intr_is_single_vcpu_fast(kvm, irq, dest_vcpu))
|
||||
return true;
|
||||
|
||||
kvm_for_each_vcpu(i, vcpu, kvm) {
|
||||
if (!kvm_apic_present(vcpu))
|
||||
continue;
|
||||
|
||||
if (!kvm_apic_match_dest(vcpu, NULL, irq->shorthand,
|
||||
irq->dest_id, irq->dest_mode))
|
||||
continue;
|
||||
|
||||
if (++r == 2)
|
||||
return false;
|
||||
|
||||
*dest_vcpu = vcpu;
|
||||
}
|
||||
|
||||
return r == 1;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(kvm_intr_is_single_vcpu);
|
||||
|
||||
void kvm_scan_ioapic_irq(struct kvm_vcpu *vcpu, u32 dest_id, u16 dest_mode,
|
||||
u8 vector, unsigned long *ioapic_handled_vectors)
|
||||
{
|
||||
/*
|
||||
* Intercept EOI if the vCPU is the target of the new IRQ routing, or
|
||||
* the vCPU has a pending IRQ from the old routing, i.e. if the vCPU
|
||||
* may receive a level-triggered IRQ in the future, or already received
|
||||
* level-triggered IRQ. The EOI needs to be intercepted and forwarded
|
||||
* to I/O APIC emulation so that the IRQ can be de-asserted.
|
||||
*/
|
||||
if (kvm_apic_match_dest(vcpu, NULL, APIC_DEST_NOSHORT, dest_id, dest_mode)) {
|
||||
__set_bit(vector, ioapic_handled_vectors);
|
||||
} else if (kvm_apic_pending_eoi(vcpu, vector)) {
|
||||
__set_bit(vector, ioapic_handled_vectors);
|
||||
|
||||
/*
|
||||
* Track the highest pending EOI for which the vCPU is NOT the
|
||||
* target in the new routing. Only the EOI for the IRQ that is
|
||||
* in-flight (for the old routing) needs to be intercepted, any
|
||||
* future IRQs that arrive on this vCPU will be coincidental to
|
||||
* the level-triggered routing and don't need to be intercepted.
|
||||
*/
|
||||
if ((int)vector > vcpu->arch.highest_stale_pending_ioapic_eoi)
|
||||
vcpu->arch.highest_stale_pending_ioapic_eoi = vector;
|
||||
}
|
||||
}
|
||||
|
||||
void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu,
|
||||
ulong *ioapic_handled_vectors)
|
||||
{
|
||||
struct kvm *kvm = vcpu->kvm;
|
||||
struct kvm_kernel_irq_routing_entry *entry;
|
||||
struct kvm_irq_routing_table *table;
|
||||
u32 i, nr_ioapic_pins;
|
||||
int idx;
|
||||
|
||||
idx = srcu_read_lock(&kvm->irq_srcu);
|
||||
table = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);
|
||||
nr_ioapic_pins = min_t(u32, table->nr_rt_entries,
|
||||
kvm->arch.nr_reserved_ioapic_pins);
|
||||
for (i = 0; i < nr_ioapic_pins; ++i) {
|
||||
hlist_for_each_entry(entry, &table->map[i], link) {
|
||||
struct kvm_lapic_irq irq;
|
||||
|
||||
if (entry->type != KVM_IRQ_ROUTING_MSI)
|
||||
continue;
|
||||
|
||||
kvm_set_msi_irq(vcpu->kvm, entry, &irq);
|
||||
|
||||
if (!irq.trig_mode)
|
||||
continue;
|
||||
|
||||
kvm_scan_ioapic_irq(vcpu, irq.dest_id, irq.dest_mode,
|
||||
irq.vector, ioapic_handled_vectors);
|
||||
}
|
||||
}
|
||||
srcu_read_unlock(&kvm->irq_srcu, idx);
|
||||
}
|
||||
|
||||
void kvm_arch_irq_routing_update(struct kvm *kvm)
|
||||
{
|
||||
#ifdef CONFIG_KVM_HYPERV
|
||||
kvm_hv_irq_routing_update(kvm);
|
||||
#endif
|
||||
|
||||
if (irqchip_split(kvm))
|
||||
kvm_make_scan_ioapic_request(kvm);
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user