net: stmmac: move stmmac_axi_blen_to_mask() to axi_blen init sites

Move stmmac_axi_blen_to_mask() to the axi->axi_blen array init sites
to prepare for the removal of axi_blen. For sites which initialise
axi->axi_blen with constant data, initialise axi->axi_blen_regval
using the DMA_AXI_BLENx constants.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1vLfLb-0000000FMb7-1SgG@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Russell King (Oracle) 2025-11-19 10:23:35 +00:00 committed by Jakub Kicinski
parent 6ff3310ca2
commit e676cc8561
5 changed files with 10 additions and 5 deletions

View File

@ -88,6 +88,9 @@ static int dwc_eth_dwmac_config_dt(struct platform_device *pdev,
if (burst_map & (1 << bit_index))
plat_dat->axi->axi_blen[a_index++] = 4 << bit_index;
stmmac_axi_blen_to_mask(&plat_dat->axi->axi_blen_regval,
plat_dat->axi->axi_blen, a_index);
/* dwc-qos needs GMAC4, AAL, TSO and PMT */
plat_dat->core_type = DWMAC_CORE_GMAC4;
plat_dat->dma_cfg->aal = 1;

View File

@ -650,6 +650,8 @@ static int intel_mgbe_common_data(struct pci_dev *pdev,
plat->axi->axi_xit_frm = 0;
plat->axi->axi_wr_osr_lmt = 1;
plat->axi->axi_rd_osr_lmt = 1;
plat->axi->axi_blen_regval = DMA_AXI_BLEN4 | DMA_AXI_BLEN8 |
DMA_AXI_BLEN16;
plat->axi->axi_blen[0] = 4;
plat->axi->axi_blen[1] = 8;
plat->axi->axi_blen[2] = 16;

View File

@ -225,6 +225,7 @@ void stmmac_axi_blen_to_mask(u32 *regval, const u32 *blen, size_t len)
*regval = FIELD_PREP(DMA_AXI_BLEN_MASK, val);
}
EXPORT_SYMBOL_GPL(stmmac_axi_blen_to_mask);
/**
* stmmac_verify_args - verify the driver parameters.
@ -3212,12 +3213,8 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv)
/* DMA Configuration */
stmmac_dma_init(priv, priv->ioaddr, priv->plat->dma_cfg);
if (priv->plat->axi) {
/* Encode the AXI burst length to a register value */
stmmac_axi_blen_to_mask(&priv->plat->axi->axi_blen_regval,
priv->plat->axi->axi_blen, AXI_BLEN);
if (priv->plat->axi)
stmmac_axi(priv, priv->ioaddr, priv->plat->axi);
}
/* DMA CSR Channel configuration */
for (chan = 0; chan < dma_csr_ch; chan++) {

View File

@ -92,6 +92,8 @@ static int snps_gmac5_default_data(struct pci_dev *pdev,
plat->axi->axi_rd_osr_lmt = 31;
plat->axi->axi_fb = false;
plat->axi->axi_blen_regval = DMA_AXI_BLEN4 | DMA_AXI_BLEN8 |
DMA_AXI_BLEN16 | DMA_AXI_BLEN32;
plat->axi->axi_blen[0] = 4;
plat->axi->axi_blen[1] = 8;
plat->axi->axi_blen[2] = 16;

View File

@ -118,6 +118,7 @@ static struct stmmac_axi *stmmac_axi_setup(struct platform_device *pdev)
if (of_property_read_u32(np, "snps,rd_osr_lmt", &axi->axi_rd_osr_lmt))
axi->axi_rd_osr_lmt = 1;
of_property_read_u32_array(np, "snps,blen", axi->axi_blen, AXI_BLEN);
stmmac_axi_blen_to_mask(&axi->axi_blen_regval, axi->axi_blen, AXI_BLEN);
of_node_put(np);
return axi;