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KVM: arm64: Compute 52bit TTBR address and alignment
52bit addresses from TTBR need extra adjustment and alignment checks. Implement the requirements of the architecture. Reviewed-by: Oliver Upton <oliver.upton@linux.dev> Signed-off-by: Marc Zyngier <maz@kernel.org>
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@ -28,6 +28,8 @@ static int get_ia_size(struct s1_walk_info *wi)
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/* Return true if the IPA is out of the OA range */
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static bool check_output_size(u64 ipa, struct s1_walk_info *wi)
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{
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if (wi->pa52bit)
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return wi->max_oa_bits < 52 && (ipa & GENMASK_ULL(51, wi->max_oa_bits));
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return wi->max_oa_bits < 48 && (ipa & GENMASK_ULL(47, wi->max_oa_bits));
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}
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@ -301,6 +303,16 @@ static int setup_s1_walk(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,
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x = 3 + ia_bits - ((3 - wi->sl) * stride + wi->pgshift);
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wi->baddr = ttbr & TTBRx_EL1_BADDR;
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if (wi->pa52bit) {
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/*
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* Force the alignment on 64 bytes for top-level tables
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* smaller than 8 entries, since TTBR.BADDR[5:2] are used to
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* store bits [51:48] of the first level of lookup.
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*/
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x = max(x, 6);
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wi->baddr |= FIELD_GET(GENMASK_ULL(5, 2), ttbr) << 48;
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}
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/* R_VPBBF */
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if (check_output_size(wi->baddr, wi))
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