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Pin control fixes for the v7.2 series:

Browse Source 
- Wakeup nits on the Qualcomm SC8280XP.
 
 - Double-free issues on the device tree parsing error path.
 
 - Fixup of the S4 sleep state handling on AMD pin control.
 
 - Missing Kconfig select REGMAP_MMIO for the Microchip
   driver leading to compile stalls.
 
 - Missing Kconfig select GENERIC_PINCONF for the Bitmain
   BM1880 leading to compile stalls.
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Merge tag 'pinctrl-v7.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control fixes from Linus Walleij:
 "The most interesting commit is the S4 fix for AMD, which probably is
  helpful to a whole bunch of important machines.

   - Wakeup nits on the Qualcomm SC8280XP

   - Double-free issues on the device tree parsing error path

   - Fixup of the S4 sleep state handling on AMD pin control

   - Missing Kconfig select REGMAP_MMIO for the Microchip driver leading
     to compile stalls

   - Missing Kconfig select GENERIC_PINCONF for the Bitmain BM1880
     leading to compile stalls"

* tag 'pinctrl-v7.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: bm1880: add missing select GENERIC_PINCONF
  pinctrl-amd: Don't clear S4 wake bits at probe
  pinctrl: microchip-sgpio: add missing select REGMAP_MMIO
  pinctrl: devicetree: don't free uninitialized dev_name on error path
  pinctrl: qcom: sc8280xp: Add missing wakeup entries for GPIO143/151
  pinctrl: qcom: Unconditionally mark gpio as wakeup enable
This commit is contained in:
Linus Torvalds 2026-07-27 08:48:48 -07:00
commit e63c75f72f
5 changed files with 22 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/pinctrl/Kconfig
View File

@ -166,6 +166,7 @@ config PINCTRL_BM1880
depends on OF && (ARCH_BITMAIN || COMPILE_TEST)
default ARCH_BITMAIN
select PINMUX
select GENERIC_PINCONF
help
Pinctrl driver for Bitmain BM1880 SoC.
@ -426,6 +427,7 @@ config PINCTRL_MICROCHIP_SGPIO
select GENERIC_PINCONF
select GENERIC_PINCTRL_GROUPS
select GENERIC_PINMUX_FUNCTIONS
select REGMAP_MMIO
help
Support for the serial GPIO interface used on Microsemi and
Microchip SoCs. By using a serial interface, the SIO

4
drivers/pinctrl/devicetree.c
View File

@ -69,6 +69,10 @@ static int dt_remember_or_free_map(struct pinctrl *p, const char *statename,
int i;
struct pinctrl_dt_map *dt_map;
/* Initialize dev_name before any allocation can fail */
for (i = 0; i < num_maps; i++)
map[i].dev_name = NULL;
/* Initialize common mapping table entry fields */
for (i = 0; i < num_maps; i++) {
const char *devname;

3
drivers/pinctrl/pinctrl-amd.c
View File

@ -884,8 +884,7 @@ static void amd_gpio_irq_init(struct amd_gpio *gpio_dev)
u32 pin_reg, mask;
int i;
mask = BIT(WAKE_CNTRL_OFF_S0I3) | BIT(WAKE_CNTRL_OFF_S3) |
BIT(WAKE_CNTRL_OFF_S4);
mask = BIT(WAKE_CNTRL_OFF_S0I3) | BIT(WAKE_CNTRL_OFF_S3);
for (i = 0; i < desc->npins; i++) {
int pin = desc->pins[i].number;

8
drivers/pinctrl/qcom/pinctrl-msm.c
View File

@ -1240,12 +1240,12 @@ static int msm_gpio_irq_reqres(struct irq_data *d)
/*
* If the wakeup_enable bit is present and marked as available for the
* requested GPIO, it should be enabled when the GPIO is marked as
* wake irq in order to allow the interrupt event to be transfered to
* the PDC HW.
* wake irq in order to allow the interrupt event to be transferred to
* the PDC/MPM HW.
* While the name implies only the wakeup event, it's also required for
* the interrupt event.
*/
if (test_bit(d->hwirq, pctrl->skip_wake_irqs) && g->intr_wakeup_present_bit) {
if (g->intr_wakeup_present_bit) {
u32 intr_cfg;
raw_spin_lock_irqsave(&pctrl->lock, flags);
@ -1273,7 +1273,7 @@ static void msm_gpio_irq_relres(struct irq_data *d)
unsigned long flags;
/* Disable the wakeup_enable bit if it has been set in msm_gpio_irq_reqres() */
if (test_bit(d->hwirq, pctrl->skip_wake_irqs) && g->intr_wakeup_present_bit) {
if (g->intr_wakeup_present_bit) {
u32 intr_cfg;
raw_spin_lock_irqsave(&pctrl->lock, flags);

21
drivers/pinctrl/qcom/pinctrl-sc8280xp.c
View File

@ -1881,16 +1881,17 @@ static const struct msm_gpio_wakeirq_map sc8280xp_pdc_map[] = {
{ 126, 200 }, { 127, 225 }, { 128, 262 }, { 129, 201 },
{ 130, 209 }, { 131, 173 }, { 132, 202 }, { 136, 210 },
{ 138, 171 }, { 139, 226 }, { 140, 227 }, { 142, 228 },
{ 144, 229 }, { 145, 230 }, { 146, 231 }, { 148, 232 },
{ 149, 233 }, { 150, 234 }, { 152, 235 }, { 154, 212 },
{ 157, 213 }, { 161, 219 }, { 170, 236 }, { 171, 221 },
{ 174, 222 }, { 175, 237 }, { 176, 223 }, { 177, 170 },
{ 180, 238 }, { 181, 239 }, { 182, 240 }, { 183, 241 },
{ 184, 242 }, { 185, 243 }, { 190, 178 }, { 193, 184 },
{ 196, 185 }, { 198, 186 }, { 200, 174 }, { 201, 175 },
{ 205, 176 }, { 206, 177 }, { 208, 187 }, { 210, 198 },
{ 211, 199 }, { 212, 204 }, { 215, 205 }, { 220, 188 },
{ 221, 194 }, { 223, 195 }, { 225, 196 }, { 227, 197 },
{ 143, 261 }, { 144, 229 }, { 145, 230 }, { 146, 231 },
{ 148, 232 }, { 149, 233 }, { 150, 234 }, { 151, 264 },
{ 152, 235 }, { 154, 212 }, { 157, 213 }, { 161, 219 },
{ 170, 236 }, { 171, 221 }, { 174, 222 }, { 175, 237 },
{ 176, 223 }, { 177, 170 }, { 180, 238 }, { 181, 239 },
{ 182, 240 }, { 183, 241 }, { 184, 242 }, { 185, 243 },
{ 190, 178 }, { 193, 184 }, { 196, 185 }, { 198, 186 },
{ 200, 174 }, { 201, 175 }, { 205, 176 }, { 206, 177 },
{ 208, 187 }, { 210, 198 }, { 211, 199 }, { 212, 204 },
{ 215, 205 }, { 220, 188 }, { 221, 194 }, { 223, 195 },
{ 225, 196 }, { 227, 197 },
};
static struct msm_pinctrl_soc_data sc8280xp_pinctrl = {