mirror of
https://github.com/torvalds/linux.git
synced 2026-05-28 09:04:39 +02:00
arm64: dts: qcom: sc7180: change labels to lower-case
DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-4-0505bc7d2c56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Krzysztof Kozlowski
Bjorn Andersson
parent
d95c4358eb
commit
e5f9073513
|
|
@ -6,82 +6,82 @@
|
|||
* by Qualcomm firmware.
|
||||
*/
|
||||
|
||||
&CPU0 {
|
||||
&cpu0 {
|
||||
/delete-property/ power-domains;
|
||||
/delete-property/ power-domain-names;
|
||||
|
||||
cpu-idle-states = <&LITTLE_CPU_SLEEP_0
|
||||
&LITTLE_CPU_SLEEP_1
|
||||
&CLUSTER_SLEEP_0>;
|
||||
cpu-idle-states = <&little_cpu_sleep_0
|
||||
&little_cpu_sleep_1
|
||||
&cluster_sleep_0>;
|
||||
};
|
||||
|
||||
&CPU1 {
|
||||
&cpu1 {
|
||||
/delete-property/ power-domains;
|
||||
/delete-property/ power-domain-names;
|
||||
|
||||
cpu-idle-states = <&LITTLE_CPU_SLEEP_0
|
||||
&LITTLE_CPU_SLEEP_1
|
||||
&CLUSTER_SLEEP_0>;
|
||||
cpu-idle-states = <&little_cpu_sleep_0
|
||||
&little_cpu_sleep_1
|
||||
&cluster_sleep_0>;
|
||||
};
|
||||
|
||||
&CPU2 {
|
||||
&cpu2 {
|
||||
/delete-property/ power-domains;
|
||||
/delete-property/ power-domain-names;
|
||||
|
||||
cpu-idle-states = <&LITTLE_CPU_SLEEP_0
|
||||
&LITTLE_CPU_SLEEP_1
|
||||
&CLUSTER_SLEEP_0>;
|
||||
cpu-idle-states = <&little_cpu_sleep_0
|
||||
&little_cpu_sleep_1
|
||||
&cluster_sleep_0>;
|
||||
};
|
||||
|
||||
&CPU3 {
|
||||
&cpu3 {
|
||||
/delete-property/ power-domains;
|
||||
/delete-property/ power-domain-names;
|
||||
|
||||
cpu-idle-states = <&LITTLE_CPU_SLEEP_0
|
||||
&LITTLE_CPU_SLEEP_1
|
||||
&CLUSTER_SLEEP_0>;
|
||||
cpu-idle-states = <&little_cpu_sleep_0
|
||||
&little_cpu_sleep_1
|
||||
&cluster_sleep_0>;
|
||||
};
|
||||
|
||||
&CPU4 {
|
||||
&cpu4 {
|
||||
/delete-property/ power-domains;
|
||||
/delete-property/ power-domain-names;
|
||||
|
||||
cpu-idle-states = <&LITTLE_CPU_SLEEP_0
|
||||
&LITTLE_CPU_SLEEP_1
|
||||
&CLUSTER_SLEEP_0>;
|
||||
cpu-idle-states = <&little_cpu_sleep_0
|
||||
&little_cpu_sleep_1
|
||||
&cluster_sleep_0>;
|
||||
};
|
||||
|
||||
&CPU5 {
|
||||
&cpu5 {
|
||||
/delete-property/ power-domains;
|
||||
/delete-property/ power-domain-names;
|
||||
|
||||
cpu-idle-states = <&LITTLE_CPU_SLEEP_0
|
||||
&LITTLE_CPU_SLEEP_1
|
||||
&CLUSTER_SLEEP_0>;
|
||||
cpu-idle-states = <&little_cpu_sleep_0
|
||||
&little_cpu_sleep_1
|
||||
&cluster_sleep_0>;
|
||||
};
|
||||
|
||||
&CPU6 {
|
||||
&cpu6 {
|
||||
/delete-property/ power-domains;
|
||||
/delete-property/ power-domain-names;
|
||||
|
||||
cpu-idle-states = <&BIG_CPU_SLEEP_0
|
||||
&BIG_CPU_SLEEP_1
|
||||
&CLUSTER_SLEEP_0>;
|
||||
cpu-idle-states = <&big_cpu_sleep_0
|
||||
&big_cpu_sleep_1
|
||||
&cluster_sleep_0>;
|
||||
};
|
||||
|
||||
&CPU7 {
|
||||
&cpu7 {
|
||||
/delete-property/ power-domains;
|
||||
/delete-property/ power-domain-names;
|
||||
|
||||
cpu-idle-states = <&BIG_CPU_SLEEP_0
|
||||
&BIG_CPU_SLEEP_1
|
||||
&CLUSTER_SLEEP_0>;
|
||||
cpu-idle-states = <&big_cpu_sleep_0
|
||||
&big_cpu_sleep_1
|
||||
&cluster_sleep_0>;
|
||||
};
|
||||
|
||||
/delete-node/ &domain_idle_states;
|
||||
|
||||
&idle_states {
|
||||
CLUSTER_SLEEP_0: cluster-sleep-0 {
|
||||
cluster_sleep_0: cluster-sleep-0 {
|
||||
compatible = "arm,idle-state";
|
||||
idle-state-name = "cluster-power-down";
|
||||
arm,psci-suspend-param = <0x40003444>;
|
||||
|
|
@ -92,15 +92,15 @@ CLUSTER_SLEEP_0: cluster-sleep-0 {
|
|||
};
|
||||
};
|
||||
|
||||
/delete-node/ &CPU_PD0;
|
||||
/delete-node/ &CPU_PD1;
|
||||
/delete-node/ &CPU_PD2;
|
||||
/delete-node/ &CPU_PD3;
|
||||
/delete-node/ &CPU_PD4;
|
||||
/delete-node/ &CPU_PD5;
|
||||
/delete-node/ &CPU_PD6;
|
||||
/delete-node/ &CPU_PD7;
|
||||
/delete-node/ &CLUSTER_PD;
|
||||
/delete-node/ &cpu_pd0;
|
||||
/delete-node/ &cpu_pd1;
|
||||
/delete-node/ &cpu_pd2;
|
||||
/delete-node/ &cpu_pd3;
|
||||
/delete-node/ &cpu_pd4;
|
||||
/delete-node/ &cpu_pd5;
|
||||
/delete-node/ &cpu_pd6;
|
||||
/delete-node/ &cpu_pd7;
|
||||
/delete-node/ &cluster_pd;
|
||||
|
||||
&apps_rsc {
|
||||
/delete-property/ power-domains;
|
||||
|
|
|
|||
|
|
@ -53,14 +53,14 @@ skin-temp-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&skin_temp_alert0>;
|
||||
cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
|
||||
map1 {
|
||||
trip = <&skin_temp_alert1>;
|
||||
cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -71,14 +71,14 @@ skin-temp-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&skin_temp_alert0>;
|
||||
cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
|
||||
map1 {
|
||||
trip = <&skin_temp_alert1>;
|
||||
cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -78,14 +78,14 @@ skin-temp-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&skin_temp_alert0>;
|
||||
cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
|
||||
map1 {
|
||||
trip = <&skin_temp_alert1>;
|
||||
cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -77,28 +77,28 @@ cpus {
|
|||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
|
||||
CPU0: cpu@0 {
|
||||
cpu0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "qcom,kryo468";
|
||||
reg = <0x0 0x0>;
|
||||
clocks = <&cpufreq_hw 0>;
|
||||
enable-method = "psci";
|
||||
power-domains = <&CPU_PD0>;
|
||||
power-domains = <&cpu_pd0>;
|
||||
power-domain-names = "psci";
|
||||
capacity-dmips-mhz = <415>;
|
||||
dynamic-power-coefficient = <137>;
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
|
||||
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
|
||||
next-level-cache = <&L2_0>;
|
||||
next-level-cache = <&l2_0>;
|
||||
#cooling-cells = <2>;
|
||||
qcom,freq-domain = <&cpufreq_hw 0>;
|
||||
L2_0: l2-cache {
|
||||
l2_0: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
cache-unified;
|
||||
next-level-cache = <&L3_0>;
|
||||
L3_0: l3-cache {
|
||||
next-level-cache = <&l3_0>;
|
||||
l3_0: l3-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <3>;
|
||||
cache-unified;
|
||||
|
|
@ -106,206 +106,206 @@ L3_0: l3-cache {
|
|||
};
|
||||
};
|
||||
|
||||
CPU1: cpu@100 {
|
||||
cpu1: cpu@100 {
|
||||
device_type = "cpu";
|
||||
compatible = "qcom,kryo468";
|
||||
reg = <0x0 0x100>;
|
||||
clocks = <&cpufreq_hw 0>;
|
||||
enable-method = "psci";
|
||||
power-domains = <&CPU_PD1>;
|
||||
power-domains = <&cpu_pd1>;
|
||||
power-domain-names = "psci";
|
||||
capacity-dmips-mhz = <415>;
|
||||
dynamic-power-coefficient = <137>;
|
||||
next-level-cache = <&L2_100>;
|
||||
next-level-cache = <&l2_100>;
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
|
||||
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
|
||||
#cooling-cells = <2>;
|
||||
qcom,freq-domain = <&cpufreq_hw 0>;
|
||||
L2_100: l2-cache {
|
||||
l2_100: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
cache-unified;
|
||||
next-level-cache = <&L3_0>;
|
||||
next-level-cache = <&l3_0>;
|
||||
};
|
||||
};
|
||||
|
||||
CPU2: cpu@200 {
|
||||
cpu2: cpu@200 {
|
||||
device_type = "cpu";
|
||||
compatible = "qcom,kryo468";
|
||||
reg = <0x0 0x200>;
|
||||
clocks = <&cpufreq_hw 0>;
|
||||
enable-method = "psci";
|
||||
power-domains = <&CPU_PD2>;
|
||||
power-domains = <&cpu_pd2>;
|
||||
power-domain-names = "psci";
|
||||
capacity-dmips-mhz = <415>;
|
||||
dynamic-power-coefficient = <137>;
|
||||
next-level-cache = <&L2_200>;
|
||||
next-level-cache = <&l2_200>;
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
|
||||
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
|
||||
#cooling-cells = <2>;
|
||||
qcom,freq-domain = <&cpufreq_hw 0>;
|
||||
L2_200: l2-cache {
|
||||
l2_200: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
cache-unified;
|
||||
next-level-cache = <&L3_0>;
|
||||
next-level-cache = <&l3_0>;
|
||||
};
|
||||
};
|
||||
|
||||
CPU3: cpu@300 {
|
||||
cpu3: cpu@300 {
|
||||
device_type = "cpu";
|
||||
compatible = "qcom,kryo468";
|
||||
reg = <0x0 0x300>;
|
||||
clocks = <&cpufreq_hw 0>;
|
||||
enable-method = "psci";
|
||||
power-domains = <&CPU_PD3>;
|
||||
power-domains = <&cpu_pd3>;
|
||||
power-domain-names = "psci";
|
||||
capacity-dmips-mhz = <415>;
|
||||
dynamic-power-coefficient = <137>;
|
||||
next-level-cache = <&L2_300>;
|
||||
next-level-cache = <&l2_300>;
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
|
||||
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
|
||||
#cooling-cells = <2>;
|
||||
qcom,freq-domain = <&cpufreq_hw 0>;
|
||||
L2_300: l2-cache {
|
||||
l2_300: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
cache-unified;
|
||||
next-level-cache = <&L3_0>;
|
||||
next-level-cache = <&l3_0>;
|
||||
};
|
||||
};
|
||||
|
||||
CPU4: cpu@400 {
|
||||
cpu4: cpu@400 {
|
||||
device_type = "cpu";
|
||||
compatible = "qcom,kryo468";
|
||||
reg = <0x0 0x400>;
|
||||
clocks = <&cpufreq_hw 0>;
|
||||
enable-method = "psci";
|
||||
power-domains = <&CPU_PD4>;
|
||||
power-domains = <&cpu_pd4>;
|
||||
power-domain-names = "psci";
|
||||
capacity-dmips-mhz = <415>;
|
||||
dynamic-power-coefficient = <137>;
|
||||
next-level-cache = <&L2_400>;
|
||||
next-level-cache = <&l2_400>;
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
|
||||
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
|
||||
#cooling-cells = <2>;
|
||||
qcom,freq-domain = <&cpufreq_hw 0>;
|
||||
L2_400: l2-cache {
|
||||
l2_400: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
cache-unified;
|
||||
next-level-cache = <&L3_0>;
|
||||
next-level-cache = <&l3_0>;
|
||||
};
|
||||
};
|
||||
|
||||
CPU5: cpu@500 {
|
||||
cpu5: cpu@500 {
|
||||
device_type = "cpu";
|
||||
compatible = "qcom,kryo468";
|
||||
reg = <0x0 0x500>;
|
||||
clocks = <&cpufreq_hw 0>;
|
||||
enable-method = "psci";
|
||||
power-domains = <&CPU_PD5>;
|
||||
power-domains = <&cpu_pd5>;
|
||||
power-domain-names = "psci";
|
||||
capacity-dmips-mhz = <415>;
|
||||
dynamic-power-coefficient = <137>;
|
||||
next-level-cache = <&L2_500>;
|
||||
next-level-cache = <&l2_500>;
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
|
||||
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
|
||||
#cooling-cells = <2>;
|
||||
qcom,freq-domain = <&cpufreq_hw 0>;
|
||||
L2_500: l2-cache {
|
||||
l2_500: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
cache-unified;
|
||||
next-level-cache = <&L3_0>;
|
||||
next-level-cache = <&l3_0>;
|
||||
};
|
||||
};
|
||||
|
||||
CPU6: cpu@600 {
|
||||
cpu6: cpu@600 {
|
||||
device_type = "cpu";
|
||||
compatible = "qcom,kryo468";
|
||||
reg = <0x0 0x600>;
|
||||
clocks = <&cpufreq_hw 1>;
|
||||
enable-method = "psci";
|
||||
power-domains = <&CPU_PD6>;
|
||||
power-domains = <&cpu_pd6>;
|
||||
power-domain-names = "psci";
|
||||
capacity-dmips-mhz = <1024>;
|
||||
dynamic-power-coefficient = <480>;
|
||||
next-level-cache = <&L2_600>;
|
||||
next-level-cache = <&l2_600>;
|
||||
operating-points-v2 = <&cpu6_opp_table>;
|
||||
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
|
||||
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
|
||||
#cooling-cells = <2>;
|
||||
qcom,freq-domain = <&cpufreq_hw 1>;
|
||||
L2_600: l2-cache {
|
||||
l2_600: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
cache-unified;
|
||||
next-level-cache = <&L3_0>;
|
||||
next-level-cache = <&l3_0>;
|
||||
};
|
||||
};
|
||||
|
||||
CPU7: cpu@700 {
|
||||
cpu7: cpu@700 {
|
||||
device_type = "cpu";
|
||||
compatible = "qcom,kryo468";
|
||||
reg = <0x0 0x700>;
|
||||
clocks = <&cpufreq_hw 1>;
|
||||
enable-method = "psci";
|
||||
power-domains = <&CPU_PD7>;
|
||||
power-domains = <&cpu_pd7>;
|
||||
power-domain-names = "psci";
|
||||
capacity-dmips-mhz = <1024>;
|
||||
dynamic-power-coefficient = <480>;
|
||||
next-level-cache = <&L2_700>;
|
||||
next-level-cache = <&l2_700>;
|
||||
operating-points-v2 = <&cpu6_opp_table>;
|
||||
interconnects = <&gem_noc MASTER_APPSS_PROC 3 &mc_virt SLAVE_EBI1 3>,
|
||||
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
|
||||
#cooling-cells = <2>;
|
||||
qcom,freq-domain = <&cpufreq_hw 1>;
|
||||
L2_700: l2-cache {
|
||||
l2_700: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
cache-unified;
|
||||
next-level-cache = <&L3_0>;
|
||||
next-level-cache = <&l3_0>;
|
||||
};
|
||||
};
|
||||
|
||||
cpu-map {
|
||||
cluster0 {
|
||||
core0 {
|
||||
cpu = <&CPU0>;
|
||||
cpu = <&cpu0>;
|
||||
};
|
||||
|
||||
core1 {
|
||||
cpu = <&CPU1>;
|
||||
cpu = <&cpu1>;
|
||||
};
|
||||
|
||||
core2 {
|
||||
cpu = <&CPU2>;
|
||||
cpu = <&cpu2>;
|
||||
};
|
||||
|
||||
core3 {
|
||||
cpu = <&CPU3>;
|
||||
cpu = <&cpu3>;
|
||||
};
|
||||
|
||||
core4 {
|
||||
cpu = <&CPU4>;
|
||||
cpu = <&cpu4>;
|
||||
};
|
||||
|
||||
core5 {
|
||||
cpu = <&CPU5>;
|
||||
cpu = <&cpu5>;
|
||||
};
|
||||
|
||||
core6 {
|
||||
cpu = <&CPU6>;
|
||||
cpu = <&cpu6>;
|
||||
};
|
||||
|
||||
core7 {
|
||||
cpu = <&CPU7>;
|
||||
cpu = <&cpu7>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -313,7 +313,7 @@ core7 {
|
|||
idle_states: idle-states {
|
||||
entry-method = "psci";
|
||||
|
||||
LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
|
||||
little_cpu_sleep_0: cpu-sleep-0-0 {
|
||||
compatible = "arm,idle-state";
|
||||
idle-state-name = "little-power-down";
|
||||
arm,psci-suspend-param = <0x40000003>;
|
||||
|
|
@ -323,7 +323,7 @@ LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
|
|||
local-timer-stop;
|
||||
};
|
||||
|
||||
LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
|
||||
little_cpu_sleep_1: cpu-sleep-0-1 {
|
||||
compatible = "arm,idle-state";
|
||||
idle-state-name = "little-rail-power-down";
|
||||
arm,psci-suspend-param = <0x40000004>;
|
||||
|
|
@ -333,7 +333,7 @@ LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
|
|||
local-timer-stop;
|
||||
};
|
||||
|
||||
BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
|
||||
big_cpu_sleep_0: cpu-sleep-1-0 {
|
||||
compatible = "arm,idle-state";
|
||||
idle-state-name = "big-power-down";
|
||||
arm,psci-suspend-param = <0x40000003>;
|
||||
|
|
@ -343,7 +343,7 @@ BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
|
|||
local-timer-stop;
|
||||
};
|
||||
|
||||
BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
|
||||
big_cpu_sleep_1: cpu-sleep-1-1 {
|
||||
compatible = "arm,idle-state";
|
||||
idle-state-name = "big-rail-power-down";
|
||||
arm,psci-suspend-param = <0x40000004>;
|
||||
|
|
@ -355,7 +355,7 @@ BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
|
|||
};
|
||||
|
||||
domain_idle_states: domain-idle-states {
|
||||
CLUSTER_SLEEP_PC: cluster-sleep-0 {
|
||||
cluster_sleep_pc: cluster-sleep-0 {
|
||||
compatible = "domain-idle-state";
|
||||
arm,psci-suspend-param = <0x41000044>;
|
||||
entry-latency-us = <2752>;
|
||||
|
|
@ -363,7 +363,7 @@ CLUSTER_SLEEP_PC: cluster-sleep-0 {
|
|||
min-residency-us = <6118>;
|
||||
};
|
||||
|
||||
CLUSTER_SLEEP_CX_RET: cluster-sleep-1 {
|
||||
cluster_sleep_cx_ret: cluster-sleep-1 {
|
||||
compatible = "domain-idle-state";
|
||||
arm,psci-suspend-param = <0x41001244>;
|
||||
entry-latency-us = <3638>;
|
||||
|
|
@ -371,7 +371,7 @@ CLUSTER_SLEEP_CX_RET: cluster-sleep-1 {
|
|||
min-residency-us = <8467>;
|
||||
};
|
||||
|
||||
CLUSTER_AOSS_SLEEP: cluster-sleep-2 {
|
||||
cluster_aoss_sleep: cluster-sleep-2 {
|
||||
compatible = "domain-idle-state";
|
||||
arm,psci-suspend-param = <0x4100b244>;
|
||||
entry-latency-us = <3263>;
|
||||
|
|
@ -580,59 +580,59 @@ psci {
|
|||
compatible = "arm,psci-1.0";
|
||||
method = "smc";
|
||||
|
||||
CPU_PD0: cpu0 {
|
||||
cpu_pd0: cpu0 {
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
|
||||
power-domains = <&cluster_pd>;
|
||||
domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
|
||||
};
|
||||
|
||||
CPU_PD1: cpu1 {
|
||||
cpu_pd1: cpu1 {
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
|
||||
power-domains = <&cluster_pd>;
|
||||
domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
|
||||
};
|
||||
|
||||
CPU_PD2: cpu2 {
|
||||
cpu_pd2: cpu2 {
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
|
||||
power-domains = <&cluster_pd>;
|
||||
domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
|
||||
};
|
||||
|
||||
CPU_PD3: cpu3 {
|
||||
cpu_pd3: cpu3 {
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
|
||||
power-domains = <&cluster_pd>;
|
||||
domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
|
||||
};
|
||||
|
||||
CPU_PD4: cpu4 {
|
||||
cpu_pd4: cpu4 {
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
|
||||
power-domains = <&cluster_pd>;
|
||||
domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
|
||||
};
|
||||
|
||||
CPU_PD5: cpu5 {
|
||||
cpu_pd5: cpu5 {
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
|
||||
power-domains = <&cluster_pd>;
|
||||
domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
|
||||
};
|
||||
|
||||
CPU_PD6: cpu6 {
|
||||
cpu_pd6: cpu6 {
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
domain-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;
|
||||
power-domains = <&cluster_pd>;
|
||||
domain-idle-states = <&big_cpu_sleep_0 &big_cpu_sleep_1>;
|
||||
};
|
||||
|
||||
CPU_PD7: cpu7 {
|
||||
cpu_pd7: cpu7 {
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
domain-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;
|
||||
power-domains = <&cluster_pd>;
|
||||
domain-idle-states = <&big_cpu_sleep_0 &big_cpu_sleep_1>;
|
||||
};
|
||||
|
||||
CLUSTER_PD: cpu-cluster0 {
|
||||
cluster_pd: cpu-cluster0 {
|
||||
#power-domain-cells = <0>;
|
||||
domain-idle-states = <&CLUSTER_SLEEP_PC
|
||||
&CLUSTER_SLEEP_CX_RET
|
||||
&CLUSTER_AOSS_SLEEP>;
|
||||
domain-idle-states = <&cluster_sleep_pc
|
||||
&cluster_sleep_cx_ret
|
||||
&cluster_aoss_sleep>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -2543,7 +2543,7 @@ etm@7040000 {
|
|||
compatible = "arm,coresight-etm4x", "arm,primecell";
|
||||
reg = <0 0x07040000 0 0x1000>;
|
||||
|
||||
cpu = <&CPU0>;
|
||||
cpu = <&cpu0>;
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
|
|
@ -2563,7 +2563,7 @@ etm@7140000 {
|
|||
compatible = "arm,coresight-etm4x", "arm,primecell";
|
||||
reg = <0 0x07140000 0 0x1000>;
|
||||
|
||||
cpu = <&CPU1>;
|
||||
cpu = <&cpu1>;
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
|
|
@ -2583,7 +2583,7 @@ etm@7240000 {
|
|||
compatible = "arm,coresight-etm4x", "arm,primecell";
|
||||
reg = <0 0x07240000 0 0x1000>;
|
||||
|
||||
cpu = <&CPU2>;
|
||||
cpu = <&cpu2>;
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
|
|
@ -2603,7 +2603,7 @@ etm@7340000 {
|
|||
compatible = "arm,coresight-etm4x", "arm,primecell";
|
||||
reg = <0 0x07340000 0 0x1000>;
|
||||
|
||||
cpu = <&CPU3>;
|
||||
cpu = <&cpu3>;
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
|
|
@ -2623,7 +2623,7 @@ etm@7440000 {
|
|||
compatible = "arm,coresight-etm4x", "arm,primecell";
|
||||
reg = <0 0x07440000 0 0x1000>;
|
||||
|
||||
cpu = <&CPU4>;
|
||||
cpu = <&cpu4>;
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
|
|
@ -2643,7 +2643,7 @@ etm@7540000 {
|
|||
compatible = "arm,coresight-etm4x", "arm,primecell";
|
||||
reg = <0 0x07540000 0 0x1000>;
|
||||
|
||||
cpu = <&CPU5>;
|
||||
cpu = <&cpu5>;
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
|
|
@ -2663,7 +2663,7 @@ etm@7640000 {
|
|||
compatible = "arm,coresight-etm4x", "arm,primecell";
|
||||
reg = <0 0x07640000 0 0x1000>;
|
||||
|
||||
cpu = <&CPU6>;
|
||||
cpu = <&cpu6>;
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
|
|
@ -2683,7 +2683,7 @@ etm@7740000 {
|
|||
compatible = "arm,coresight-etm4x", "arm,primecell";
|
||||
reg = <0 0x07740000 0 0x1000>;
|
||||
|
||||
cpu = <&CPU7>;
|
||||
cpu = <&cpu7>;
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
|
|
@ -3732,7 +3732,7 @@ apps_rsc: rsc@18200000 {
|
|||
<SLEEP_TCS 3>,
|
||||
<WAKE_TCS 3>,
|
||||
<CONTROL_TCS 1>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
power-domains = <&cluster_pd>;
|
||||
|
||||
rpmhcc: clock-controller {
|
||||
compatible = "qcom,sc7180-rpmh-clk";
|
||||
|
|
@ -4061,21 +4061,21 @@ cpu0_crit: cpu-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu0_alert0>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu0_alert1>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -4109,21 +4109,21 @@ cpu1_crit: cpu-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu1_alert0>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu1_alert1>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -4157,21 +4157,21 @@ cpu2_crit: cpu-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu2_alert0>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu2_alert1>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -4205,21 +4205,21 @@ cpu3_crit: cpu-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu3_alert0>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu3_alert1>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -4253,21 +4253,21 @@ cpu4_crit: cpu-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu4_alert0>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu4_alert1>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -4301,21 +4301,21 @@ cpu5_crit: cpu-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu5_alert0>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu5_alert1>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -4349,13 +4349,13 @@ cpu6_crit: cpu-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu6_alert0>;
|
||||
cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu6_alert1>;
|
||||
cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -4389,13 +4389,13 @@ cpu7_crit: cpu-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu7_alert0>;
|
||||
cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu7_alert1>;
|
||||
cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -4429,13 +4429,13 @@ cpu8_crit: cpu-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu8_alert0>;
|
||||
cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu8_alert1>;
|
||||
cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -4469,13 +4469,13 @@ cpu9_crit: cpu-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu9_alert0>;
|
||||
cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu9_alert1>;
|
||||
cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -6,11 +6,11 @@
|
|||
#include "sc7180.dtsi"
|
||||
|
||||
/* SM7125 uses Kryo 465 instead of Kryo 468 */
|
||||
&CPU0 { compatible = "qcom,kryo465"; };
|
||||
&CPU1 { compatible = "qcom,kryo465"; };
|
||||
&CPU2 { compatible = "qcom,kryo465"; };
|
||||
&CPU3 { compatible = "qcom,kryo465"; };
|
||||
&CPU4 { compatible = "qcom,kryo465"; };
|
||||
&CPU5 { compatible = "qcom,kryo465"; };
|
||||
&CPU6 { compatible = "qcom,kryo465"; };
|
||||
&CPU7 { compatible = "qcom,kryo465"; };
|
||||
&cpu0 { compatible = "qcom,kryo465"; };
|
||||
&cpu1 { compatible = "qcom,kryo465"; };
|
||||
&cpu2 { compatible = "qcom,kryo465"; };
|
||||
&cpu3 { compatible = "qcom,kryo465"; };
|
||||
&cpu4 { compatible = "qcom,kryo465"; };
|
||||
&cpu5 { compatible = "qcom,kryo465"; };
|
||||
&cpu6 { compatible = "qcom,kryo465"; };
|
||||
&cpu7 { compatible = "qcom,kryo465"; };
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user