From ee769323b1bf60c0ec0338cc5ee6b1c725624ec6 Mon Sep 17 00:00:00 2001 From: "Maciej W. Rozycki" Date: Sun, 29 Mar 2026 19:07:24 +0100 Subject: [PATCH 1/2] declance: Rate-limit DMA errors Prevent the system from becoming unusable due to a flood of DMA error messages. Signed-off-by: Maciej W. Rozycki Link: https://patch.msgid.link/alpine.DEB.2.21.2603291838370.60268@angie.orcam.me.uk Signed-off-by: Jakub Kicinski --- drivers/net/ethernet/amd/declance.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/amd/declance.c b/drivers/net/ethernet/amd/declance.c index e6d56fcdc1dd..24aa4803b4ae 100644 --- a/drivers/net/ethernet/amd/declance.c +++ b/drivers/net/ethernet/amd/declance.c @@ -727,7 +727,7 @@ static irqreturn_t lance_dma_merr_int(int irq, void *dev_id) { struct net_device *dev = dev_id; - printk(KERN_ERR "%s: DMA error\n", dev->name); + pr_err_ratelimited("%s: DMA error\n", dev->name); return IRQ_HANDLED; } From aae5efaeb8aa4ada710d5b0cdbab77b9539c69eb Mon Sep 17 00:00:00 2001 From: "Maciej W. Rozycki" Date: Sun, 29 Mar 2026 19:07:41 +0100 Subject: [PATCH 2/2] declance: Include the offending address with DMA errors The address latched in the I/O ASIC LANCE DMA Pointer Register uses the TURBOchannel bus address encoding and therefore bits 33:29 of location referred occupy bits 4:0, bits 28:2 are left-shifted by 3, and bits 1:0 are hardwired to zero. In reality no TURBOchannel system exceeds 1GiB of RAM though, so the address reported will always fit in 8 hex digits. Signed-off-by: Maciej W. Rozycki Link: https://patch.msgid.link/alpine.DEB.2.21.2603291839220.60268@angie.orcam.me.uk Signed-off-by: Jakub Kicinski --- drivers/net/ethernet/amd/declance.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/amd/declance.c b/drivers/net/ethernet/amd/declance.c index 24aa4803b4ae..c7d47ca603a8 100644 --- a/drivers/net/ethernet/amd/declance.c +++ b/drivers/net/ethernet/amd/declance.c @@ -726,8 +726,10 @@ static void lance_tx(struct net_device *dev) static irqreturn_t lance_dma_merr_int(int irq, void *dev_id) { struct net_device *dev = dev_id; + u64 ldp = ioasic_read(IO_REG_LANCE_DMA_P); - pr_err_ratelimited("%s: DMA error\n", dev->name); + pr_err_ratelimited("%s: DMA error at %#010llx\n", dev->name, + (ldp & 0x1f) << 29 | (ldp & 0xffffffe0) >> 3); return IRQ_HANDLED; }