diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml index a1340226a0d0..2141e5d4de63 100644 --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml @@ -26,6 +26,7 @@ properties: - qcom,hawi-llcc - qcom,ipq5424-llcc - qcom,kaanapali-llcc + - qcom,nord-llcc - qcom,qcs615-llcc - qcom,qcs8300-llcc - qcom,qdu1000-llcc @@ -56,11 +57,11 @@ properties: reg: minItems: 1 - maxItems: 14 + maxItems: 18 reg-names: minItems: 1 - maxItems: 14 + maxItems: 18 interrupts: maxItems: 1 @@ -355,6 +356,56 @@ allOf: - const: llcc3_base - const: llcc_broadcast_base - const: llcc_broadcast_and_base + + - if: + properties: + compatible: + contains: + enum: + - qcom,nord-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC1 base register region + - description: LLCC2 base register region + - description: LLCC3 base register region + - description: LLCC4 base register region + - description: LLCC5 base register region + - description: LLCC6 base register region + - description: LLCC7 base register region + - description: LLCC8 base register region + - description: LLCC9 base register region + - description: LLCC10 base register region + - description: LLCC11 base register region + - description: LLCC12 base register region + - description: LLCC13 base register region + - description: LLCC14 base register region + - description: LLCC15 base register region + - description: LLCC broadcast OR register region + - description: LLCC broadcast AND register region + reg-names: + items: + - const: llcc0_base + - const: llcc1_base + - const: llcc2_base + - const: llcc3_base + - const: llcc4_base + - const: llcc5_base + - const: llcc6_base + - const: llcc7_base + - const: llcc8_base + - const: llcc9_base + - const: llcc10_base + - const: llcc11_base + - const: llcc12_base + - const: llcc13_base + - const: llcc14_base + - const: llcc15_base + - const: llcc_broadcast_base + - const: llcc_broadcast_and_base + - if: properties: compatible: diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml index ecee5aef65a7..40a267c54b00 100644 --- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml @@ -45,6 +45,7 @@ properties: - qcom,scm-msm8660 - qcom,scm-msm8916 - qcom,scm-msm8937 + - qcom,scm-msm8952 - qcom,scm-msm8953 - qcom,scm-msm8960 - qcom,scm-msm8974 @@ -153,6 +154,7 @@ allOf: - qcom,scm-msm8660 - qcom,scm-msm8916 - qcom,scm-msm8937 + - qcom,scm-msm8952 - qcom,scm-msm8953 - qcom,scm-msm8960 - qcom,scm-msm8974 @@ -199,6 +201,7 @@ allOf: - qcom,scm-msm8226 - qcom,scm-msm8916 - qcom,scm-msm8937 + - qcom,scm-msm8952 - qcom,scm-msm8953 - qcom,scm-msm8974 - qcom,scm-msm8976 diff --git a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml index 03359479d926..2185920e1b5d 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml @@ -21,6 +21,7 @@ properties: - qcom,glymur-cpucp-mbox - qcom,hawi-cpucp-mbox - qcom,kaanapali-cpucp-mbox + - qcom,maili-cpucp-mbox - qcom,nord-cpucp-mbox - qcom,sm8750-cpucp-mbox - const: qcom,x1e80100-cpucp-mbox diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 945a168b613d..33e0b1bad5ab 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -107,6 +107,7 @@ properties: - nxp,s32g3-gpr - qcom,apq8064-mmss-sfpb - qcom,apq8064-sps-sic + - qcom,msm8960-sps-sic - rockchip,px30-qos - rockchip,rk3036-qos - rockchip,rk3066-qos diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml index e51acdcaafaf..01250b556985 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml @@ -120,7 +120,9 @@ allOf: properties: qcom,glink-channels: items: - - const: adsp_apps + - enum: + - adsp_apps + - modem_apps power-domains: false else: properties: diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom-stats.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom-stats.yaml index 686a7ef2f48a..b384a5983d43 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom-stats.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom-stats.yaml @@ -18,15 +18,22 @@ description: properties: compatible: - enum: - - qcom,rpmh-stats - - qcom,sdm845-rpmh-stats - - qcom,rpm-stats - # For older RPM firmware versions with fixed offset for the sleep stats - - qcom,apq8084-rpm-stats - - qcom,msm8226-rpm-stats - - qcom,msm8916-rpm-stats - - qcom,msm8974-rpm-stats + oneOf: + - enum: + - qcom,rpmh-stats + - qcom,sdm845-rpmh-stats + - qcom,rpm-stats + # For older RPM firmware versions with fixed offset for the sleep stats + - qcom,apq8084-rpm-stats + - qcom,msm8226-rpm-stats + - qcom,msm8916-rpm-stats + - qcom,msm8974-rpm-stats + # SoC-specific compatibles that also read subsystem-level stats, + # falling back to "qcom,rpm-stats" for SoC-level stats only + - items: + - enum: + - qcom,shikra-rpm-stats + - const: qcom,rpm-stats reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/spmi/qcom,glymur-spmi-pmic-arb.yaml b/Documentation/devicetree/bindings/spmi/qcom,glymur-spmi-pmic-arb.yaml index 1593a1183a36..44c864fd5fc7 100644 --- a/Documentation/devicetree/bindings/spmi/qcom,glymur-spmi-pmic-arb.yaml +++ b/Documentation/devicetree/bindings/spmi/qcom,glymur-spmi-pmic-arb.yaml @@ -27,6 +27,7 @@ properties: - enum: - qcom,hawi-spmi-pmic-arb - qcom,kaanapali-spmi-pmic-arb + - qcom,maili-spmi-pmic-arb - const: qcom,glymur-spmi-pmic-arb - enum: - qcom,glymur-spmi-pmic-arb diff --git a/Documentation/devicetree/bindings/sram/qcom,imem.yaml b/Documentation/devicetree/bindings/sram/qcom,imem.yaml index b4f082f2af3a..2f120376a8f4 100644 --- a/Documentation/devicetree/bindings/sram/qcom,imem.yaml +++ b/Documentation/devicetree/bindings/sram/qcom,imem.yaml @@ -18,7 +18,6 @@ properties: items: - enum: - qcom,apq8064-imem - - qcom,ipq5424-imem - qcom,msm8226-imem - qcom,msm8974-imem - qcom,msm8976-imem diff --git a/Documentation/devicetree/bindings/sram/sram.yaml b/Documentation/devicetree/bindings/sram/sram.yaml index b83fc6831947..0acb7593045c 100644 --- a/Documentation/devicetree/bindings/sram/sram.yaml +++ b/Documentation/devicetree/bindings/sram/sram.yaml @@ -37,6 +37,7 @@ properties: - qcom,eliza-imem - qcom,glymur-imem - qcom,hawi-imem + - qcom,ipq5424-imem - qcom,kaanapali-imem - qcom,maili-imem - qcom,milos-imem diff --git a/drivers/firmware/qcom/Kconfig b/drivers/firmware/qcom/Kconfig index 691db0ded8e8..b50e1309ced5 100644 --- a/drivers/firmware/qcom/Kconfig +++ b/drivers/firmware/qcom/Kconfig @@ -26,8 +26,7 @@ config QCOM_PAS_TEE by the firmware TEE implementation as the backend. config QCOM_SCM - tristate "Qualcomm PAS SCM interface driver" - depends on ARCH_QCOM || COMPILE_TEST + tristate "Qualcomm PAS SCM interface driver" if ARCH_QCOM || COMPILE_TEST select QCOM_PAS select QCOM_TZMEM default y if ARCH_QCOM diff --git a/drivers/firmware/qcom/qcom_scm-legacy.c b/drivers/firmware/qcom/qcom_scm-legacy.c index 029e6d117cb8..fe751ee512da 100644 --- a/drivers/firmware/qcom/qcom_scm-legacy.c +++ b/drivers/firmware/qcom/qcom_scm-legacy.c @@ -219,7 +219,7 @@ int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc, * @res: SCM call return values * * This shall only be used with commands that are guaranteed to be - * uninterruptable, atomic and SMP safe. + * uninterruptible, atomic and SMP safe. */ int scm_legacy_call_atomic(struct device *unused, const struct qcom_scm_desc *desc, diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c index df20773dd754..43e250faea75 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -812,17 +812,27 @@ static void *qcom_scm_pas_get_rsc_table(struct device *dev, output_rt_tzm = __qcom_scm_pas_get_rsc_table(dev, ctx->pas_id, input_rt_tzm, input_rt_size, &size); - if (PTR_ERR(output_rt_tzm) == -EOVERFLOW) - /* Try again with the size requested by the TZ */ + if (PTR_ERR(output_rt_tzm) == -EOVERFLOW) { + /* Try again with a page-aligned size requested by the TZ. */ + size = PAGE_ALIGN(size); output_rt_tzm = __qcom_scm_pas_get_rsc_table(dev, ctx->pas_id, input_rt_tzm, input_rt_size, &size); + } if (IS_ERR(output_rt_tzm)) { ret = PTR_ERR(output_rt_tzm); goto free_input_rt; } + *output_rt_size = size; + + /* A zero-sized table means that TrustZone has no resource table. */ + if (!size) { + tbl_ptr = NULL; + goto free_output_rt; + } + tbl_ptr = kmemdup(output_rt_tzm, size, GFP_KERNEL); if (!tbl_ptr) { qcom_tzmem_free(output_rt_tzm); @@ -830,7 +840,7 @@ static void *qcom_scm_pas_get_rsc_table(struct device *dev, goto free_input_rt; } - *output_rt_size = size; +free_output_rt: qcom_tzmem_free(output_rt_tzm); free_input_rt: @@ -2234,6 +2244,7 @@ static const struct of_device_id qcom_scm_qseecom_allowlist[] __maybe_unused = { { .compatible = "lenovo,ideacentre-mini-01q8x10" }, { .compatible = "lenovo,thinkbook-16" }, { .compatible = "lenovo,thinkpad-t14s" }, + { .compatible = "lenovo,thinkpad-t14s-gen7" }, { .compatible = "lenovo,thinkpad-x13s", }, { .compatible = "lenovo,yoga-slim7x" }, { .compatible = "lenovo,yoga-slim7x-gen11" }, @@ -2245,7 +2256,9 @@ static const struct of_device_id qcom_scm_qseecom_allowlist[] __maybe_unused = { { .compatible = "microsoft,romulus13", }, { .compatible = "microsoft,romulus15", }, { .compatible = "qcom,glymur-crd" }, + { .compatible = "qcom,glymur-qcb" }, { .compatible = "qcom,hamoa-iot-evk" }, + { .compatible = "qcom,kalambo-crd" }, { .compatible = "qcom,mahua-crd" }, { .compatible = "qcom,purwa-iot-evk" }, { .compatible = "qcom,sc8180x-primus" }, diff --git a/drivers/firmware/qcom/qcom_tzmem.c b/drivers/firmware/qcom/qcom_tzmem.c index 0fd9581275f1..44cf80c84d7f 100644 --- a/drivers/firmware/qcom/qcom_tzmem.c +++ b/drivers/firmware/qcom/qcom_tzmem.c @@ -82,6 +82,7 @@ static const char *const qcom_tzmem_blacklist[] = { "qcom,sc8180x", "qcom,sdm670", /* failure in GPU firmware loading */ "qcom,sdm845", /* reset in rmtfs memory assignment */ + "qcom,sm7125", /* hang in rmtfs memory assignment */ "qcom,sm7150", /* reset in rmtfs memory assignment */ "qcom,sm8150", /* reset in rmtfs memory assignment */ NULL @@ -518,7 +519,7 @@ int qcom_tzmem_enable(struct device *dev) static int result; qcom_tzmem_dev = dev; - DO_ONCE(qcom_tzmem_do_init, &result); + DO_ONCE_SLEEPABLE(qcom_tzmem_do_init, &result); return result; } EXPORT_SYMBOL_GPL(qcom_tzmem_enable); diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c index 5e45a10663c4..d7a42a8040a1 100644 --- a/drivers/soc/qcom/llcc-qcom.c +++ b/drivers/soc/qcom/llcc-qcom.c @@ -1054,6 +1054,128 @@ static const struct llcc_slice_config kaanapali_data[] = { }, }; +static const struct llcc_slice_config nord_data[] = { + { + .usecase_id = LLCC_CPUSS, + .slice_id = 1, + .max_cap = 3072, + .priority = 0, + .bonus_ways = 0xff, + .activate_on_init = true, + .write_scid_en = true, + .write_scid_cacheable_en = true, + .vict_prio = true, + }, { + .usecase_id = LLCC_CMPT, + .slice_id = 34, + .max_cap = 0, + .priority = 1, + .fixed_size = true, + .bonus_ways = 0xff, + .vict_prio = true, + }, { + .usecase_id = LLCC_GPUHTW, + .slice_id = 11, + .max_cap = 512, + .priority = 1, + .fixed_size = true, + .bonus_ways = 0xff, + .vict_prio = true, + }, { + .usecase_id = LLCC_GPU, + .slice_id = 12, + .max_cap = 2048, + .priority = 1, + .fixed_size = true, + .bonus_ways = 0xff, + .write_scid_en = true, + .write_scid_cacheable_en = true, + .vict_prio = true, + }, { + .usecase_id = LLCC_MMUHWT, + .slice_id = 13, + .max_cap = 1024, + .priority = 1, + .fixed_size = true, + .bonus_ways = 0xff, + .activate_on_init = true, + .vict_prio = true, + }, { + .usecase_id = LLCC_CAMFW, + .slice_id = 20, + .max_cap = 512, + .priority = 2, + .fixed_size = true, + .bonus_ways = 0xff, + .vict_prio = true, + }, { + .usecase_id = LLCC_ECC, + .slice_id = 26, + .max_cap = 1536, + .priority = 3, + .fixed_size = true, + .bonus_ways = 0xff, + .activate_on_init = true, + .write_scid_en = true, + .write_scid_cacheable_en = true, + .vict_prio = true, + }, { + .usecase_id = LLCC_WRCACHE, + .slice_id = 31, + .max_cap = 2048, + .priority = 1, + .fixed_size = true, + .bonus_ways = 0xff, + .activate_on_init = true, + .vict_prio = true, + }, { + .usecase_id = LLCC_LCPDARE, + .slice_id = 30, + .max_cap = 512, + .priority = 3, + .fixed_size = true, + .bonus_ways = 0xff, + .activate_on_init = true, + .alloc_oneway_en = true, + .vict_prio = true, + }, { + .usecase_id = LLCC_COMPUTE1, + .slice_id = 22, + .max_cap = 0, + .priority = 1, + .fixed_size = true, + .bonus_ways = 0xff, + .vict_prio = true, + }, { + .usecase_id = LLCC_PCIE_TCU, + .slice_id = 15, + .max_cap = 0, + .priority = 1, + .fixed_size = true, + .bonus_ways = 0xff, + .activate_on_init = true, + .vict_prio = true, + }, { + .usecase_id = LLCC_GPU_LITTLE, + .slice_id = 9, + .max_cap = 2048, + .priority = 1, + .fixed_size = true, + .bonus_ways = 0xff, + .write_scid_en = true, + .write_scid_cacheable_en = true, + .vict_prio = true, + }, { + .usecase_id = LLCC_GPUHTW_LITTLE, + .slice_id = 14, + .max_cap = 512, + .priority = 1, + .fixed_size = true, + .bonus_ways = 0xff, + .vict_prio = true, + }, +}; + static const struct llcc_slice_config sa8775p_data[] = { { .usecase_id = LLCC_CPUSS, @@ -4484,6 +4606,17 @@ static const struct qcom_llcc_config glymur_cfg[] = { }, }; +static const struct qcom_llcc_config nord_cfg[] = { + { + .sct_data = nord_data, + .size = ARRAY_SIZE(nord_data), + .reg_offset = llcc_v6_reg_offset, + .edac_reg_offset = &llcc_v6_edac_reg_offset, + .num_banks = 16, + .no_edac = true, + }, +}; + static const struct qcom_llcc_config qcs615_cfg[] = { { .sct_data = qcs615_data, @@ -4751,6 +4884,11 @@ static const struct qcom_sct_config glymur_cfgs = { .num_config = ARRAY_SIZE(glymur_cfg), }; +static const struct qcom_sct_config nord_cfgs = { + .llcc_config = nord_cfg, + .num_config = ARRAY_SIZE(nord_cfg), +}; + static const struct qcom_sct_config qcs615_cfgs = { .llcc_config = qcs615_cfg, .num_config = ARRAY_SIZE(qcs615_cfg), @@ -5693,6 +5831,7 @@ static const struct of_device_id qcom_llcc_of_match[] = { { .compatible = "qcom,hawi-llcc", .data = &hawi_sct_cfgs }, { .compatible = "qcom,ipq5424-llcc", .data = &ipq5424_cfgs}, { .compatible = "qcom,kaanapali-llcc", .data = &kaanapali_cfgs}, + { .compatible = "qcom,nord-llcc", .data = &nord_cfgs}, { .compatible = "qcom,qcs615-llcc", .data = &qcs615_cfgs}, { .compatible = "qcom,qcs8300-llcc", .data = &qcs8300_cfgs}, { .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs}, diff --git a/drivers/soc/qcom/pmic_glink.c b/drivers/soc/qcom/pmic_glink.c index 3042261578aa..84fd0c82c0c4 100644 --- a/drivers/soc/qcom/pmic_glink.c +++ b/drivers/soc/qcom/pmic_glink.c @@ -250,7 +250,8 @@ static int pmic_glink_rpmsg_probe(struct rpmsg_device *rpdev) guard(mutex)(&__pmic_glink_lock); pg = __pmic_glink; if (!pg) - return dev_err_probe(&rpdev->dev, -ENODEV, "no pmic_glink device to attach to\n"); + return dev_err_probe(&rpdev->dev, -EPROBE_DEFER, + "no pmic_glink device to attach to\n"); dev_set_drvdata(&rpdev->dev, pg); pg->pdr_available = rpdev->id.driver_data; diff --git a/drivers/soc/qcom/pmic_pdcharger_ulog.c b/drivers/soc/qcom/pmic_pdcharger_ulog.c index 39f412bbf2c1..06cd9c4411c2 100644 --- a/drivers/soc/qcom/pmic_pdcharger_ulog.c +++ b/drivers/soc/qcom/pmic_pdcharger_ulog.c @@ -143,7 +143,7 @@ static void pmic_pdcharger_ulog_rpmsg_remove(struct rpmsg_device *rpdev) { struct pmic_pdcharger_ulog *pg = dev_get_drvdata(&rpdev->dev); - cancel_delayed_work_sync(&pg->ulog_work); + disable_delayed_work_sync(&pg->ulog_work); } static const struct rpmsg_device_id pmic_pdcharger_ulog_rpmsg_id_match[] = { diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-se.c index 6ac2bdc16984..074087c592cc 100644 --- a/drivers/soc/qcom/qcom-geni-se.c +++ b/drivers/soc/qcom/qcom-geni-se.c @@ -42,7 +42,7 @@ EXPORT_TRACEPOINT_SYMBOL_GPL(geni_se_regs); * * GENI based QUP is a highly-flexible and programmable module for supporting * a wide range of serial interfaces like UART, SPI, I2C, I3C, etc. A single - * QUP module can provide upto 8 serial interfaces, using its internal + * QUP module can provide up to 8 serial interfaces, using its internal * serial engines. The actual configuration is determined by the target * platform configuration. The protocol supported by each interface is * determined by the firmware loaded to the serial engine. Each SE consists @@ -101,22 +101,26 @@ EXPORT_TRACEPOINT_SYMBOL_GPL(geni_se_regs); * @base: Base address of this instance of QUP wrapper core * @clks: Handle to the primary & optional secondary AHB clocks * @num_clks: Count of clocks + * @prog_ram_depth: Available CFG RAM depth for instance without SE_HW_PARAM_2 */ struct geni_wrapper { struct device *dev; void __iomem *base; struct clk_bulk_data clks[MAX_CLKS]; unsigned int num_clks; + unsigned int prog_ram_depth; }; /** * struct geni_se_desc - Data structure to represent the QUP Wrapper resources * @clks: Name of the primary & optional secondary AHB clocks * @num_clks: Count of clock names + * @prog_ram_depth: Available CFG RAM depth for instance without SE_HW_PARAM_2 */ struct geni_se_desc { unsigned int num_clks; const char * const *clks; + unsigned int prog_ram_depth; }; static const char * const icc_path_names[] = {"qup-core", "qup-config", @@ -920,7 +924,7 @@ void geni_se_rx_dma_unprep(struct geni_se *se, dma_addr_t iova, size_t len) } EXPORT_SYMBOL_GPL(geni_se_rx_dma_unprep); -int geni_icc_get(struct geni_se *se, const char *icc_ddr) +int geni_icc_get(struct geni_se *se) { struct geni_icc_path *icc_paths = se->icc_paths; @@ -1217,7 +1221,7 @@ int geni_se_resources_init(struct geni_se *se) se->has_opp = (ret == 0); - ret = geni_icc_get(se, "qup-memory"); + ret = geni_icc_get(se); if (ret) return ret; @@ -1244,6 +1248,7 @@ static const struct se_fw_hdr *geni_find_protocol_fw(struct geni_se *se, const s enum geni_se_protocol_type protocol, u32 *fw_size_out) { + struct geni_wrapper *wrapper = se->wrapper; struct device *dev = se->dev; const struct elf32_hdr *ehdr; const struct elf32_phdr *phdrs; @@ -1308,8 +1313,11 @@ static const struct se_fw_hdr *geni_find_protocol_fw(struct geni_se *se, const s cfg_val_end = le16_to_cpu(sefw->cfg_val_offset) + le16_to_cpu(sefw->cfg_size_in_items) * sizeof(u32); - prog_ram_depth = FIELD_GET(PROG_RAM_DEPTH_MSK, - readl_relaxed(se->base + SE_HW_PARAM_2)); + if (wrapper->prog_ram_depth) + prog_ram_depth = wrapper->prog_ram_depth; + else + prog_ram_depth = FIELD_GET(PROG_RAM_DEPTH_MSK, + readl_relaxed(se->base + SE_HW_PARAM_2)); if (fw_size >= prog_ram_depth) { dev_err(dev, "Firmware size (%u) exceeds RAM size (%u)\n", fw_size, prog_ram_depth); @@ -1620,6 +1628,7 @@ static int geni_se_probe(struct platform_device *pdev) return PTR_ERR(wrapper->base); desc = device_get_match_data(&pdev->dev); + wrapper->prog_ram_depth = desc->prog_ram_depth; if (!has_acpi_companion(&pdev->dev) && desc->num_clks) { int i; @@ -1672,6 +1681,7 @@ static const char * const i2c_master_hub_clks[] = { static const struct geni_se_desc i2c_master_hub_desc = { .clks = i2c_master_hub_clks, .num_clks = ARRAY_SIZE(i2c_master_hub_clks), + .prog_ram_depth = 1020, }; static const struct of_device_id geni_se_dt_match[] = { diff --git a/drivers/soc/qcom/qcom_stats.c b/drivers/soc/qcom/qcom_stats.c index 06923408bfce..3422d6df7b51 100644 --- a/drivers/soc/qcom/qcom_stats.c +++ b/drivers/soc/qcom/qcom_stats.c @@ -371,6 +371,14 @@ static const struct stats_config rpm_data_dba0 = { .subsystem_stats_in_smem = false, }; +static const struct stats_config rpm_data_shikra = { + .stats_offset = 0, + .num_records = 2, + .appended_stats_avail = true, + .dynamic_offset = true, + .subsystem_stats_in_smem = true, +}; + static const struct stats_config rpmh_data_sdm845 = { .stats_offset = 0x48, .num_records = 2, @@ -396,6 +404,7 @@ static const struct of_device_id qcom_stats_table[] = { { .compatible = "qcom,rpm-stats", .data = &rpm_data }, { .compatible = "qcom,rpmh-stats", .data = &rpmh_data }, { .compatible = "qcom,sdm845-rpmh-stats", .data = &rpmh_data_sdm845 }, + { .compatible = "qcom,shikra-rpm-stats", .data = &rpm_data_shikra }, { } }; MODULE_DEVICE_TABLE(of, qcom_stats_table); diff --git a/drivers/soc/qcom/smp2p.c b/drivers/soc/qcom/smp2p.c index 3104e31f91c9..01b8580c9f27 100644 --- a/drivers/soc/qcom/smp2p.c +++ b/drivers/soc/qcom/smp2p.c @@ -411,15 +411,9 @@ static int smp2p_set_irq_type(struct irq_data *irqd, unsigned int type) if (!(type & IRQ_TYPE_EDGE_BOTH)) return -EINVAL; - if (type & IRQ_TYPE_EDGE_RISING) - set_bit(irq, entry->irq_rising); - else - clear_bit(irq, entry->irq_rising); + assign_bit(irq, entry->irq_rising, type & IRQ_TYPE_EDGE_RISING); - if (type & IRQ_TYPE_EDGE_FALLING) - set_bit(irq, entry->irq_falling); - else - clear_bit(irq, entry->irq_falling); + assign_bit(irq, entry->irq_falling, type & IRQ_TYPE_EDGE_FALLING); return 0; } diff --git a/drivers/soc/qcom/smsm.c b/drivers/soc/qcom/smsm.c index ac3c85a2597a..bb487bf6bf03 100644 --- a/drivers/soc/qcom/smsm.c +++ b/drivers/soc/qcom/smsm.c @@ -277,10 +277,8 @@ static void smsm_unmask_irq(struct irq_data *irqd) u32 val; /* Make sure our last cached state is up-to-date */ - if (readl(entry->remote_state) & BIT(irq)) - set_bit(irq, &entry->last_value); - else - clear_bit(irq, &entry->last_value); + assign_bit(irq, &entry->last_value, + readl(entry->remote_state) & BIT(irq)); set_bit(irq, entry->irq_enabled); @@ -304,15 +302,9 @@ static int smsm_set_irq_type(struct irq_data *irqd, unsigned int type) if (!(type & IRQ_TYPE_EDGE_BOTH)) return -EINVAL; - if (type & IRQ_TYPE_EDGE_RISING) - set_bit(irq, entry->irq_rising); - else - clear_bit(irq, entry->irq_rising); + assign_bit(irq, entry->irq_rising, type & IRQ_TYPE_EDGE_RISING); - if (type & IRQ_TYPE_EDGE_FALLING) - set_bit(irq, entry->irq_falling); - else - clear_bit(irq, entry->irq_falling); + assign_bit(irq, entry->irq_falling, type & IRQ_TYPE_EDGE_FALLING); return 0; } diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c index 63ee5cd561a2..38efc5db7fa8 100644 --- a/drivers/soc/qcom/socinfo.c +++ b/drivers/soc/qcom/socinfo.c @@ -542,8 +542,10 @@ static const struct soc_id soc_id[] = { { qcom_board_id(QCS9075) }, { qcom_board_id(QCS615) }, { qcom_board_id(SA8797P) }, + { qcom_board_id(SM8975) }, { qcom_board_id(CQ7790M) }, { qcom_board_id(CQ7790S) }, + { qcom_board_id(SM8950) }, { qcom_board_id(CQ2390M) }, { qcom_board_id(CQ2390S) }, { qcom_board_id(IQ2390S) }, diff --git a/drivers/soc/qcom/ubwc_config.c b/drivers/soc/qcom/ubwc_config.c index 36c90f72943f..a4d8769f8550 100644 --- a/drivers/soc/qcom/ubwc_config.c +++ b/drivers/soc/qcom/ubwc_config.c @@ -121,6 +121,7 @@ static const struct of_device_id qcom_ubwc_configs[] __maybe_unused = { { .compatible = "qcom,glymur", .data = &glymur_data}, { .compatible = "qcom,hawi", .data = &ubwc_7_0_hbb16 }, { .compatible = "qcom,kaanapali", .data = &ubwc_6_0_hbb16 }, + { .compatible = "qcom,kalambo", .data = &glymur_data }, { .compatible = "qcom,mahua", .data = &glymur_data }, { .compatible = "qcom,maili", .data = &ubwc_7_0_hbb16, }, { .compatible = "qcom,milos", .data = &milos_data }, @@ -130,6 +131,7 @@ static const struct of_device_id qcom_ubwc_configs[] __maybe_unused = { { .compatible = "qcom,msm8937", .data = &ubwc_1_0_hbb14 }, { .compatible = "qcom,msm8929", .data = &no_ubwc_data }, { .compatible = "qcom,msm8939", .data = &no_ubwc_data }, + { .compatible = "qcom,msm8952", .data = &no_ubwc_data }, { .compatible = "qcom,msm8953", .data = &ubwc_1_0_hbb14 }, { .compatible = "qcom,msm8956", .data = &no_ubwc_data }, { .compatible = "qcom,msm8974", .data = &no_ubwc_data }, diff --git a/include/dt-bindings/arm/qcom,ids.h b/include/dt-bindings/arm/qcom,ids.h index b63e4a0b8e54..135297027580 100644 --- a/include/dt-bindings/arm/qcom,ids.h +++ b/include/dt-bindings/arm/qcom,ids.h @@ -301,8 +301,10 @@ #define QCOM_ID_QCS9075 676 #define QCOM_ID_QCS615 680 #define QCOM_ID_SA8797P 690 +#define QCOM_ID_SM8975 707 #define QCOM_ID_CQ7790M 731 #define QCOM_ID_CQ7790S 732 +#define QCOM_ID_SM8950 735 #define QCOM_ID_CQ2390M 756 #define QCOM_ID_CQ2390S 758 #define QCOM_ID_IQ2390S 759 diff --git a/include/linux/soc/qcom/geni-se.h b/include/linux/soc/qcom/geni-se.h index 29a53bbc0dd4..95c0cc4d4ea1 100644 --- a/include/linux/soc/qcom/geni-se.h +++ b/include/linux/soc/qcom/geni-se.h @@ -573,7 +573,7 @@ void geni_se_tx_dma_unprep(struct geni_se *se, dma_addr_t iova, size_t len); void geni_se_rx_dma_unprep(struct geni_se *se, dma_addr_t iova, size_t len); -int geni_icc_get(struct geni_se *se, const char *icc_ddr); +int geni_icc_get(struct geni_se *se); int geni_icc_set_bw(struct geni_se *se); int geni_icc_set_bw_ab(struct geni_se *se, u32 core_ab, u32 cfg_ab, u32 ddr_ab); diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h index 1ccc429401e8..713cb0221b14 100644 --- a/include/linux/soc/qcom/llcc-qcom.h +++ b/include/linux/soc/qcom/llcc-qcom.h @@ -74,6 +74,7 @@ #define LLCC_CAMSRTIP 73 #define LLCC_CAMRTRF 74 #define LLCC_CAMSRTRF 75 +#define LLCC_GPU_LITTLE 80 #define LLCC_OOBM_NS 81 #define LLCC_OOBM_S 82 #define LLCC_VIDEO_APV 83 @@ -85,6 +86,7 @@ #define LLCC_CAM_OFE_STROV 93 #define LLCC_CPUSS_HEU 94 #define LLCC_PCIE_TCU 97 +#define LLCC_GPUHTW_LITTLE 98 #define LLCC_MDM_PNG_FIXED 100 #define LLCC_PPE_RXDESC 101 #define LLCC_PPE_RXFILL 102