github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-06-03 20:14:06 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

MIPS: Loongson64: dts: fix phy-related definition of LS7A GMAC

Browse Source 
Currently the LS7A GMAC device tree node lacks a proper phy-handle
property pointing to the PHY node.

In addition, the phy-mode property specifies "rgmii" without any
internal delay information, which means the board trace needs to add 2ns
delay to the RGMII data lines; but that isn't known to happen on any
Loongson board. The ACPI-based initialization codepath, which is used on
LoongArch-based 3A5000 + 7A1000 hardwares, specifies "rgmii-id" phy
mode, which should be the one we are using.

Add the lacking phy-handle property and set proper phy-mode.

Tested on a LS3A4000_7A1000_NUC_BOARD_V2.1 board with YT8521S PHY.

Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
Icenowy Zheng 2026-01-02 23:52:43 +08:00 committed by Thomas Bogendoerfer
parent 026d70dcfe
commit e4ec36bf7b
1 changed files with 4 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/mips/boot/dts/loongson/ls7a-pch.dtsi
View File

@ -199,7 +199,8 @@ gmac@3,0 {
<13 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq", "eth_lpi";
interrupt-parent = <&pic>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
@ -222,7 +223,8 @@ gmac@3,1 {
<15 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq", "eth_lpi";
interrupt-parent = <&pic>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-handle = <&phy1>;
mdio {
#address-cells = <1>;
#size-cells = <0>;