From e4c9cc73887eab58368499dcab3c6b7dc04a3102 Mon Sep 17 00:00:00 2001 From: Christophe Parant Date: Wed, 10 Dec 2025 11:16:09 +0100 Subject: [PATCH] ARM: dts: stm32: phycore-stm32mp15: Disable optional SoM peripherals Following peripherals are optional on phyCORE-STM32MP15x following PHYTEC standard SoM variants: external RTC, EEPROM, SPI NOR. Also NAND (fmc) can be populated instead of eMMC (sdmmc2). So disable those peripherals on SoM dtsi file and enable them on board dts file. Additionally, enable by default the "DTS" SoC IP on common SoM dtsi file as it is not an optional IP in STM32MP15x SoC. Signed-off-by: Christophe Parant Link: https://lore.kernel.org/r/20251210101611.27008-10-c.parant@phytec.fr Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp157c-phyboard-sargas-rdk.dts | 8 -------- arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi | 9 ++++++++- 2 files changed, 8 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/st/stm32mp157c-phyboard-sargas-rdk.dts b/arch/arm/boot/dts/st/stm32mp157c-phyboard-sargas-rdk.dts index f7c02a381304..c90b12a479c9 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-phyboard-sargas-rdk.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-phyboard-sargas-rdk.dts @@ -22,14 +22,6 @@ &cryp1 { status = "okay"; }; -&dts { - status = "okay"; -}; - -&fmc { - status = "disabled"; -}; - &gpu { status = "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi index ce859b94ae26..3f60f184978c 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi @@ -265,11 +265,13 @@ i2c4_eeprom: eeprom@50 { compatible = "microchip,24c32", "atmel,24c32"; reg = <0x50>; + status = "disabled"; }; i2c4_rtc: rtc@52 { compatible = "microcrystal,rv3028"; reg = <0x52>; + status = "disabled"; }; }; @@ -307,7 +309,7 @@ &qspi_bk1_sleep_pins_a &qspi_cs1_sleep_pins_a>; reg = <0x58003000 0x1000>, <0x70000000 0x1000000>; - status = "okay"; + status = "disabled"; flash0: flash@0 { compatible = "winbond,w25q128", "jedec,spi-nor"; @@ -328,6 +330,10 @@ &rtc { status = "okay"; }; +&dts { + status = "okay"; +}; + &sdmmc2 { pinctrl-names = "default", "opendrain", "sleep"; pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_e>; @@ -341,4 +347,5 @@ &sdmmc2 { vmmc-supply = <&v3v3>; vqmmc-supply = <&v3v3>; mmc-ddr-3_3v; + status = "disabled"; };