drm/i915/dsb: Introduce intel_dsb_align_tail()

Move the DSB tail cacheline alignment to a helper. No need to pollute
the caller with mundane details like this.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221216003810.13338-10-ville.syrjala@linux.intel.com
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
This commit is contained in:
Ville Syrjälä 2022-12-16 02:38:06 +02:00
parent 2f65fb5466
commit e485a3e6a2

View File

@ -187,6 +187,22 @@ void intel_dsb_reg_write(struct intel_dsb *dsb,
}
}
static u32 intel_dsb_align_tail(struct intel_dsb *dsb)
{
u32 aligned_tail, tail;
tail = dsb->free_pos * 4;
aligned_tail = ALIGN(tail, CACHELINE_BYTES);
if (aligned_tail > tail)
memset(&dsb->cmd_buf[dsb->free_pos], 0,
aligned_tail - tail);
dsb->free_pos = aligned_tail / 4;
return aligned_tail;
}
/**
* intel_dsb_commit() - Trigger workload execution of DSB.
* @dsb: DSB context
@ -200,14 +216,10 @@ void intel_dsb_commit(struct intel_dsb *dsb)
enum pipe pipe = crtc->pipe;
u32 tail;
if (!(dsb && dsb->free_pos))
tail = intel_dsb_align_tail(dsb);
if (tail == 0)
return;
tail = ALIGN(dsb->free_pos * 4, CACHELINE_BYTES);
if (tail > dsb->free_pos * 4)
memset(&dsb->cmd_buf[dsb->free_pos], 0,
(tail - dsb->free_pos * 4));
if (is_dsb_busy(dev_priv, pipe, dsb->id)) {
drm_err(&dev_priv->drm, "DSB engine is busy.\n");
goto reset;