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drm/i915/xehpsdv: Correct parameters for IS_XEHPSDV_GT_STEP()

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During a rebase the parameters were partially renamed, but not
completely.  Since the subsequent patches that start using this macro
haven't landed on an upstream tree yet this didn't cause a build
failure.

Fixes: 086df54e20 ("drm/i915/xehpsdv: add initial XeHP SDV definitions")
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Caz Yokoyama <caz.yokoyama@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210723174239.1551352-2-matthew.d.roper@intel.com
This commit is contained in:
Matt Roper 2021-07-23 10:42:10 -07:00
parent e754dccbc9
commit e43c5261a6
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/i915/i915_drv.h
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@ -1560,8 +1560,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
(IS_ALDERLAKE_P(__i915) && \
IS_GT_STEP(__i915, since, until))
#define IS_XEHPSDV_GT_STEP(p, since, until) \
(IS_XEHPSDV(p) && IS_GT_STEP(__i915, since, until))
#define IS_XEHPSDV_GT_STEP(__i915, since, until) \
(IS_XEHPSDV(__i915) && IS_GT_STEP(__i915, since, until))
/*
* DG2 hardware steppings are a bit unusual. The hardware design was forked