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arm64: dts: ti: k3-j784s4-j742s2-evm-common: Enable ACSPCIE0 output for PCIe1

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The PCIe reference clock required by the PCIe Endpoints connected to the
PCIe connector corresponding to the PCIe1 instance of PCIe on J784S4-EVM
and J742S2-EVM is driven by the ACSPCIE0 module. Add the device-tree
support for enabling the same.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250422123218.3788223-3-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
This commit is contained in:
Siddharth Vadapalli 2025-04-22 18:02:18 +05:30 committed by Nishanth Menon
parent 9bfebd8750
commit e3dfcf482d
1 changed files with 6 additions and 0 deletions
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6
arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
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@ -5,6 +5,9 @@
* EVM Board Schematics(j784s4): https://www.ti.com/lit/zip/sprr458
* EVM Board Schematics(j742s2): https://www.ti.com/lit/zip/SPAC001
*/
#include <dt-bindings/phy/phy-cadence.h>
/ {
chosen {
stdout-path = "serial2:115200n8";
@ -1407,10 +1410,13 @@ &main_mcan4 {
&pcie1_rc {
status = "okay";
clocks = <&k3_clks 333 0>, <&serdes0 CDNS_TORRENT_REFCLK_DRIVER>;
clock-names = "fck", "pcie_refclk";
num-lanes = <2>;
reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
phys = <&serdes0_pcie1_link>;
phy-names = "pcie-phy";
ti,syscon-acspcie-proxy-ctrl = <&acspcie0_proxy_ctrl 0x1>;
};
&serdes1 {