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arm64: dts: renesas: r9a09g057: Add OSTM0-OSTM7 nodes

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Add OSTM0-OSTM7 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Lad Prabhakar 2024-08-28 13:41:29 +01:00 committed by Geert Uytterhoeven
parent 2fddca72dc
commit e3dc593ef3
1 changed files with 80 additions and 0 deletions
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80
arch/arm64/boot/dts/renesas/r9a09g057.dtsi
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@ -121,6 +121,86 @@ sys: system-controller@10430000 {
status = "disabled";
};
ostm0: timer@11800000 {
compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
reg = <0x0 0x11800000 0x0 0x1000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_EDGE_RISING>;
clocks = <&cpg CPG_MOD 0x43>;
resets = <&cpg 0x6d>;
power-domains = <&cpg>;
status = "disabled";
};
ostm1: timer@11801000 {
compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
reg = <0x0 0x11801000 0x0 0x1000>;
interrupts = <GIC_SPI 18 IRQ_TYPE_EDGE_RISING>;
clocks = <&cpg CPG_MOD 0x44>;
resets = <&cpg 0x6e>;
power-domains = <&cpg>;
status = "disabled";
};
ostm2: timer@14000000 {
compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
reg = <0x0 0x14000000 0x0 0x1000>;
interrupts = <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>;
clocks = <&cpg CPG_MOD 0x45>;
resets = <&cpg 0x6f>;
power-domains = <&cpg>;
status = "disabled";
};
ostm3: timer@14001000 {
compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
reg = <0x0 0x14001000 0x0 0x1000>;
interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>;
clocks = <&cpg CPG_MOD 0x46>;
resets = <&cpg 0x70>;
power-domains = <&cpg>;
status = "disabled";
};
ostm4: timer@12c00000 {
compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
reg = <0x0 0x12c00000 0x0 0x1000>;
interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
clocks = <&cpg CPG_MOD 0x47>;
resets = <&cpg 0x71>;
power-domains = <&cpg>;
status = "disabled";
};
ostm5: timer@12c01000 {
compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
reg = <0x0 0x12c01000 0x0 0x1000>;
interrupts = <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>;
clocks = <&cpg CPG_MOD 0x48>;
resets = <&cpg 0x72>;
power-domains = <&cpg>;
status = "disabled";
};
ostm6: timer@12c02000 {
compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
reg = <0x0 0x12c02000 0x0 0x1000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
clocks = <&cpg CPG_MOD 0x49>;
resets = <&cpg 0x73>;
power-domains = <&cpg>;
status = "disabled";
};
ostm7: timer@12c03000 {
compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
reg = <0x0 0x12c03000 0x0 0x1000>;
interrupts = <GIC_SPI 24 IRQ_TYPE_EDGE_RISING>;
clocks = <&cpg CPG_MOD 0x4a>;
resets = <&cpg 0x74>;
power-domains = <&cpg>;
status = "disabled";
};
scif: serial@11c01400 {
compatible = "renesas,scif-r9a09g057";
reg = <0 0x11c01400 0 0x400>;