From f48e3d687e06f27c6eebc7bc72ec6875fd25c75d Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Tue, 16 Feb 2016 15:16:00 +0100 Subject: [PATCH 1/6] ARM: stm32: Supply a DTS file for the STM32F469 Discovery board It's pretty similar to the STM32F429, but there are some subtle changes required to boot successfully. Signed-off-by: Lee Jones Acked-by: Arnd Bergmann Signed-off-by: Maxime Coquelin --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/stm32f469-disco.dts | 75 +++++++++++++++++++++++++++ 2 files changed, 76 insertions(+) create mode 100644 arch/arm/boot/dts/stm32f469-disco.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index a4a6d70e8b26..baf37c9cab4d 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -611,6 +611,7 @@ dtb-$(CONFIG_ARCH_STI) += \ stih418-b2199.dtb dtb-$(CONFIG_ARCH_STM32)+= \ stm32f429-disco.dtb \ + stm32f469-disco.dtb \ stm32429i-eval.dtb dtb-$(CONFIG_MACH_SUN4I) += \ sun4i-a10-a1000.dtb \ diff --git a/arch/arm/boot/dts/stm32f469-disco.dts b/arch/arm/boot/dts/stm32f469-disco.dts new file mode 100644 index 000000000000..e911af836471 --- /dev/null +++ b/arch/arm/boot/dts/stm32f469-disco.dts @@ -0,0 +1,75 @@ +/* + * Copyright 2016 - Lee Jones + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this file; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "stm32f429.dtsi" + +/ { + model = "STMicroelectronics STM32F469i-DISCO board"; + compatible = "st,stm32f469i-disco", "st,stm32f469"; + + chosen { + bootargs = "root=/dev/ram rdinit=/linuxrc"; + stdout-path = "serial0:115200n8"; + }; + + memory { + reg = <0x00000000 0x800000>; + }; + + aliases { + serial0 = &usart3; + }; +}; + +&clk_hse { + clock-frequency = <8000000>; +}; + +&usart3 { + status = "okay"; +}; From a985b66ae55838897234f69cab737e17e75c7420 Mon Sep 17 00:00:00 2001 From: Maxime Coquelin Date: Tue, 23 Feb 2016 13:35:25 +0100 Subject: [PATCH 2/6] ARM: dts: stm32f429: Fix clocks referenced by GPIO banks All the clocks referenced by the GPIO banks were not the good ones. Reported-by: Bruno Herrera Signed-off-by: Maxime Coquelin --- arch/arm/boot/dts/stm32f429.dtsi | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index 35b2ab13b624..598362efaf01 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -182,7 +182,7 @@ gpioa: gpio@40020000 { gpio-controller; #gpio-cells = <2>; reg = <0x0 0x400>; - clocks = <&rcc 0 256>; + clocks = <&rcc 0 0>; st,bank-name = "GPIOA"; }; @@ -190,7 +190,7 @@ gpiob: gpio@40020400 { gpio-controller; #gpio-cells = <2>; reg = <0x400 0x400>; - clocks = <&rcc 0 257>; + clocks = <&rcc 0 1>; st,bank-name = "GPIOB"; }; @@ -198,7 +198,7 @@ gpioc: gpio@40020800 { gpio-controller; #gpio-cells = <2>; reg = <0x800 0x400>; - clocks = <&rcc 0 258>; + clocks = <&rcc 0 2>; st,bank-name = "GPIOC"; }; @@ -206,7 +206,7 @@ gpiod: gpio@40020c00 { gpio-controller; #gpio-cells = <2>; reg = <0xc00 0x400>; - clocks = <&rcc 0 259>; + clocks = <&rcc 0 3>; st,bank-name = "GPIOD"; }; @@ -214,7 +214,7 @@ gpioe: gpio@40021000 { gpio-controller; #gpio-cells = <2>; reg = <0x1000 0x400>; - clocks = <&rcc 0 260>; + clocks = <&rcc 0 4>; st,bank-name = "GPIOE"; }; @@ -222,7 +222,7 @@ gpiof: gpio@40021400 { gpio-controller; #gpio-cells = <2>; reg = <0x1400 0x400>; - clocks = <&rcc 0 261>; + clocks = <&rcc 0 5>; st,bank-name = "GPIOF"; }; @@ -230,7 +230,7 @@ gpiog: gpio@40021800 { gpio-controller; #gpio-cells = <2>; reg = <0x1800 0x400>; - clocks = <&rcc 0 262>; + clocks = <&rcc 0 6>; st,bank-name = "GPIOG"; }; @@ -238,7 +238,7 @@ gpioh: gpio@40021c00 { gpio-controller; #gpio-cells = <2>; reg = <0x1c00 0x400>; - clocks = <&rcc 0 263>; + clocks = <&rcc 0 7>; st,bank-name = "GPIOH"; }; @@ -246,7 +246,7 @@ gpioi: gpio@40022000 { gpio-controller; #gpio-cells = <2>; reg = <0x2000 0x400>; - clocks = <&rcc 0 264>; + clocks = <&rcc 0 8>; st,bank-name = "GPIOI"; }; @@ -254,7 +254,7 @@ gpioj: gpio@40022400 { gpio-controller; #gpio-cells = <2>; reg = <0x2400 0x400>; - clocks = <&rcc 0 265>; + clocks = <&rcc 0 9>; st,bank-name = "GPIOJ"; }; @@ -262,7 +262,7 @@ gpiok: gpio@40022800 { gpio-controller; #gpio-cells = <2>; reg = <0x2800 0x400>; - clocks = <&rcc 0 266>; + clocks = <&rcc 0 10>; st,bank-name = "GPIOK"; }; From c8cc1b727f989a46cb8823ae3c152b7e69aed028 Mon Sep 17 00:00:00 2001 From: Maxime Coquelin Date: Tue, 23 Feb 2016 17:11:42 +0100 Subject: [PATCH 3/6] ARM: dts: stm32429i-eval: Add USB HS host mode support This patch adds USB HS support in host mode only. This port supports OTG mode, but the device more is not working properly as of now. Once the device mode fixed, the node will be updated to support OTG. Signed-off-by: Maxime Coquelin --- arch/arm/boot/dts/stm32429i-eval.dts | 16 +++++++++++++++ arch/arm/boot/dts/stm32f429.dtsi | 30 ++++++++++++++++++++++++++++ 2 files changed, 46 insertions(+) diff --git a/arch/arm/boot/dts/stm32429i-eval.dts b/arch/arm/boot/dts/stm32429i-eval.dts index 1ae57fad12d3..76a10d3b0e05 100644 --- a/arch/arm/boot/dts/stm32429i-eval.dts +++ b/arch/arm/boot/dts/stm32429i-eval.dts @@ -81,6 +81,13 @@ blue { gpios = <&gpiog 12 1>; }; }; + + usbotg_hs_phy: usbphy { + #phy-cells = <0>; + compatible = "usb-nop-xceiv"; + clocks = <&rcc 0 30>; + clock-names = "main_clk"; + }; }; &clk_hse { @@ -92,3 +99,12 @@ &usart1 { pinctrl-names = "default"; status = "okay"; }; + +&usbotg_hs { + dr_mode = "host"; + phys = <&usbotg_hs_phy>; + phy-names = "usb2-phy"; + pinctrl-0 = <&usbotg_hs_pins_a>; + pinctrl-names = "default"; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index 598362efaf01..ee8275645127 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -278,6 +278,26 @@ pins2 { bias-disable; }; }; + + usbotg_hs_pins_a: usbotg_hs@0 { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + ; + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + }; }; rcc: rcc@40023810 { @@ -318,6 +338,16 @@ dma2: dma-controller@40026400 { st,mem2mem; }; + usbotg_hs: usb@40040000 { + compatible = "snps,dwc2"; + dma-ranges; + reg = <0x40040000 0x40000>; + interrupts = <77>; + clocks = <&rcc 0 29>; + clock-names = "otg"; + status = "disabled"; + }; + rng: rng@50060800 { compatible = "st,stm32-rng"; reg = <0x50060800 0x400>; From e78b6555e036fd2c302f04efb78f8b41166d91b3 Mon Sep 17 00:00:00 2001 From: Alexandre TORGUE Date: Mon, 29 Feb 2016 17:29:00 +0100 Subject: [PATCH 4/6] ARM: dts: stm32f429: Add system config bank node Signed-off-by: Alexandre TORGUE Signed-off-by: Maxime Coquelin --- arch/arm/boot/dts/stm32f429.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index ee8275645127..3563ac531a3f 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -171,6 +171,11 @@ usart6: serial@40011400 { status = "disabled"; }; + syscfg: system-config@40013800 { + compatible = "syscon"; + reg = <0x40013800 0x400>; + }; + pin-controller { #address-cells = <1>; #size-cells = <1>; From 9ee33d660d6b313fe908f57ed5a4b196586b805d Mon Sep 17 00:00:00 2001 From: Alexandre TORGUE Date: Mon, 29 Feb 2016 17:29:00 +0100 Subject: [PATCH 5/6] ARM: dts: stm32f429: Add Ethernet support Add Ethernet support (Synopsys MAC IP 3.50a) on stm32f429 SOC. Signed-off-by: Alexandre TORGUE Signed-off-by: Maxime Coquelin --- arch/arm/boot/dts/stm32f429.dtsi | 35 ++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index 3563ac531a3f..35df462559ca 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -303,6 +303,26 @@ pins { slew-rate = <2>; }; }; + + ethernet0_mii: mii@0 { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + ; + slew-rate = <2>; + }; + }; }; rcc: rcc@40023810 { @@ -343,6 +363,21 @@ dma2: dma-controller@40026400 { st,mem2mem; }; + ethernet0: dwmac@40028000 { + compatible = "st,stm32-dwmac", "snps,dwmac-3.50a"; + reg = <0x40028000 0x8000>; + reg-names = "stmmaceth"; + interrupts = <61>, <62>; + interrupt-names = "macirq", "eth_wake_irq"; + clock-names = "stmmaceth", "tx-clk", "rx-clk"; + clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>; + st,syscon = <&syscfg 0x4>; + snps,pbl = <8>; + snps,mixed-burst; + dma-ranges; + status = "disabled"; + }; + usbotg_hs: usb@40040000 { compatible = "snps,dwc2"; dma-ranges; From 13759544fe17a5f179ce17163fd15b0ebd25b0ad Mon Sep 17 00:00:00 2001 From: Alexandre TORGUE Date: Mon, 29 Feb 2016 17:29:00 +0100 Subject: [PATCH 6/6] ARM: dts: stm32f429: Enable Ethernet on Eval board MAC is connected to a PHY in MII mode. Signed-off-by: Alexandre TORGUE Signed-off-by: Maxime Coquelin --- arch/arm/boot/dts/stm32429i-eval.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/stm32429i-eval.dts b/arch/arm/boot/dts/stm32429i-eval.dts index 76a10d3b0e05..6bfc5959dac3 100644 --- a/arch/arm/boot/dts/stm32429i-eval.dts +++ b/arch/arm/boot/dts/stm32429i-eval.dts @@ -94,6 +94,21 @@ &clk_hse { clock-frequency = <25000000>; }; +ðernet0 { + status = "okay"; + pinctrl-0 = <ðernet0_mii>; + pinctrl-names = "default"; + phy-mode = "mii-id"; + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + phy1: ethernet-phy@1 { + reg = <1>; + }; + }; +}; + &usart1 { pinctrl-0 = <&usart1_pins_a>; pinctrl-names = "default";