From e3addf1b773964eac7f797e8538c69481be4279c Mon Sep 17 00:00:00 2001 From: Nitin Garg Date: Fri, 27 Mar 2015 14:47:51 -0500 Subject: [PATCH] MLK-10496: detect PL310 version for applying errata Apply errata based on PL310 version instead of compile time. Also set Prefetch offset to 15, since it improves memcpy performance by 35%. Don't enable Incr double Linefill enable since it adversely affects memcpy performance by about 32MB/s and reads by 90MB/s. Tested with 4K to 16MB sized src and dst aligned buffer. Conflicts: arch/arm/mach-imx/system.c Signed-off-by: Nitin Garg (cherry picked from commit 8b44de98abb0254bfbf2259673a97bd715e9f5d3) --- arch/arm/mach-imx/system.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c index 51c35013b673..568d06e4ec62 100644 --- a/arch/arm/mach-imx/system.c +++ b/arch/arm/mach-imx/system.c @@ -1,7 +1,7 @@ /* * Copyright (C) 1999 ARM Limited * Copyright (C) 2000 Deep Blue Solutions Ltd - * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2006-2015 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Juergen Beisert, kernel@pengutronix.de * Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com * @@ -94,7 +94,7 @@ void __init imx_init_l2cache(void) { void __iomem *l2x0_base; struct device_node *np; - unsigned int val; + unsigned int val, cache_id; np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache"); if (!np) @@ -107,20 +107,26 @@ void __init imx_init_l2cache(void) } /* Configure the L2 PREFETCH and POWER registers */ + /* Set prefetch offset with any value except 23 as per errata 765569 */ val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL); - val |= 0x70800000; + val |= 0x7000000f; /* * The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0 - * The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2 + * The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL/SX/DQP + * is r3p2. * But according to ARM PL310 errata: 752271 * ID: 752271: Double linefill feature can cause data corruption * Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2 * Workaround: The only workaround to this erratum is to disable the * double linefill feature. This is the default behavior. */ - if (cpu_is_imx6q()) - val &= ~(1 << 30 | 1 << 23); + cache_id = readl_relaxed(l2x0_base + L2X0_CACHE_ID); + if (((cache_id & L2X0_CACHE_ID_PART_MASK) == L2X0_CACHE_ID_PART_L310) + && ((cache_id & L2X0_CACHE_ID_RTL_MASK) < L310_CACHE_ID_RTL_R3P2)) + val &= ~(1 << 30); writel_relaxed(val, l2x0_base + L310_PREFETCH_CTRL); + val = L310_DYNAMIC_CLK_GATING_EN | L310_STNDBY_MODE_EN; + writel_relaxed(val, l2x0_base + L310_POWER_CTRL); iounmap(l2x0_base); of_node_put(np);