github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-05-31 18:43:33 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

drm/i915: Apply the i915gm/i945gm irq C-state w/a to CRC interrupts

Browse Source 
Turns out CRC interrupts also fail to wake up i915gm/i945gm from
C2+. I suppose this is a generic problem, but for most other
interrupts the system will be busy enough already prior to
the irq being issued. But CRC interrupts are like vblank interrupts
and only fire once per frame, so plenty of time to fall asleep
in between them.

Apply the same core clock gating trick to CRC interrupts
that we use for vblank interrupts.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241001195803.3371-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Ville Syrjälä 2024-10-01 22:58:03 +03:00
parent f45cc1d373
commit e2f5812ebf
3 changed files with 20 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
drivers/gpu/drm/i915/display/intel_display_irq.c
View File

@ -1264,10 +1264,10 @@ static void i915gm_irq_cstate_wa_enable(struct drm_i915_private *i915)
lockdep_assert_held(&i915->drm.vblank_time_lock);
/*
* Vblank interrupts fail to wake the device up from C2+.
* Vblank/CRC interrupts fail to wake the device up from C2+.
* Disabling render clock gating during C-states avoids
* the problem. There is a small power cost so we do this
* only when vblank interrupts are actually enabled.
* only when vblank/CRC interrupts are actually enabled.
*/
if (i915->display.irq.vblank_enabled++ == 0)
intel_uncore_write(&i915->uncore, SCPD0, _MASKED_BIT_ENABLE(CSTATE_RENDER_CLOCK_GATE_DISABLE));
@ -1281,6 +1281,18 @@ static void i915gm_irq_cstate_wa_disable(struct drm_i915_private *i915)
intel_uncore_write(&i915->uncore, SCPD0, _MASKED_BIT_DISABLE(CSTATE_RENDER_CLOCK_GATE_DISABLE));
}
void i915gm_irq_cstate_wa(struct drm_i915_private *i915, bool enable)
{
spin_lock_irq(&i915->drm.vblank_time_lock);
if (enable)
i915gm_irq_cstate_wa_enable(i915);
else
i915gm_irq_cstate_wa_disable(i915);
spin_unlock_irq(&i915->drm.vblank_time_lock);
}
int i8xx_enable_vblank(struct drm_crtc *crtc)
{
struct drm_i915_private *dev_priv = to_i915(crtc->dev);

2
drivers/gpu/drm/i915/display/intel_display_irq.h
View File

@ -78,4 +78,6 @@ void valleyview_pipestat_irq_handler(struct drm_i915_private *i915, u32 pipe_sta
void intel_display_irq_init(struct drm_i915_private *i915);
void i915gm_irq_cstate_wa(struct drm_i915_private *i915, bool enable);
#endif /* __INTEL_DISPLAY_IRQ_H__ */

4
drivers/gpu/drm/i915/display/intel_pipe_crc.c
View File

@ -32,6 +32,7 @@
#include "i915_reg.h"
#include "intel_atomic.h"
#include "intel_de.h"
#include "intel_display_irq.h"
#include "intel_display_types.h"
#include "intel_pipe_crc.h"
#include "intel_pipe_crc_regs.h"
@ -285,6 +286,9 @@ intel_crtc_crc_setup_workarounds(struct intel_crtc *crtc, bool enable)
struct drm_modeset_acquire_ctx ctx;
int ret;
if (IS_I945GM(dev_priv) || IS_I915GM(dev_priv))
i915gm_irq_cstate_wa(dev_priv, enable);
drm_modeset_acquire_init(&ctx, 0);
state = drm_atomic_state_alloc(&dev_priv->drm);