From e2d48e8395a43e8264660ac37a75f7644d4f5d8b Mon Sep 17 00:00:00 2001 From: Dibin Moolakadan Subrahmanian Date: Fri, 27 Mar 2026 12:14:52 +0530 Subject: [PATCH] drm/i915/dmc: Remove invalid PIPEDMC interrupt bits On display version 35+ PIPEDMC_ATS_FAULT and PIPEDMC_GTT_FAULT interrupt bits are no longer defined. Update the interrupt mask to drop these. Changes in v2: - Move PIPEDMC_ERROR interrupt enable to a separate patch (Ville Syrjala) Changes in v3: - Add Bspec reference (Suraj Kandpal) Changes in v4: - Move bspec position in commit message(Suraj Kandpal) Bspec: 70296 Signed-off-by: Dibin Moolakadan Subrahmanian Reviewed-by: Suraj Kandpal Signed-off-by: Suraj Kandpal Link: https://patch.msgid.link/20260327064453.2241523-2-dibin.moolakadan.subrahmanian@intel.com --- drivers/gpu/drm/i915/display/intel_dmc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index 1667a829e708..1d2e09471ba4 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.c +++ b/drivers/gpu/drm/i915/display/intel_dmc.c @@ -505,6 +505,9 @@ static void pipedmc_clock_gating_wa(struct intel_display *display, bool enable) static u32 pipedmc_interrupt_mask(struct intel_display *display) { + if (DISPLAY_VER(display) >= 35) + return PIPEDMC_FLIPQ_PROG_DONE; + /* * FIXME PIPEDMC_ERROR not enabled for now due to LNL pipe B * triggering it during the first DC state transition. Figure