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ice: Don't check device type when checking GNSS presence

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Don't check if the device type is E810T as non-E810T devices can support
GNSS too and PCA9575 check is enough to determine if GNSS is present or
not.

Rename ice_gnss_is_gps_present() to ice_gnss_is_module_present()
because GNSS module supports multiple GNSS providers, not only GPS.

Move functions related to PCA9575 from ice_ptp_hw.c to ice_common.c
to be able to access them when PTP is disabled in the kernel, but GNSS
is enabled.

Remove logical AND with ICE_AQC_LINK_TOPO_NODE_TYPE_M in
ice_get_pca9575_handle(), which has no effect, and reorder device type
checks to check the device_id first, then set other variables.

Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
This commit is contained in:
Karol Kolacinski 2024-09-30 14:12:38 +02:00 committed by Tony Nguyen
parent 39f54262ba
commit e2c6737e6e
7 changed files with 106 additions and 117 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

90
drivers/net/ethernet/intel/ice/ice_common.c
View File

@ -5764,6 +5764,96 @@ ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
}
/**
* ice_get_pca9575_handle - find and return the PCA9575 controller
* @hw: pointer to the hw struct
* @pca9575_handle: GPIO controller's handle
*
* Find and return the GPIO controller's handle in the netlist.
* When found - the value will be cached in the hw structure and following calls
* will return cached value.
*
* Return: 0 on success, -ENXIO when there's no PCA9575 present.
*/
int ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle)
{
struct ice_aqc_get_link_topo *cmd;
struct ice_aq_desc desc;
int err;
u8 idx;
/* If handle was read previously return cached value */
if (hw->io_expander_handle) {
*pca9575_handle = hw->io_expander_handle;
return 0;
}
#define SW_PCA9575_SFP_TOPO_IDX 2
#define SW_PCA9575_QSFP_TOPO_IDX 1
/* Check if the SW IO expander controlling SMA exists in the netlist. */
if (hw->device_id == ICE_DEV_ID_E810C_SFP)
idx = SW_PCA9575_SFP_TOPO_IDX;
else if (hw->device_id == ICE_DEV_ID_E810C_QSFP)
idx = SW_PCA9575_QSFP_TOPO_IDX;
else
return -ENXIO;
/* If handle was not detected read it from the netlist */
ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo);
cmd = &desc.params.get_link_topo;
cmd->addr.topo_params.node_type_ctx =
ICE_AQC_LINK_TOPO_NODE_TYPE_GPIO_CTRL;
cmd->addr.topo_params.index = idx;
err = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
if (err)
return -ENXIO;
/* Verify if we found the right IO expander type */
if (desc.params.get_link_topo.node_part_num !=
ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575)
return -ENXIO;
/* If present save the handle and return it */
hw->io_expander_handle =
le16_to_cpu(desc.params.get_link_topo.addr.handle);
*pca9575_handle = hw->io_expander_handle;
return 0;
}
/**
* ice_read_pca9575_reg - read the register from the PCA9575 controller
* @hw: pointer to the hw struct
* @offset: GPIO controller register offset
* @data: pointer to data to be read from the GPIO controller
*
* Return: 0 on success, negative error code otherwise.
*/
int ice_read_pca9575_reg(struct ice_hw *hw, u8 offset, u8 *data)
{
struct ice_aqc_link_topo_addr link_topo;
__le16 addr;
u16 handle;
int err;
memset(&link_topo, 0, sizeof(link_topo));
err = ice_get_pca9575_handle(hw, &handle);
if (err)
return err;
link_topo.handle = cpu_to_le16(handle);
link_topo.topo_params.node_type_ctx =
FIELD_PREP(ICE_AQC_LINK_TOPO_NODE_CTX_M,
ICE_AQC_LINK_TOPO_NODE_CTX_PROVIDED);
addr = cpu_to_le16((u16)offset);
return ice_aq_read_i2c(hw, link_topo, 0, addr, 1, data, NULL);
}
/**
* ice_aq_set_gpio
* @hw: pointer to the hw struct

2
drivers/net/ethernet/intel/ice/ice_common.h
View File

@ -306,5 +306,7 @@ int
ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
u16 bus_addr, __le16 addr, u8 params, const u8 *data,
struct ice_sq_cd *cd);
int ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle);
int ice_read_pca9575_reg(struct ice_hw *hw, u8 offset, u8 *data);
bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw);
#endif /* _ICE_COMMON_H_ */

31
drivers/net/ethernet/intel/ice/ice_gnss.c
View File

@ -381,32 +381,23 @@ void ice_gnss_exit(struct ice_pf *pf)
}
/**
* ice_gnss_is_gps_present - Check if GPS HW is present
* ice_gnss_is_module_present - Check if GNSS HW is present
* @hw: pointer to HW struct
*
* Return: true when GNSS is present, false otherwise.
*/
bool ice_gnss_is_gps_present(struct ice_hw *hw)
bool ice_gnss_is_module_present(struct ice_hw *hw)
{
if (!hw->func_caps.ts_func_info.src_tmr_owned)
int err;
u8 data;
if (!hw->func_caps.ts_func_info.src_tmr_owned ||
!ice_is_gps_in_netlist(hw))
return false;
if (!ice_is_gps_in_netlist(hw))
err = ice_read_pca9575_reg(hw, ICE_PCA9575_P0_IN, &data);
if (err || !!(data & ICE_P0_GNSS_PRSNT_N))
return false;
#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)
if (ice_is_e810t(hw)) {
int err;
u8 data;
err = ice_read_pca9575_reg(hw, ICE_PCA9575_P0_IN, &data);
if (err || !!(data & ICE_P0_GNSS_PRSNT_N))
return false;
} else {
return false;
}
#else
if (!ice_is_e810t(hw))
return false;
#endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */
return true;
}

4
drivers/net/ethernet/intel/ice/ice_gnss.h
View File

@ -37,11 +37,11 @@ struct gnss_serial {
#if IS_ENABLED(CONFIG_GNSS)
void ice_gnss_init(struct ice_pf *pf);
void ice_gnss_exit(struct ice_pf *pf);
bool ice_gnss_is_gps_present(struct ice_hw *hw);
bool ice_gnss_is_module_present(struct ice_hw *hw);
#else
static inline void ice_gnss_init(struct ice_pf *pf) { }
static inline void ice_gnss_exit(struct ice_pf *pf) { }
static inline bool ice_gnss_is_gps_present(struct ice_hw *hw)
static inline bool ice_gnss_is_module_present(struct ice_hw *hw)
{
return false;
}

2
drivers/net/ethernet/intel/ice/ice_lib.c
View File

@ -3893,7 +3893,7 @@ void ice_init_feature_support(struct ice_pf *pf)
ice_set_feature_support(pf, ICE_F_CGU);
if (ice_is_clock_mux_in_netlist(&pf->hw))
ice_set_feature_support(pf, ICE_F_SMA_CTRL);
if (ice_gnss_is_gps_present(&pf->hw))
if (ice_gnss_is_module_present(&pf->hw))
ice_set_feature_support(pf, ICE_F_GNSS);
break;
default:

93
drivers/net/ethernet/intel/ice/ice_ptp_hw.c
View File

@ -5315,68 +5315,6 @@ ice_get_phy_tx_tstamp_ready_e810(struct ice_hw *hw, u8 port, u64 *tstamp_ready)
* to access the extended GPIOs available.
*/
/**
* ice_get_pca9575_handle
* @hw: pointer to the hw struct
* @pca9575_handle: GPIO controller's handle
*
* Find and return the GPIO controller's handle in the netlist.
* When found - the value will be cached in the hw structure and following calls
* will return cached value
*/
static int
ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle)
{
struct ice_aqc_get_link_topo *cmd;
struct ice_aq_desc desc;
int status;
u8 idx;
/* If handle was read previously return cached value */
if (hw->io_expander_handle) {
*pca9575_handle = hw->io_expander_handle;
return 0;
}
/* If handle was not detected read it from the netlist */
cmd = &desc.params.get_link_topo;
ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo);
/* Set node type to GPIO controller */
cmd->addr.topo_params.node_type_ctx =
(ICE_AQC_LINK_TOPO_NODE_TYPE_M &
ICE_AQC_LINK_TOPO_NODE_TYPE_GPIO_CTRL);
#define SW_PCA9575_SFP_TOPO_IDX 2
#define SW_PCA9575_QSFP_TOPO_IDX 1
/* Check if the SW IO expander controlling SMA exists in the netlist. */
if (hw->device_id == ICE_DEV_ID_E810C_SFP)
idx = SW_PCA9575_SFP_TOPO_IDX;
else if (hw->device_id == ICE_DEV_ID_E810C_QSFP)
idx = SW_PCA9575_QSFP_TOPO_IDX;
else
return -EOPNOTSUPP;
cmd->addr.topo_params.index = idx;
status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
if (status)
return -EOPNOTSUPP;
/* Verify if we found the right IO expander type */
if (desc.params.get_link_topo.node_part_num !=
ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575)
return -EOPNOTSUPP;
/* If present save the handle and return it */
hw->io_expander_handle =
le16_to_cpu(desc.params.get_link_topo.addr.handle);
*pca9575_handle = hw->io_expander_handle;
return 0;
}
/**
* ice_read_sma_ctrl
* @hw: pointer to the hw struct
@ -5441,37 +5379,6 @@ int ice_write_sma_ctrl(struct ice_hw *hw, u8 data)
return status;
}
/**
* ice_read_pca9575_reg
* @hw: pointer to the hw struct
* @offset: GPIO controller register offset
* @data: pointer to data to be read from the GPIO controller
*
* Read the register from the GPIO controller
*/
int ice_read_pca9575_reg(struct ice_hw *hw, u8 offset, u8 *data)
{
struct ice_aqc_link_topo_addr link_topo;
__le16 addr;
u16 handle;
int err;
memset(&link_topo, 0, sizeof(link_topo));
err = ice_get_pca9575_handle(hw, &handle);
if (err)
return err;
link_topo.handle = cpu_to_le16(handle);
link_topo.topo_params.node_type_ctx =
FIELD_PREP(ICE_AQC_LINK_TOPO_NODE_CTX_M,
ICE_AQC_LINK_TOPO_NODE_CTX_PROVIDED);
addr = cpu_to_le16((u16)offset);
return ice_aq_read_i2c(hw, link_topo, 0, addr, 1, data, NULL);
}
/**
* ice_ptp_read_sdp_ac - read SDP available connections section from NVM
* @hw: pointer to the HW struct

1
drivers/net/ethernet/intel/ice/ice_ptp_hw.h
View File

@ -395,7 +395,6 @@ int ice_phy_cfg_intr_e82x(struct ice_hw *hw, u8 quad, bool ena, u8 threshold);
/* E810 family functions */
int ice_read_sma_ctrl(struct ice_hw *hw, u8 *data);
int ice_write_sma_ctrl(struct ice_hw *hw, u8 data);
int ice_read_pca9575_reg(struct ice_hw *hw, u8 offset, u8 *data);
int ice_ptp_read_sdp_ac(struct ice_hw *hw, __le16 *entries, uint *num_entries);
int ice_cgu_get_num_pins(struct ice_hw *hw, bool input);
enum dpll_pin_type ice_cgu_get_pin_type(struct ice_hw *hw, u8 pin, bool input);