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drm/amdgpu: round robin through clear_entities in amdgpu_fill_buffer
This makes clear of different BOs run in parallel. Partial jobs to clear a single BO still execute sequentially. Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1325,7 +1325,8 @@ void amdgpu_bo_release_notify(struct ttm_buffer_object *bo)
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if (r)
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goto out;
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r = amdgpu_fill_buffer(&adev->mman.clear_entities[0], abo, 0, &bo->base._resv,
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r = amdgpu_fill_buffer(amdgpu_ttm_next_clear_entity(adev),
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abo, 0, &bo->base._resv,
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&fence, AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE);
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if (WARN_ON(r))
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goto out;
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@ -2369,6 +2369,7 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable)
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adev->mman.clear_entities = kcalloc(num_clear_entities,
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sizeof(struct amdgpu_ttm_buffer_entity),
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GFP_KERNEL);
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atomic_set(&adev->mman.next_clear_entity, 0);
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if (!adev->mman.clear_entities)
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goto error_free_default_entity;
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@ -2642,11 +2643,8 @@ int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entity *entity,
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struct amdgpu_res_cursor dst;
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int r;
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if (!adev->mman.buffer_funcs_enabled) {
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dev_err(adev->dev,
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"Trying to clear memory with ring turned off.\n");
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if (!entity)
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return -EINVAL;
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}
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amdgpu_res_first(bo->tbo.resource, 0, amdgpu_bo_size(bo), &dst);
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@ -2682,6 +2680,20 @@ int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entity *entity,
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return r;
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}
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struct amdgpu_ttm_buffer_entity *
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amdgpu_ttm_next_clear_entity(struct amdgpu_device *adev)
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{
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struct amdgpu_mman *mman = &adev->mman;
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u32 i;
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if (mman->num_clear_entities == 0)
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return NULL;
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i = atomic_inc_return(&mman->next_clear_entity) %
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mman->num_clear_entities;
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return &mman->clear_entities[i];
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}
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/**
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* amdgpu_ttm_evict_resources - evict memory buffers
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* @adev: amdgpu device object
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@ -73,6 +73,7 @@ struct amdgpu_mman {
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/* @default_entity: for workarounds, has no gart windows */
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struct amdgpu_ttm_buffer_entity default_entity;
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struct amdgpu_ttm_buffer_entity *clear_entities;
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atomic_t next_clear_entity;
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u32 num_clear_entities;
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struct amdgpu_ttm_buffer_entity move_entities[TTM_NUM_MOVE_FENCES];
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u32 num_move_entities;
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@ -193,6 +194,7 @@ int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entity *entity,
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struct dma_resv *resv,
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struct dma_fence **f,
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u64 k_job_id);
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struct amdgpu_ttm_buffer_entity *amdgpu_ttm_next_clear_entity(struct amdgpu_device *adev);
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int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo);
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void amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo);
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