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iommu/exynos: fix TLB invalidation for no-block SysMMUs
sysmmu_block() polls MMU_STATUS for the blocked state, which no-block hardware never reports, so on such SysMMUs it always fails, and both sysmmu_tlb_invalidate_entry() and sysmmu_tlb_invalidate_flpdcache() skip the invalidation entirely when blocking fails. On no-block hardware the invalidation registers are written with the MMU running; the vendor driver never blocks around invalidation. Do the same and write the invalidation directly. In the FLPD cache path no-block implies a v7+ SysMMU, hence the unconditional flush-all. Signed-off-by: Markuss Broks <markuss.broks@gmail.com> Acked-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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@ -685,7 +685,14 @@ static void sysmmu_tlb_invalidate_flpdcache(struct sysmmu_drvdata *data,
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spin_lock_irqsave(&data->lock, flags);
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if (data->active && data->version >= MAKE_MMU_VER(3, 3)) {
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clk_enable(data->clk_master);
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if (sysmmu_block(data)) {
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/*
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* No-block hardware accepts invalidation writes while the
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* MMU is running; it is also v7+, so flush-all covers the
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* FLPD cache.
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*/
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if (data->no_block) {
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__sysmmu_tlb_invalidate(data);
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} else if (sysmmu_block(data)) {
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if (data->version >= MAKE_MMU_VER(5, 0))
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__sysmmu_tlb_invalidate(data);
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else
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@ -721,7 +728,9 @@ static void sysmmu_tlb_invalidate_entry(struct sysmmu_drvdata *data,
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if (MMU_MAJ_VER(data->version) == 2)
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num_inv = min_t(unsigned int, size / SPAGE_SIZE, 64);
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if (sysmmu_block(data)) {
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if (data->no_block) {
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__sysmmu_tlb_invalidate_entry(data, iova, num_inv);
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} else if (sysmmu_block(data)) {
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__sysmmu_tlb_invalidate_entry(data, iova, num_inv);
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sysmmu_unblock(data);
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}
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