drm/amdgpu/gfx: add eop size and alignment to shadow info

This is used by firmware for compute user queues.

Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2025-10-10 15:52:51 -04:00
parent 90254524ee
commit e26e4225ae
3 changed files with 10 additions and 0 deletions

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@ -328,6 +328,8 @@ struct amdgpu_gfx_shadow_info {
u32 shadow_alignment;
u32 csa_size;
u32 csa_alignment;
u32 eop_size;
u32 eop_alignment;
};
struct amdgpu_gfx_funcs {

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@ -1053,10 +1053,14 @@ static void gfx_v11_0_select_me_pipe_q(struct amdgpu_device *adev,
static void gfx_v11_0_get_gfx_shadow_info_nocheck(struct amdgpu_device *adev,
struct amdgpu_gfx_shadow_info *shadow_info)
{
/* for gfx */
shadow_info->shadow_size = MQD_SHADOW_BASE_SIZE;
shadow_info->shadow_alignment = MQD_SHADOW_BASE_ALIGNMENT;
shadow_info->csa_size = MQD_FWWORKAREA_SIZE;
shadow_info->csa_alignment = MQD_FWWORKAREA_ALIGNMENT;
/* for compute */
shadow_info->eop_size = GFX11_MEC_HPD_SIZE;
shadow_info->eop_alignment = 256;
}
static int gfx_v11_0_get_gfx_shadow_info(struct amdgpu_device *adev,

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@ -910,10 +910,14 @@ static void gfx_v12_0_select_me_pipe_q(struct amdgpu_device *adev,
static void gfx_v12_0_get_gfx_shadow_info_nocheck(struct amdgpu_device *adev,
struct amdgpu_gfx_shadow_info *shadow_info)
{
/* for gfx */
shadow_info->shadow_size = MQD_SHADOW_BASE_SIZE;
shadow_info->shadow_alignment = MQD_SHADOW_BASE_ALIGNMENT;
shadow_info->csa_size = MQD_FWWORKAREA_SIZE;
shadow_info->csa_alignment = MQD_FWWORKAREA_ALIGNMENT;
/* for compute */
shadow_info->eop_size = GFX12_MEC_HPD_SIZE;
shadow_info->eop_alignment = 256;
}
static int gfx_v12_0_get_gfx_shadow_info(struct amdgpu_device *adev,