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PCI: ultrarisc: Get and enable DP1000 PCIe controller clocks

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Add the required core, dbi, and aux clocks for the DP1000 PCIe controller
and enable them before initializing the controller.

Also manage the clocks across system suspend and resume.

Fixes: 5fc35740c3 ("PCI: ultrarisc: Add UltraRISC DP1000 PCIe Root Complex driver")
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patch.msgid.link/20260731-ultrarisc-pci-clk-v4-2-d738b491e49a@ultrarisc.com
This commit is contained in:
Jia Wang 2026-07-31 09:14:29 +08:00 committed by Bjorn Helgaas
parent 3d4b40fc88
commit e152c295d3
1 changed files with 78 additions and 7 deletions
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85
drivers/pci/controller/dwc/pcie-ultrarisc.c
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@ -5,6 +5,7 @@
* Copyright (C) 2026 UltraRISC Technology (Shanghai) Co., Ltd.
*/
#include <linux/clk.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of_device.h>
@ -23,6 +24,12 @@
#define ULTRARISC_PCIE_COMP_TIMEOUT_65_210MS 0x6
struct ultrarisc_pcie {
struct dw_pcie pci;
struct clk_bulk_data *clks;
int num_clks;
};
static struct pci_ops ultrarisc_pci_ops = {
.map_bus = dw_pcie_own_conf_map_bus,
.read = pci_generic_config_read32,
@ -98,17 +105,47 @@ static const struct dw_pcie_ops dw_pcie_ops = {
.start_link = ultrarisc_pcie_start_link,
};
static int ultrarisc_pcie_enable_clks(struct ultrarisc_pcie *ultra)
{
return clk_bulk_prepare_enable(ultra->num_clks, ultra->clks);
}
static void ultrarisc_pcie_disable_clks(void *data)
{
struct ultrarisc_pcie *ultra = data;
clk_bulk_disable_unprepare(ultra->num_clks, ultra->clks);
}
static int ultrarisc_pcie_init_clks(struct ultrarisc_pcie *ultra)
{
struct device *dev = ultra->pci.dev;
int ret;
ultra->num_clks = devm_clk_bulk_get_all(dev, &ultra->clks);
if (ultra->num_clks < 0)
return dev_err_probe(dev, ultra->num_clks, "Failed to get clocks\n");
ret = ultrarisc_pcie_enable_clks(ultra);
if (ret)
return dev_err_probe(dev, ret, "Failed to enable clocks\n");
return devm_add_action_or_reset(dev, ultrarisc_pcie_disable_clks, ultra);
}
static int ultrarisc_pcie_probe(struct platform_device *pdev)
{
struct ultrarisc_pcie *ultra;
struct device *dev = &pdev->dev;
struct dw_pcie_rp *pp;
struct dw_pcie *pci;
int ret;
pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
if (!pci)
ultra = devm_kzalloc(dev, sizeof(*ultra), GFP_KERNEL);
if (!ultra)
return -ENOMEM;
pci = &ultra->pci;
pci->dev = dev;
pci->ops = &dw_pcie_ops;
@ -117,7 +154,11 @@ static int ultrarisc_pcie_probe(struct platform_device *pdev)
pp = &pci->pp;
platform_set_drvdata(pdev, pci);
platform_set_drvdata(pdev, ultra);
ret = ultrarisc_pcie_init_clks(ultra);
if (ret)
return ret;
pp->num_vectors = MAX_MSI_IRQS;
/* No L2/L3 Ready indication is available on this platform */
@ -135,16 +176,46 @@ static int ultrarisc_pcie_probe(struct platform_device *pdev)
static int ultrarisc_pcie_suspend_noirq(struct device *dev)
{
struct dw_pcie *pci = dev_get_drvdata(dev);
struct ultrarisc_pcie *ultra = dev_get_drvdata(dev);
struct dw_pcie *pci = &ultra->pci;
int ret;
return dw_pcie_suspend_noirq(pci);
/*
* A failed resume leaves the DWC suspended and the clocks disabled.
* A later suspend must not access the controller or disable them again.
*/
if (pci->suspended)
return 0;
ret = dw_pcie_suspend_noirq(pci);
if (ret)
return ret;
if (pci->suspended)
ultrarisc_pcie_disable_clks(ultra);
return 0;
}
static int ultrarisc_pcie_resume_noirq(struct device *dev)
{
struct dw_pcie *pci = dev_get_drvdata(dev);
struct ultrarisc_pcie *ultra = dev_get_drvdata(dev);
struct dw_pcie *pci = &ultra->pci;
int ret;
return dw_pcie_resume_noirq(pci);
if (pci->suspended) {
ret = ultrarisc_pcie_enable_clks(ultra);
if (ret)
return ret;
ret = dw_pcie_resume_noirq(pci);
if (ret) {
ultrarisc_pcie_disable_clks(ultra);
return ret;
}
}
return 0;
}
static const struct dev_pm_ops ultrarisc_pcie_pm_ops = {