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riscv: dts: spacemit: improve RTL8211F PHY configuration on K3 Pico-ITX board

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Vendor kernel enabled ALDPS (Advanced Link Down Power Saving) on the
RTL8211F PHY to save power when link down.

Vendor kernel also disabled the 125MHz clkout clock signal, and indeed
the schematics confirms that it only goes to a test point (TP14), so
let's do the same.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Yixun Lan <dlan@kernel.org>
Reviewed-by: Yixun Lan <dlan@kernel.org>
Link: https://patch.msgid.link/20260623204431.498700-6-aurelien@aurel32.net
Signed-off-by: Yixun Lan <dlan@kernel.org>
This commit is contained in:
Aurelien Jarno 2026-06-23 22:43:49 +02:00 committed by Yixun Lan
parent ae4e84366b
commit e0c1145f4c
1 changed files with 2 additions and 0 deletions
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arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
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@ -234,6 +234,8 @@ phy0: phy@1 {
reset-gpios = <&gpio 0 15 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <10000>;
realtek,aldps-enable;
realtek,clkout-disable;
};
};
};