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dt-bindings: riscv: sort multi-letter Z extensions alphanumerically
The multi-letter extension enum is documented as being sorted alphanumerically (see the "multi-letter extensions, sorted alphanumerically" comment), but several Z entries have drifted out of order. Reorder the affected entries so the multi-letter Z list is sorted alphanumerically again. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Guodong Xu <docular.xu@gmail.com> Link: https://patch.msgid.link/20260701-rva23u64-hwprobe-v2-v5-1-2c61f94a695a@gmail.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
This commit is contained in:
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e0776dde10
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@ -457,6 +457,13 @@ properties:
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merged in the riscv-isa-manual by commit dbc79cf28a2 ("Initial seed
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of zc.adoc to src tree.").
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- const: zclsd
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description:
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The Zclsd extension implements the compressed (16-bit) version of the
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Load/Store Pair for RV32. As with Zilsd, this extension was ratified
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in commit f88abf1 ("Integrating load/store pair for RV32 with the
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main manual") of riscv-isa-manual.
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- const: zcmop
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description:
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The standard Zcmop extension version 1.0, as ratified in commit
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@ -487,6 +494,22 @@ properties:
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in commit 64074bc ("Update version numbers for Zfh/Zfinx") of
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riscv-isa-manual.
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- const: zicbom
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description:
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The standard Zicbom extension for base cache management operations as
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ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs.
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- const: zicbop
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description:
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The standard Zicbop extension for cache-block prefetch instructions
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as ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of
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riscv-CMOs.
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- const: zicboz
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description:
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The standard Zicboz extension for cache-block zeroing as ratified
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in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs.
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- const: ziccamoa
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description:
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The standard Ziccamoa extension for main memory (cacheability and
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@ -514,6 +537,66 @@ properties:
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guarantee on LR/SC sequences, as ratified in commit b1d806605f87
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("Updated to ratified state.") of the riscv profiles specification.
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- const: zicfilp
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description: |
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The standard Zicfilp extension for enforcing forward edge
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control-flow integrity as ratified in commit 3f8e450 ("merge
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pull request #227 from ved-rivos/0709") of riscv-cfi
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github repo.
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- const: zicfiss
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description: |
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The standard Zicfiss extension for enforcing backward edge
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control-flow integrity as ratified in commit 3f8e450 ("merge
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pull request #227 from ved-rivos/0709") of riscv-cfi
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github repo.
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- const: zicntr
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description:
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The standard Zicntr extension for base counters and timers, as
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ratified in the 20191213 version of the unprivileged ISA
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specification.
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- const: zicond
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description:
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The standard Zicond extension for conditional arithmetic and
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conditional-select/move operations as ratified in commit 95cf1f9
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("Add changes requested by Ved during signoff") of riscv-zicond.
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- const: zicsr
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description: |
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The standard Zicsr extension for control and status register
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instructions, as ratified in the 20191213 version of the
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unprivileged ISA specification.
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This does not include Chapter 10, "Counters", which documents
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special case read-only CSRs, that were moved into the Zicntr and
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Zihpm extensions after the ratification of the 20191213 version of
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the unprivileged specification.
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- const: zifencei
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description:
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The standard Zifencei extension for instruction-fetch fence, as
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ratified in the 20191213 version of the unprivileged ISA
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specification.
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- const: zihintntl
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description:
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The standard Zihintntl extension for non-temporal locality hints, as
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ratified in commit 0dc91f5 ("Zihintntl is ratified") of the
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riscv-isa-manual.
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- const: zihintpause
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description:
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The standard Zihintpause extension for pause hints, as ratified in
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commit d8ab5c7 ("Zihintpause is ratified") of the riscv-isa-manual.
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- const: zihpm
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description:
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The standard Zihpm extension for hardware performance counters, as
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ratified in the 20191213 version of the unprivileged ISA
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specification.
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- const: zilsd
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description:
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The standard Zilsd extension which provides support for aligned
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@ -521,12 +604,10 @@ properties:
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encodings, as ratified in commit f88abf1 ("Integrating
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load/store pair for RV32 with the main manual") of riscv-isa-manual.
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- const: zclsd
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- const: zimop
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description:
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The Zclsd extension implements the compressed (16-bit) version of the
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Load/Store Pair for RV32. As with Zilsd, this extension was ratified
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in commit f88abf1 ("Integrating load/store pair for RV32 with the
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main manual") of riscv-isa-manual.
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The standard Zimop extension version 1.0, as ratified in commit
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58220614a5f ("Zimop is ratified/1.0") of the riscv-isa-manual.
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- const: zk
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description:
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@ -590,87 +671,6 @@ properties:
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in version 1.0 of RISC-V Cryptography Extensions Volume I
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specification.
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- const: zicbom
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description:
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The standard Zicbom extension for base cache management operations as
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ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs.
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- const: zicbop
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description:
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The standard Zicbop extension for cache-block prefetch instructions
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as ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of
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riscv-CMOs.
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- const: zicboz
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description:
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The standard Zicboz extension for cache-block zeroing as ratified
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in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs.
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- const: zicfilp
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description: |
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The standard Zicfilp extension for enforcing forward edge
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control-flow integrity as ratified in commit 3f8e450 ("merge
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pull request #227 from ved-rivos/0709") of riscv-cfi
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github repo.
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- const: zicfiss
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description: |
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The standard Zicfiss extension for enforcing backward edge
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control-flow integrity as ratified in commit 3f8e450 ("merge
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pull request #227 from ved-rivos/0709") of riscv-cfi
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github repo.
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- const: zicntr
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description:
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The standard Zicntr extension for base counters and timers, as
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ratified in the 20191213 version of the unprivileged ISA
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specification.
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- const: zicond
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description:
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The standard Zicond extension for conditional arithmetic and
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conditional-select/move operations as ratified in commit 95cf1f9
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("Add changes requested by Ved during signoff") of riscv-zicond.
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- const: zicsr
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description: |
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The standard Zicsr extension for control and status register
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instructions, as ratified in the 20191213 version of the
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unprivileged ISA specification.
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This does not include Chapter 10, "Counters", which documents
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special case read-only CSRs, that were moved into the Zicntr and
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Zihpm extensions after the ratification of the 20191213 version of
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the unprivileged specification.
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- const: zifencei
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description:
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The standard Zifencei extension for instruction-fetch fence, as
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ratified in the 20191213 version of the unprivileged ISA
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specification.
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- const: zihintpause
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description:
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The standard Zihintpause extension for pause hints, as ratified in
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commit d8ab5c7 ("Zihintpause is ratified") of the riscv-isa-manual.
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- const: zihintntl
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description:
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The standard Zihintntl extension for non-temporal locality hints, as
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ratified in commit 0dc91f5 ("Zihintntl is ratified") of the
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riscv-isa-manual.
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- const: zihpm
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description:
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The standard Zihpm extension for hardware performance counters, as
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ratified in the 20191213 version of the unprivileged ISA
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specification.
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- const: zimop
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description:
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The standard Zimop extension version 1.0, as ratified in commit
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58220614a5f ("Zimop is ratified/1.0") of the riscv-isa-manual.
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- const: ztso
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description:
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The standard Ztso extension for total store ordering, as ratified
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@ -809,18 +809,18 @@ properties:
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instructions, as ratified in commit 56ed795 ("Update
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riscv-crypto-spec-vector.adoc") of riscv-crypto.
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- const: zvksh
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description: |
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The standard Zvksh extension for ShangMi suite: SM3 secure hash
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instructions, as ratified in commit 56ed795 ("Update
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riscv-crypto-spec-vector.adoc") of riscv-crypto.
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- const: zvksg
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description:
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The standard Zvksg extension for ShangMi algorithm suite with GCM
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instructions, as ratified in commit 56ed795 ("Update
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riscv-crypto-spec-vector.adoc") of riscv-crypto.
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- const: zvksh
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description: |
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The standard Zvksh extension for ShangMi suite: SM3 secure hash
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instructions, as ratified in commit 56ed795 ("Update
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riscv-crypto-spec-vector.adoc") of riscv-crypto.
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- const: zvkt
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description:
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The standard Zvkt extension for vector data-independent execution
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