github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-07-27 17:47:41 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

ARM: dts: renesas: r8a7740: Describe coresight

Browse Source 
Describe the coresight topology on R-Mobile A1.  Extend the current PTM
node with connection funnel, TPIU, ETB and replicator.  Coresight on
this hardware is clocked from the ZT/ZTR trace clocks.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260422233744.149872-5-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Marek Vasut 2026-04-23 01:36:30 +02:00 committed by Geert Uytterhoeven
parent 1d4bed0d9c
commit dfe6b60d58
1 changed files with 111 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

114
arch/arm/boot/dts/renesas/r8a7740.dtsi
View File

@ -18,7 +18,7 @@ / {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
cpu0: cpu@0 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0x0>;
@ -59,9 +59,117 @@ pmu {
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
};
ptm {
compatible = "arm,coresight-etm3x";
replicator {
compatible = "arm,coresight-static-replicator";
clocks = <&cpg_clocks R8A7740_CLK_ZTR>;
clock-names = "atclk";
power-domains = <&pd_d4>;
out-ports {
#address-cells = <1>;
#size-cells = <0>;
/* replicator output ports */
port@0 {
reg = <0>;
replicator_out_port0: endpoint {
remote-endpoint = <&tpiu_in_port>;
};
};
port@1 {
reg = <1>;
replicator_out_port1: endpoint {
remote-endpoint = <&etb_in_port>;
};
};
};
in-ports {
/* replicator input port */
port {
replicator_in_port0: endpoint {
remote-endpoint = <&funnel_out_port>;
};
};
};
};
etb@e6fa1000 {
compatible = "arm,coresight-etb10", "arm,primecell";
reg = <0xe6fa1000 0x1000>;
clocks = <&cpg_clocks R8A7740_CLK_ZT>, <&cpg_clocks R8A7740_CLK_ZTR>;
clock-names = "apb_pclk", "atclk";
power-domains = <&pd_d4>;
in-ports {
port {
etb_in_port: endpoint {
remote-endpoint = <&replicator_out_port1>;
};
};
};
};
tpiu@e6fa3000 {
compatible = "arm,coresight-tpiu", "arm,primecell";
reg = <0xe6fa3000 0x1000>;
clocks = <&cpg_clocks R8A7740_CLK_ZT>, <&cpg_clocks R8A7740_CLK_ZTR>;
clock-names = "apb_pclk", "atclk";
power-domains = <&pd_d4>;
in-ports {
port {
tpiu_in_port: endpoint {
remote-endpoint = <&replicator_out_port0>;
};
};
};
};
funnel {
compatible = "arm,coresight-static-funnel";
/* funnel output ports */
out-ports {
port {
funnel_out_port: endpoint {
remote-endpoint =
<&replicator_in_port0>;
};
};
};
in-ports {
#address-cells = <1>;
#size-cells = <0>;
/* funnel input ports */
port@0 {
reg = <0>;
funnel0_in_port0: endpoint {
remote-endpoint = <&ptm0_out_port>;
};
};
};
};
ptm@e6fbc000 {
compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0xe6fbc000 0x1000>;
clocks = <&cpg_clocks R8A7740_CLK_ZT>, <&cpg_clocks R8A7740_CLK_ZTR>;
clock-names = "apb_pclk", "atclk";
cpu = <&cpu0>;
power-domains = <&pd_d4>;
out-ports {
port {
ptm0_out_port: endpoint {
remote-endpoint = <&funnel0_in_port0>;
};
};
};
};
ceu0: ceu@fe910000 {